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Article

Test-Path Scheduling for Interposer-Based 2.5D Integrated Circuits Using an Orthogonal Learning-Based Differential Evolution Algorithm

1
School of Information Science and Engineering, Harbin Institute of Technology, Weihai 264209, China
2
School of Electronics and Information Engineering, Harbin Institute of Technology, Harbin 150001, China
3
School of Computing, Dublin City University, D09 V209 Dublin, Ireland
*
Author to whom correspondence should be addressed.
Mathematics 2025, 13(16), 2679; https://doi.org/10.3390/math13162679
Submission received: 21 July 2025 / Revised: 17 August 2025 / Accepted: 19 August 2025 / Published: 20 August 2025
(This article belongs to the Special Issue Intelligence Optimization Algorithms and Applications)

Abstract

2.5D integrated circuits (ICs), which utilize an interposer to stack multiple dies side by side, represent a promising architecture for improving system performance, integration density, and design flexibility. However, the complex interconnect structures present significant challenges for post-fabrication testing, especially when scheduling test paths under constrained test access mechanisms. This paper addresses the test-path scheduling problem in interposer-based 2.5D ICs, aiming to minimize both total test time and cumulative inter-die interconnect length. We propose an efficient orthogonal learning-based differential evolution algorithm, named OLELS-DE. The algorithm combines the global optimization capability of differential evolution with an orthogonal learning-based search strategy and an elites local search strategy to enhance the convergence and solution quality. Comprehensive experiments are conducted on a set of benchmark instances with varying die counts, and the proposed method is compared against five state-of-the-art metaheuristic algorithms and CPLEX. Experimental results demonstrate that OLELS-DE consistently outperforms the competitors in terms of test cost reduction and convergence reliability, confirming its robustness and effectiveness for complex test scheduling in 2.5D ICs.
Keywords: 2.5D integrated circuits; test-path scheduling; differential evolution; orthogonal learning 2.5D integrated circuits; test-path scheduling; differential evolution; orthogonal learning

Share and Cite

MDPI and ACS Style

Li, C.; Deng, L.; Yuan, G.; Qiao, L.; Zhang, L.; Chen, C. Test-Path Scheduling for Interposer-Based 2.5D Integrated Circuits Using an Orthogonal Learning-Based Differential Evolution Algorithm. Mathematics 2025, 13, 2679. https://doi.org/10.3390/math13162679

AMA Style

Li C, Deng L, Yuan G, Qiao L, Zhang L, Chen C. Test-Path Scheduling for Interposer-Based 2.5D Integrated Circuits Using an Orthogonal Learning-Based Differential Evolution Algorithm. Mathematics. 2025; 13(16):2679. https://doi.org/10.3390/math13162679

Chicago/Turabian Style

Li, Chunlei, Libao Deng, Guanyu Yuan, Liyan Qiao, Lili Zhang, and Chu Chen. 2025. "Test-Path Scheduling for Interposer-Based 2.5D Integrated Circuits Using an Orthogonal Learning-Based Differential Evolution Algorithm" Mathematics 13, no. 16: 2679. https://doi.org/10.3390/math13162679

APA Style

Li, C., Deng, L., Yuan, G., Qiao, L., Zhang, L., & Chen, C. (2025). Test-Path Scheduling for Interposer-Based 2.5D Integrated Circuits Using an Orthogonal Learning-Based Differential Evolution Algorithm. Mathematics, 13(16), 2679. https://doi.org/10.3390/math13162679

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