#### 2.1. Mathematical Model of PMSG

The equivalent circuit of a PMSG is shown in

Figure 2. The voltage equation can be written as [

6,

8]

where

Here,

${v}_{as}$,

${v}_{bs}$, and

${v}_{cs}$ denote the phase voltages of the generator, and

${i}_{as}$,

${i}_{bs}$, and

${i}_{cs}$ denote the line currents of the generator; furthermore,

${r}_{s}$ represents the equivalent resistance of the stator, and

${\text{\lambda}}_{as}$,

${\text{\lambda}}_{bs}$,

${\text{\lambda}}_{cs}$ are the flux linkages of the stator. Assume that the flux harmonics of the rotor and stator are negligible. Consequently, the fluxes of the rotor and stator are sinusoidally distributed. Therefore, the flux linkage can be expressed as

where

Here,

${\text{\theta}}_{r}={{\displaystyle \int}}^{\text{}}{\text{\omega}}_{r}dt$ and

${L}_{ms}=\frac{{N}_{s}^{2}}{{\Re}_{m}}$;

${\text{\theta}}_{r}$ is the rotor flux angle,

${\text{\omega}}_{r}$ is the rotor speed,

${N}_{s}$ is the equivalent number of turns in the stator winding,

${L}_{ls}$ is the leakage inductance of the stator winding,

${\Re}_{m}$ is the equivalent reluctance of the stator, and

${\text{\lambda}}_{m}^{\text{'}}$ is the equivalent flux linkage of the rotor relative to the stator. According to Equations (1)–(8), the phase voltage of the generator can be obtained as

where

${e}_{abcs}$ denotes the internal voltage of the generator and is proportional to

${\text{\omega}}_{r}$. In other words,

The equation for the output power of the generator is

According to Equations (10) and (11), the output power equation can be rewritten as

This equation shows that the output power of the generator is proportional to the rotor speed and the peak value of the three-phase currents, implying that the output power of the generator can be controlled by varying the peak value of the currents. This principle was used in this study to implement a current controller for the three-phase, three-level rectifier.

**Figure 2.**
Equivalent circuit of a Y-connection PMSG.

**Figure 2.**
Equivalent circuit of a Y-connection PMSG.

#### 2.2. Three-Phase, Three-Level Rectifier

A schematic of the three-phase, three-level rectifier is shown in

Figure 3. It was constructed by adding six clamping diodes with the six power switches to the conventional bridge structure. These six switches can be appropriately controlled for obtaining three levels of the DC supply voltage across the DC-link capacitors [

11]. In

Figure 3, the voltages of

${C}_{1}$ and

${C}_{2}$ are

${v}_{1}$ and

${v}_{2}$, respectively. The three voltage levels of the three-phase, three-level rectifier defined by two mutually exclusive switching states—(

${T}_{x1}^{+}$,

${T}_{x1}^{-}$) and (

${T}_{x2}^{+}$,

${T}_{x2}^{-}$)—are listed in

Table 1, where x denotes a, b, or c. The sinusoidal PWM is used to generate gating signals for the power switches [

12].

**Figure 3.**
Schematic of a three-phase, three-level rectifier.

**Figure 3.**
Schematic of a three-phase, three-level rectifier.

**Table 1.**
Phase voltages of the three-phase, three-level rectifier.

**Table 1.**
Phase voltages of the three-phase, three-level rectifier.
Output ${v}_{xg}$ | Switching State |
---|

${T}_{x1}^{+}$ | ${T}_{x2}^{+}$ | ${T}_{x1}^{-}$ | ${T}_{x2}^{-}$ |
---|

${v}_{1}$ | 1 | 1 | 0 | 0 |

0 | 0 | 1 | 1 | 0 |

$-{v}_{2}$ | 0 | 0 | 1 | 1 |

Assume that the power switches are ideal. The equivalent circuit of

Figure 3 is shown in

Figure 4. The following situations are illustrated:

where

$x=a,\text{}b,\text{}c$. The switching of the phase voltage

${v}_{xg}$ can be expressed as

Because the three-phase voltages from the wind generator are balanced, the following expression holds:

where

${v}_{as}$,

${v}_{bs}$, and

${v}_{cs}$ are the phase voltages relative to the neutral point of the wind generator. In

Figure 4, currents

${i}_{1}$ and

${i}_{2}$ are given by

Furthermore, the current

${i}_{0}$ at point

$\text{g}$ is

where

${k}_{x1}$,

${k}_{x2}$, and

${k}_{x0}$ are determined as

Here, $x=a,\text{}b,\text{or}c$ and $n=0,\text{}1,\text{or}2$.

In

Figure 4, the differential equations of the voltages of the upper and lower capacitors are

and the voltage error between the upper and the lower capacitors is

where

${C}_{1}$ and

${C}_{2}$ are upper and lower DC-link capacitors, respectively. Equation (22) indicates that the voltage error of the upper and lower capacitors can be controlled by varying duty cycles of

${k}_{xn}$, and this principle was used in this study to implement a voltage controller for the three-phase, three-level rectifier [

13].

**Figure 4.**
Equivalent circuit of the three-phase, three-level rectifier.

**Figure 4.**
Equivalent circuit of the three-phase, three-level rectifier.

To control the three-phase, three-level rectifier, a sinusoidal PWM technique involving two carrier waves was used [

14]. Gating signals for the power transistors were generated by comparing the commanding signal magnitude of

${v}_{x}^{\text{*}}$ with the magnitude of two inverse carrier waves having the same peak-to-peak amplitude, frequency, and phase, as shown in

Figure 5. The rectifier is illustrated by the following three modes of operation:

- (1)
when ${v}_{x}^{*}>{v}_{tri1}$ and ${v}_{x}^{*}>{v}_{tri2}$, ${v}_{xg}={v}_{1}$

- (2)
when ${v}_{tri1}>{v}_{x}^{*}>{v}_{tri2}$, ${v}_{xg}=0$

- (3)
when ${v}_{x}^{*}<{v}_{tri1}$ and ${v}_{x}^{*}<{v}_{tri2}$, ${v}_{xg}=-{v}_{2}$

where

$x=a,\text{}b,\text{}c$.

**Figure 5.**
Sinusoidal PWM with two carrier waves.

**Figure 5.**
Sinusoidal PWM with two carrier waves.

Figure 5 shows that the peak values of

${v}_{tri1}$ and

${v}_{tri2}$ are

$+{\widehat{v}}_{tri}$ and −

${\widehat{v}}_{tri}$, respectively. Therefore, there are three switching modes according to the level of the commanding signal. If the commanding signal can be produced using only half of the DC-link voltage, for example,

${v}_{1}$, the magnitude of the carrier waves is compared with the commanding signal magnitude, thereby yielding the first mode of operation. If the commanding signal magnitude lies between the signal magnitudes of two carrier waves, the second mode of operation, in which the switching pattern is produced by comparing the carrier waves with the commanding signal magnitude, is conducted. Gating signals for power transistors in the third mode of operation can be obtained by comparing the magnitude of the carrier waves with the magnitude of

${v}_{x}^{\text{*}}$. Finally,

Figure 6 shows the gating signals for the three modes of operation, illustrating that the switching pattern of the three-phase, three-level rectifier is generated by the aforementioned three modes of operation. The switching loss can be reduced by reducing the switching frequency or by reducing the instantaneous current or voltage during the switching period.

**Figure 6.**
Switching pattern of the three-phase, three-level rectifier.

**Figure 6.**
Switching pattern of the three-phase, three-level rectifier.

#### 2.3. Neutral-Point-Clamped Controller

The three-phase, three-level rectifier is implemented using switch-mode devices, and three-phase voltages are obtained from the wind generator. The statuses of the upper and lower switches are mutually exclusive, and the DC-link voltage is not shorted in normal operation. Assume that the power transistors are ideal and that the currents

${i}_{a}$,

${i}_{b}$, and

${i}_{c}$ are continuous. When the load varies, the voltage of the upper capacitor is lower than that of the lower capacitor; in other words, the current passing through the upper capacitor is lower than that passing through the lower capacitor. Therefore, the command voltage for the DC-link can be regulated by varying the voltage error between the upper and the lower capacitors [

14]. According to Equations (16) and (19),

${v}_{1}$ can be increased by regulating the turn-on time for

${k}_{x1}=1$ so that

${i}_{1}$ increases, and vice versa. The voltage error command is

where

${v}_{1}^{\text{*}}$ and

${v}_{2}^{\text{*}}$ are the voltage commands of the upper and lower capacitors and their values are half that of the DC-link voltage; in other words,

${v}_{1}^{\text{*}}={v}_{2}^{\text{*}}=\raisebox{1ex}{${v}_{dc}^{\text{*}}$}\!\left/ \!\raisebox{-1ex}{$2$}\right.$. If

$\mathrm{\Delta}{E}^{\text{*}}$ is zero, the voltages across the DC-link capacitors are symmetrical. According to Equation (23), the compensation voltage for the DC link is

where

${G}_{\mathrm{\Delta}E}$ is the gain of the proportional-integral voltage controller, and

${v}_{o}^{\text{*}}$ is the voltage command of the DC-link capacitor voltage; the symbol “

$\circ $” denotes proportional-integral operation. Specifically, Equation (24) shows that

${v}_{o}^{\text{*}}$ can be obtained by achieving proportional-integral control of the DC-link voltage error. A control block diagram of the neutral-point-clamped controller is shown in

Figure 7.

**Figure 7.**
Control block diagram of the three-phase, three-level rectifier.

**Figure 7.**
Control block diagram of the three-phase, three-level rectifier.

#### 2.4. Three-Phase, Six-Leg Inverter

A schematic diagram of the three-phase, six-leg inverter with phase-r consideration is shown in

Figure 8. The inverter has the conventional single-phase, full-bridge structure. Assume that

where

$x$ denotes

${r}_{1}$,

${r}_{2}$,

${s}_{1}$,

${s}_{2}$,

${t}_{1}$, or

${t}_{2}$. Therefore, the equivalent circuit of phase-r shown in

Figure 9 can be obtained. A similar result can be obtained for phase-s and phase-t. The switching functions of the three-phase voltages

${v}_{r}$,

${v}_{s}$, and

${v}_{t}$ and the DC-link current

${i}_{dc}$ can be written as

where

${i}_{r1}={d}_{r1}{i}_{r}$,

${i}_{r2}=-{d}_{r2}{i}_{r}$,

${i}_{s1}={d}_{s1}{i}_{s}$,

${i}_{s2}=-{d}_{s2}{i}_{s}$,

${i}_{t1}={d}_{t1}{i}_{t}$, and

${i}_{t2}=-{d}_{t2}{i}_{t}$;

${v}_{dc}$ is the DC-link voltage. According to Equation (29), the DC-link current

${i}_{3}$ can be obtained as

Equations (26)–(28) indicate that the instantaneous voltages of each phase are

${v}_{dc}$, 0, and

$-{v}_{dc}$, where the voltage of phase-r can be written as

Therefore, the output voltage of phase-r can be determined by the states ${d}_{r1}$ and ${d}_{r2}$ and the DC-link voltage. If the DC-link voltage is constant, ${d}_{r1}$ and ${d}_{r2}$ can be varied to adjust the output voltage of phase-r. The output voltages for phase-s and phase-t can be similarly obtained. Equations (26)–(28) were used in this study to implement a three-phase, six-leg inverter.

**Figure 8.**
Power circuit of the three-phase, six-leg inverter (phase-r).

**Figure 8.**
Power circuit of the three-phase, six-leg inverter (phase-r).

**Figure 9.**
Equivalent circuit of the three-phase, six-leg inverter (phase-r).

**Figure 9.**
Equivalent circuit of the three-phase, six-leg inverter (phase-r).

The inverter power circuit with appropriate control can provide three different voltage levels to the load. This is illustrated by the following four modes of operation:

- (1)
When ${v}_{r}^{\text{*}}>{v}_{tri}$, ${T}_{r1}^{+}$ is ON and ${T}_{r1}^{-}$ is OFF, leading to ${v}_{r1N}={v}_{dc}$

- (2)
When ${v}_{r}^{\text{*}}<{v}_{tri}$, ${T}_{r1}^{+}$ is OFF and ${T}_{r1}^{-}$ is ON, resulting in ${v}_{r1N}=0$

- (3)
When $-{v}_{r}^{\text{*}}>{v}_{tri}$, ${T}_{r2}^{+}$ is ON and ${T}_{r2}^{-}$ is OFF, resulting in ${v}_{r2N}={v}_{dc}$

- (4)
When $-{v}_{r}^{\text{*}}<{v}_{tri}$, ${T}_{r2}^{+}$ is OFF and ${T}_{r2}^{-}$ is ON, leading to ${v}_{r2N}=0$

The voltage ratings of switches are identical and equal to ${v}_{dc}$. The antiparallel diodes across the switches enable continuous current to flow and thus facilitate maintaining a sinusoidal output current.

To control the three-phase inverter, a multicarrier disposition PWM technique is used. Gating signals for the power transistors are generated by comparing the commanding signal magnitudes of

${v}_{r}^{\text{*}}$ and

$-{v}_{r}^{\text{*}}$ with a contiguous carrier wave.

Figure 10 shows that there are four switching modes corresponding to the level of the commanding signal, as shown in

Figure 10b–d. In the first mode of operation, the magnitude of the carrier wave is compared with the commanding signal magnitudes. If the commanding signal magnitude is lower than the carrier wave magnitude, the second mode of operation, in which the switching pattern produced by comparing the carrier wave magnitude with the commanding signal magnitude, is performed. Similarly, gating signals for the power transistors in the third and fourth modes of operation can be obtained by comparing the carrier wave magnitude with the magnitudes of

${v}_{r}^{\text{*}}$ and

$-{v}_{r}^{\text{*}}$, respectively.

Figure 10d shows that the switching pattern of the three-phase, six-leg inverter is generated by the aforementioned four modes of operation and that the average output voltage

${v}_{r}$ is sinusoidal. The switching loss of the inverter can be reduced by reducing the switching frequency or by reducing the instantaneous value of the current or voltage in the switching period. Conventional bipolar modulation results in high commutation losses because the four switches are modulated at a high frequency in all modulation cycles. However, in unipolar modulation, only

${v}_{dc}$ and 0 are presented in the positive half-cycle. Therefore, unipolar modulation is more efficient for practical applications.

**Figure 10.**
Switching pattern of the three-phase, six-leg inverter (phase-r).

**Figure 10.**
Switching pattern of the three-phase, six-leg inverter (phase-r).

#### 2.5. Design of Voltage Regulator

The low-pass filter for the three-phase, six-leg inverter shown in

Figure 1 was implemented using three inductors, capacitors, and transformers. The inductors and capacitors are connected in series and in parallel on the primary and the secondary sides of each transformer, respectively. Assume the turn ratios of the transformers to be 5. To simplify the analysis of the transformer, the equivalent copper, iron losses, leakage, and excitation inductors are neglected, as shown in

Figure 11. Therefore, the three-phase voltage and current equations can be written as

where

${v}_{xyz}={\left[\begin{array}{ccc}{v}_{x}& {v}_{y}& {v}_{z}\end{array}\right]}^{T}$: phase voltages on the secondary sides of transformers;

${v}_{rst}={\left[\begin{array}{ccc}{v}_{r}& {v}_{s}& {v}_{t}\end{array}\right]}^{T}$: phase voltages on the primary sides of transformers;

${i}_{xyz}={\left[\begin{array}{ccc}{i}_{x}& {i}_{y}& {i}_{z}\end{array}\right]}^{T}$: phase currents on the secondary sides of transformers;

${i}_{rst}={\left[\begin{array}{ccc}{i}_{r}& {i}_{s}& {i}_{t}\end{array}\right]}^{T}$: phase currents on the primary sides of transformers;

${i}_{xyzc}={\left[\begin{array}{ccc}{i}_{xc}& {i}_{yc}& {i}_{zc}\end{array}\right]}^{T}$: currents to capacitors;

$\tilde{{R}_{f}}=\left[\begin{array}{ccc}{R}_{f}& 0& 0\\ 0& {R}_{f}& 0\\ 0& 0& {R}_{f}\end{array}\right]$;

$\tilde{{L}_{f}}=\left[\begin{array}{ccc}{L}_{f}& 0& 0\\ 0& {L}_{f}& 0\\ 0& 0& {L}_{f}\end{array}\right]$;

$\tilde{{C}_{f}}=\left[\begin{array}{ccc}{C}_{f}& 0& 0\\ 0& {C}_{f}& 0\\ 0& 0& {C}_{f}\end{array}\right]$

${R}_{f}$: equivalent resistors of the line and inductor;

${L}_{f}$: inductor in the low-pass filter;

${C}_{f}$: capacitor in the low-pass filter.

For model analysis and controller design, the three-phase voltages, currents, and switching functions can be transformed to a q-d-0 rotating frame. This yields

where

${\text{\theta}}_{e}$ is the transformation angle of the rotating frame and

$f$ denotes voltages, currents, or switching functions.

**Figure 11.**
Equivalent circuit of the low-pass filter.

**Figure 11.**
Equivalent circuit of the low-pass filter.

According to Equations (32) and (35), the voltage equations can be derived as

where

${v}_{qs}^{e}$,

${v}_{ds}^{e}$, and

${v}_{0s}^{e}$ are the q-d-0 axis voltage outputs of the power inverter;

${v}_{qr}^{e}$,

${v}_{dr}^{e}$, and

${v}_{0r}^{e}$ are the q-d-0 axis voltage outputs of the transformers; and

${i}_{qs}^{e}$,

${i}_{ds}^{e}$, and

${i}_{0s}^{e}$ are the q-d-0 axis current outputs of the power inverter. Similarly, the current equations can be derived from Equations (33) and (35) as

where

${i}_{qL}^{e}$,

${i}_{dL}^{e}$, and

${i}_{0\text{L}}^{e}$ are the q-d-0 axis currents on the load side. Equations (37)–(42) were used in this study to design the voltage regulator.

The three-phase source commands can be written as

Therefore, the three-phase source commands in the rotating frame with

${\text{\theta}}_{e}={\text{\omega}}_{e}t$ can be expressed as

where

${V}_{m}^{\text{*}}$ is the peak voltage. Equations (37)–(42) show that the voltage and current equations in the rotating frame are time invariant. Equations (46)–(48) were used to derive the block diagram of the voltage regulator and calculate the voltage comments of the power inverter shown in

Figure 12. The proportional-integral controls for voltage regulators of a power inverter are given by

where

$y$ denotes q, d, or 0;

${k}_{py}$ and

${k}_{iy}$ are the proportional-integral gains of the q- and d-axis voltage regulators. In the following section, an experimental evaluation of the proposed system is described.

**Figure 12.**
Control block diagram of the voltage regulator.

**Figure 12.**
Control block diagram of the voltage regulator.