Analysis of Circuit Configurations Suitable for Self-Supplied AC-DC Converters Using Thin-Film Piezoelectric Generators and Multilayer Energy Storage Supercapacitors

Abstract

The improvement of microelectronic technologies and the practical application of some new materials has resulted in the realization of various highly efficient thin-film energy harvesters in the last few years. Self-powered supplies intended to work with thin-film harvesters have been developed. This type of power supply with integrated various thin-film harvesters has proven to be very suitable for providing electrical energy for wearable electronic sensor systems, with practical applications for implementing personalized medicine through continuously monitoring an individual’s state of health. The application of wearable electronics in medicine will become increasingly important in the next few years, as it can support timely decision-making, especially in high-risk patients. This paper presents a review and comparative analysis of the optimal circuit configurations used to design power supply devices with discrete and integrated components, obtaining electrical power from various thin-film piezoelectric generators, and storing electrical energy in low-power multilayer supercapacitors. Based on an analysis of the principle of operation of the selected circuit configurations, analytical expressions for the basic static and dynamic parameters have been obtained, taking into account the peculiarities of their integration with the biomedical signal processing system. Advantages and weaknesses are analyzed through simulation testing for each configuration, as the prospects for improvement are outlined. Also, for each group of circuit configurations, the key parameters and characteristics of recent high-impact papers, especially those focusing on low-power applications, are presented and analyzed in tabular form. As a result of the analysis of the various circuit configurations, some analytical recommendations have been defined regarding the optimal selection of passive and active elements, which can contribute to a better understanding of the design principles of battery-free power supplies converting electrical energy from some specific recently developed thin-film energy harvesters.

1. Introduction

In the last ten years, there has been an increasing application in developing and using various wearable electronic devices [1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]. These electronic devices are often developed as smartwatches. Medical smart sensors are implemented as fitness trackers and headsets with augmented reality. The goal of developing wearable electronic devices is to provide useful functions that are easily and quickly accessible through visual, audio, and tactile elements, as well as to provide opportunities for the wireless transmission of accumulated data from performed measurement procedures. A critical condition for this electronic device is that it must be very well integrated into the human body so that it does not create discomfort when wearing and using it. The most significant applications of wearable devices are electronic health monitoring modules and the ability to wirelessly transmit the results of precise measurements to health centers for analysis and decision-making. The projected annual growth rate of manufactured wearable electronic devices is approximately 13.5%, from 2024 to 2034. The market capitalization is expected to reach around $635.82 billion by 2034 [16]. This growth has stimulated the creation of improvements in the electronic signal processing system and wireless data transmission, as well as the improvement of the electronic modules, providing an uninterrupted power supply with stable electrical parameters. Like the other electronic signal processing systems and power supply devices, they must be very well integrated with the human body without causing discomfort when wearing them. This means that the power supplies, from a structural point of view, have to be sufficiently small and light in weight. Also, the input electrical energy has to be obtained from the environment in certain conditions, and not from the use of standard rechargeable batteries or implanted batteries. Depending on the electrical current consumption, the necessary batteries remain relatively large in overall size, have a fixed energy density, limited operational lifetime (including for implantable batteries—up to a few years), and some of them have chemical side effects [12,17]. Also, the use of batteries in many practical cases is not applicable because some electronic devices require frequent replacement due to higher consumption, or if the location of the battery is difficult to access. Therefore, in the last few years, devices that obtain electrical energy from piezoelectric, triboelectric, thermoelectric, or photovoltaic generators have been increasingly used. Also, some wearable biofuel cells [1,18,19] are used, in which electrical energy is generated through biochemical reactions, usually involving enzymes or microorganisms that catalyze the oxidation of biofuels, such as glucose or lactate, present in body fluids, such as sweat, tears, saliva, and, in some cases, blood. These devices consist of (bio)anodes and (bio)cathodes separated by an electrolyte reservoir containing the biofluid as an electrolyte. The result is a conversion of chemical energy into a constant electrical voltage, similar to standard fuel cells, but in their case, bio-compatible materials and processes are used. When mechanical deformations occur in the piezoelectric or triboelectric generators, an instantaneous AC voltage is produced between the electrodes. In triboelectric generators, based on the effect of electrostatic induction, when two different materials are in contact and separated, an electric charge accumulates between the two electrodes [20,21,22,23]. For the piezoelectric generators, when mechanical vibrations occur, based on the reverse piezoelectric effect, an accumulation of electric charge is also obtained at the two opposite electrodes, and a current flow is obtained when there is a closed loop [6,24,25,26]. The piezoelectric and triboelectric power generators, from an electrical point of view, can be considered as current sources with a relatively large internal resistance, which can reach several MΩ. The output power for piezoelectric generators reaches up to about 10 μW/cm², and for triboelectric generators it reaches up to 100 μW/cm² [1,27,28]. When using piezoelectric generators for wearable devices, it is important to note that the frequency of mechanical vibrations reaches about 10–20 Hz. Most often, the frequency of mechanical vibrations is lower than the resonant frequency, and the signal is a complex periodic signal containing multiple spectral components [29,30,31,32]. A polarization voltage can also be obtained for some of the higher harmonics, but with an amplitude lower than the amplitude of the fundamental harmonic. Also, the parameters of the piezoelectric generators can vary significantly when the external force changes, especially when the acceleration amplitude and tip mass change. Moreover, these conditions can, in some cases, be limiting, especially in elderly or at-risk patients with poor mobility. In triboelectric generators, the frequency of mechanical vibrations is also around a few hertz, and they can produce high output-power but from a relatively large area of the energy conversion structure [21,33]. As a result, triboelectric energy harvesters are mainly suitable for athletes or people in a relatively good state of health, in which the main vital parameters are studied during physical exertion, such as running, physical exercises with fitness equipment, and others.

The photovoltaic generators convert sunlight directly into electricity based on the photovoltaic effect. For them, the internal resistance varies from several ohms to several tens of ohms, and the output power can vary from 1 μW/cm² to 100 μW/cm² [1,28,34]. In comparison with other structures, photovoltaic generators can provide the highest output power with a relatively small area for energy conversion. Nowadays, a large number of people spend most of their time indoors, where the lighting is not sufficient, and as a result, the efficiency of photovoltaic generators decreases. Also, depending on the specific application, the area of the photovoltaic generator may be unacceptably large for a wearable device. The thermoelectric generators are also very interesting from an application point of view, in which, based on the Seebeck effect, thermal energy is converted into electrical energy. These generators can be considered as DC voltage sources with a small internal resistance of the order of a few ohms. The output electrical power reaches up to 1 μW/cm² [35,36]. According to the Seebeck effect, when a temperature gradient occurs in a thermoelectric material (containing two different p- and n-type semiconductors that are electrically isolated), the free charge carriers (electrons and holes) diffuse from the hot junction to the cold ends of the two semiconductors. Then, it forms a closed loop electrical current flow. In the context of wearable electronic devices, thermoelectric generators are well-suited due to their ability to use the body’s inherent heat to provide the power supply voltage for the rest of the electronic modules used for signal processing. A weakness of thermoelectric generators and wearable biofuel cells is the relatively low electrical energy that can obtained. Also, wearable biofuel cells sometimes require the use of a relatively large area of the harvester for energy conversion.

In the last few years, energy harvesting systems, which are a specific combination of a piezoelectric, triboelectric, or thermoelectric generator and a low-power (or micro-power) supercapacitor [28,37,38,39], have been generated particular interest. As a result, energy systems of the “all-in-one” type have been obtained, through which a greater value for energy efficiency can be achieved, since the produced electrical energy is directly transferred to the energy storage element. Also, smaller overall sizes can be obtained with this structure, and some simplification of the power conversion interface circuit can be obtained.

An analysis of the available literature shows a vast variety of techniques for designing interface electronic circuits [21,22,27,40,41,42,43,44,45,46,47] that convert electrical energy from the various energy harvesters discussed above in this section. Moreover, the research community’s interest in interface circuits is very high, as most of them need to provide electrical energy for low-power standalone portable and wearable electronic devices. For example, such devices are wireless sensor networks, implantable electronic modules, and Internet-of-Thing sensors, which include various modules, such as low-power sensors, data processing (with ADCs/DACs, MCUs, and programmable SoCs), wireless transmission modules, and, in some cases, low-power display. All these electronic devices, for their efficient operation, mainly require high stability of the supply DC voltage and current in relatively wide temperature ranges, load capacity in a set range, and long-term continuity of the operation. In fact, the interface electronic circuits or power management circuits (PMCs) represent power supplies for portable and wearable electronics that must provide the functionality described above. Under these conditions, in general, the power supplies must have low current consumption, i.e., a high value of energy efficiency. They have to provide impedance matching with the signal source and the energy storage element (such as an electrolytic capacitor or supercapacitor), and include a cold startup circuit with the ability to reduce consumption in dynamic operational mode. Also, they have small sizes and weight to ensure better integration with the rest of the electronic system. The review of the literature showed the lack of systematization of circuit configurations and their suitability for developing low-power or micro-power supply devices. On the one hand, this is due to the difficulty of theoretically enveloping the problem due to the presence of a large number of design approaches and techniques. Also, micro-power supply devices have circuitry that differs significantly from the principles of building power sources that are designed to provide a large output current (>100 mA) and relatively large values for the supply voltage. On the other hand, in the last few years, a relatively large number of commercially available integrated circuits have been developed that have the functionality of low-power devices in a single chip [48,49,50,51]. In many cases, these integrated circuits are suitable and can replace custom electronic circuits. However, there are also several practical cases, such as those described above [37,38,39], where it is not possible to use the commercially available integrated circuits or, depending on the parameters of the energy harvesting generator or the external load, a custom power supply device has to be built with certain electrical and structural parameters [22,23,25,26].

In this work, analyzing the advantages and some disadvantages of various energy harvesters, the piezoelectric elements were found to be optimal in terms of their electrical and structural parameters. Moreover, by analyzing known approaches to the construction of low-power power supply devices and relatively simple theoretical analyses, the authors have tried to clarify the processes in the static and dynamic operational modes of the most frequently used piezoelectric energy harvesting circuit configurations with discrete and integrated elements. The authors also aimed to define some recommendations for selecting component values for a given configuration.

This paper is organized as follows: Section 2 presents the structure and operating principle of thin-film piezoelectric generators intended for wearable electronic devices. Section 3 presents the structure and basic materials of the thin-film supercapacitors designed for piezoelectric energy harvesters. Section 4 presents a theoretical analysis of AC-to-DC voltage converter circuit configurations used as input stages in thin-film piezoelectric generator power sources. Moreover, in Section 4, based on the study, the authors have defined advantages and disadvantages for each configuration, supporting the circuit design process. Section 5 describes the structure and operating principle of SSHI (Synchronized Switch Harvesting on Inductor)-based energy harvesting circuits. Based on the presented analysis, an electronic circuit has been studied, providing an increase in the output voltage level and additional boosting circuit when using the SSHI technique with an output-coupled inductor booster. The structure and principle of operation of a typical schematic diagram of a CMOS Low-dropout (LDO) regulator is shown in Section 6. Also, Section 6 presents a comparative analysis of key parameters for selected custom LDO designs and a review of commercially available IC of LDOs, suitable for the design of wearable power supply devices. Finally, the concluding remarks of this paper and directions for future work are given in Section 7.

2. Thin-Film Piezoelectric Generators for Wearable Power Supplies

The field of thin-film piezoelectric generators (TFPGs) for wearable power supplies has witnessed significant advancements in recent years, driven by the increasing demand for flexible, lightweight, and efficient energy harvesting systems. These systems are particularly relevant in the context of wearable electronics, where the integration of power sources with minimal bulk and weight is crucial. While the main focus of this paper is on the circuit configurations intended for systems that supply power for wearable devices, this section aims to give a general idea about the structure, materials, and fabrication process of the piezoelectric converting elements, serving as a source of signal for the circuits under consideration. It is based on selected up-to-date literature in the field and presents typical values of the generated power at stereotypical motions, and respective mechanical loads from prototypes that are proven applicable in wearable technology. Recent developments have led to the creation of self-powered wearable devices that can monitor physiological parameters, such as heart rate and motion, without the need for external power sources [52]. The up-to-date values from a single energy harvester, when worn and subjected to ~8 km/h movement, generate ~27 mW. This corresponds to a power density of 0.3 W/kg at an excitation frequency of 3 Hz and is typical for human motion. Experimental results demonstrate the power generation capabilities of sensor wearable devices [53].

Recent studies have focused on various piezoelectric materials, including zinc oxide (ZnO) and lead zirconate titanate (PZT), which are commonly used in TFPGs due to their favorable piezoelectric properties. Although they are well known, the efforts for their enhancement continue. The effects of crystallographic orientation and doping for bulk interfacing on the output current of the easy tunable ZnO thin films reveal that the piezoelectric response diminishes under excessive mechanical stress, which is critical for optimizing device performance under real-world conditions [54]. For example, it was found that the composition of 10 wt% NiO in ZnO yielded 65 V and 4.1 µA under a 30 N load at 4 Hz, which corresponds to a power density of 37.9 µW/cm². The practical utility of the optimized TFPG has been demonstrated by charging capacitors and powering display devices [55]. PZT thin film and organic P(VDF-TrFE) membrane was fabricated using a straightforward layer-by-layer approach. To achieve flexibility, PZT films were deposited on two-dimensional mica substrates (Figure 1). The resulting composite converts external strain into electrical signals, generating an output voltage of 4 V and a current of 180 nA under 60° bending-releasing cycles, which is applicable for monitoring daily physiological motions.

The flexibility of the substrate plays a crucial role in enhancing the piezoelectric response. Ali et al., noted that ZnO films on flexible PET substrates exhibited superior piezoelectric currents compared to those on rigid glass substrates [56]. Similarly, the deposition conditions and temperature of growth affect polymeric fibers from poly (vinylidene fluoride) (PVDF), resulting in variation in their diameter from 228 nm to 1315 nm (Figure 2) and, respectively, enhanced the piezoelectric coefficient d₃₁ by approximately six times [57].

The incorporation of two-dimensional (2D) materials, such as graphene and transition metal dichalcogenides (Figure 3a–d), has shown promise in improving the piezoelectric properties and flexibility of devices [58]. These materials exhibit high mechanical strength and, in addition, can combine sensing and harvesting functions (Figure 3e–g) [59].

The integration of piezoelectric materials into wearable devices has been facilitated by advancements in nanogenerator technology. Song et al. reviewed the progress in flexible nanogenerators, emphasizing their ability to convert mechanical energy into electrical energy effectively being bio-piezoelectric materials, such as fibrillar proteins (collagen, chitin, and elastin), bioactive polymers, such as poly (lactic acid) (PLLA), poly (lactic acid) γ-Benzylglutamic acid (PBG), and cellulose [60]. This capability is particularly advantageous for self-powered systems, where an implantable continuous energy supply is essential. Some of the reported materials are implemented in structures, exhibiting an output voltage of ~85 V, and a short-circuit current of ~1.6 μA. The power density reaches 4115 μW/cm³ at specific activating conditions.

The integration of piezoelectric materials into textiles has gained attention, allowing for the development of smart fabrics that can harvest energy from everyday movements. Recent studies have focused on weaving piezoelectric fibers into textiles, enabling the creation of wearable energy harvesting systems that are both functional (Figure 4a,b) [61] and esthetically pleasant (Figure 5) [62]. The PVDF/KNN nanocomposite filament-based PENG demonstrated significantly enhanced electrical performance compared to pure PVDF and PVDF/BT counterparts. Under specific loading conditions, the nanocomposite generated a peak voltage of 3.7 V and a current of 0.326 µA, while the pure PVDF filament yielded a peak voltage of only 1.9 V. The incorporation of reduced graphene oxide rGO in PVDF/PU-based PENG exhibited a power density of 66.39 mW/m² under a constant load and frequency of 3.82 N and 2.5 Hz, respectively. A new functionality such as washing ability is expected from the textile-based piezoelectric thin-film generators. To reduce the effect of the water on the generator’s performance, a piezopolymeric device with plasma treatment has been developed, rendering the surface superhydrophobic and self-cleaning [63]. After immersion in water, an output voltage of 3.50 V, a current of 241 nA, and an increase of approximately 30% in the piezoelectric performance were measured in comparison to that of the untreated surface. These innovations in fabrication techniques are crucial for the commercialization and widespread adoption of thin-film piezoelectric generators in wearable technology.

The fabrication techniques for flexible piezoelectric films have also evolved, with various methods being employed to enhance their performance. Zhen et al. provided a comprehensive overview of fabrication techniques such as sol–gel, hydrothermal, and electrospinning, emphasizing their suitability for producing flexible inorganic piezoelectric films (Figure 6) [65].

This versatility in fabrication allows for the tailoring of material properties to meet specific application requirements. For example, the PMN-PT-based energy harvester can conform to the intricate surface of the heart muscle, generating a substantial 2.7 μJ of power, sufficient to drive a cardiac pacemaker. As per the laser lift-off, under optimal conditions, the device delivered a maximum current of 35 µA and a voltage of 200 V at significant bending. Furthermore, Yeo et al. highlighted the advantages of using PZT films on flexible metal foils, which enable energy harvesting from low-frequency mechanical excitations. This is a common scenario in wearable applications such as wrist-worn devices with a maximum generated power of 201 μW and with a maximum voltage of 1.85 V obtained at a load resistance of 17 kΩ [66]. Recent advancements in electrospinning techniques have enabled the production of nanofibrous piezoelectric membranes that exhibit superior flexibility and high surface area, which are critical for wearable applications [67]. Additionally, the use of 3D printing technologies has facilitated the creation of complex geometries and structures that can optimize the performance of piezoelectric devices [68].

The typical values for piezoelectric elements [54,69,70,71,72,73,74] used in wearable energy harvesters in recent years are presented in

Table 1. Typical values for piezoelectric elements used in wearable energy harvesters.

Parameter/Ref.	[69]	[70]	[71]	[72]	[54]	[73]	[74]
Power Generation Capability (mW)	243	22.8	2.3	43	37.9	8.34	6.62
Thickness (µm)	50	235	2	100	6	0.5	7
Force/Mass Loading	0.5 N vibration	10 N pressure	1% strain	15 N	30 N	30 kg	1.75 g
Material Used	PVDF/ BaTiO3	PVDF/ KNN	Nb0.02Pb (Zr0.6Ti0.4)O3	EDABCO-CuCl4@PVDF	NiO: ZnO	PZT	PVDF-TrFE
Fabrication Techniques	Electro-spinning	Electro-spinning	Spin-coating	Spin-coating	Spin-coating	Sputte-ring	Spin-coating
Frequency (Hz)	15.7	7	1	5	4	2	5

.

PVDF has good strain recovery and can endure cyclic loading, but it may degrade due to UV exposure or moisture over time, necessitating protective coatings. BaTiO₃ may be prone to mechanical fragility, and its long-term performance can be affected by thermal cycling and stress fatigue. A composite between PVDF and barium titanate results in maintaining good mechanical flexibility while benefiting from the high piezoelectric activity. Barium titanate can improve the thermal stability of the composite material, allowing it to perform better under varying temperature conditions compared to PVDF alone. It shows relatively good resistance to mechanical fatigue, but its brittleness can be a concern over time in dynamic environments. For wearable applications, it must be combined with a flexible polymer, therefore, PVDF is among the most suitable options. The modified PZT material exhibits enhanced piezoelectric properties combined with improved electric properties due to the incorporation of niobium. This composite provides better mechanical resilience than standard PZT, but is still subject to fatigue under repeated stress, and for this reason it is preferred for transducers not requiring multiple bending conditions. The incorporation of copper complexes in PVDF enhances the conductivity, but the long-term stability against moisture and oxidation is also a consideration. Such a composite is useful in smart textiles where conductive properties are beneficial, but care must be taken regarding material stability, especially when washing. NiO:ZnO has relatively strong piezoelectric properties and is known for good electrochemical stability. PZT has excellent energy conversion efficiency, it is relatively brittle and can suffer from fatigue with prolonged mechanical cycling. PVDF-TrFE is a copolymer, which enhances the piezoelectric effects of PVDF with improved mechanical properties and sensitivity. Regarding its long-term stability, it is superior to PVDF.

Most researchers have focused on using electrospinning and spin-coating for fabrication of the piezoelectric coatings, as can be seen from Table 1. Electrospinning involves drawing a polymer solution (e.g., PVDF) through a charged needle, producing fine fibers. The fibrous structure can improve the mechanical flexibility and toughness of the composite. Spin coating involves depositing a liquid solution of the composite onto a substrate, which is then rapidly spun to spread the liquid evenly, forming a thin film as the solvent evaporates. The process is relatively simple, making it suitable for large-scale production and integration into the existing manufacturing processes. The resulting films have excellent surface smoothness, which is beneficial for applications requiring precise contact between layers (e.g., in multilayer devices). Electrospinning can be more complex and may require more optimization to control fiber diameter and uniformity.

Once fabricated, the piezoelectric element has to be connected with the processing circuit. Power management systems can regulate the flow of energy between the PENGs and storage devices, ensuring that energy is efficiently captured, stored, and utilized. Details related to these systems will be discussed in the next sections of the paper.

3. Multiplayer Supercapacitors, Designed for Piezoelectric Energy Harvesters

The intermittent nature of piezoelectric energy generation often leads to energy loss during periods of low mechanical input. By incorporating thin supercapacitors, the energy generated can be stored and utilized during these low-input periods, thus reducing energy loss. This capability is particularly beneficial in wearable applications, where energy demands can fluctuate significantly. By providing a buffer for energy fluctuations, these systems can maintain a consistent power output (Figure 7), which is essential for applications in health monitoring and other critical areas [75]. Thin supercapacitors have emerged as a promising technology for this purpose, offering the advantages of high power density, rapid charge–discharge capabilities, and long life [76]. This section will explore the latest studies on thin supercapacitors, emphasizing their integration with piezoelectric generators to create efficient energy harvesting systems with reduced energy loss and enhanced system reliability. Recent research has focused on developing thin supercapacitors that are lightweight and flexible, because these advancements are crucial for wearable devices and portable electronics, where space and weight constraints are of the greatest importance.

The alternate periodic nature of energy generation from PENGs necessitates the incorporation of efficient energy storage solutions to ensure a stable power supply for wearable devices. Supercapacitors have emerged as a promising energy storage solution for wearable applications due to their high power density, rapid charging capabilities, and long life cycle [77]. Recent advancements in flexible supercapacitor technologies have focused on developing lightweight and conformable devices that can be easily integrated with PENGs. For instance, the use of novel materials such as MXene and graphene in supercapacitor electrodes has led to significant improvements in energy storage performance, making them suitable for wearable applications [78]. These materials not only enhance the electrochemical performance of supercapacitors but also provide the necessary flexibility and durability required for integration with wearable devices. Shimada et al. demonstrated a correlation between the inserted in MXene elements with specific atomic number and their effect on the double-layer capacitance, which can explain the superior storage performance of these devices [79]. Additives like cobalt are also favorable for the supercapacitor electrochemical performance by synthesizing a composite (Co-MXene) (Figure 8) [80]. The results show that Co-MXene exhibits higher specific capacitance (up to 1200 F/g vs. 300 F/g for pristine MXene) and better rate capability. This is due to the synergistic effect between the high conductivity of MXene and the redox activity of cobalt.

The choice of materials is critical in enhancing the performance of thin supercapacitors. The researchers have explored various electrode materials, including carbon-based materials, conducting polymers, and transition metal oxides due to their high surface areas and conductivity, which facilitate efficient ion transport and charge accumulation (Figure 9). For instance, in [81] it has been demonstrated that using graphene oxide as an electrode material significantly improved the specific capacitance and energy density of the supercapacitor. Additionally, hybrid materials (MXenes) and those combining conducting polymers with carbon nanotubes have shown promise in achieving higher capacitance values while maintaining flexibility [82,83].

Innovative designs have also contributed to the advancement of thin supercapacitors. Researchers have developed novel architectures, such as 3D porous structures, which further enhanced the surface area available for charge storage (Figure 10).

Some authors have reported a 3D printed supercapacitor design that achieved a specific capacitance of 1.48 F/cm² while remaining lightweight, flexible, and relatively stable after 500 charge–discharge cycles [86]. Furthermore, the integration of supercapacitors with piezoelectric generators has been explored to create joint self-sustaining energy systems on the same flexible substrate without external connection (Figure 11). This integration allows for the efficient storage of energy generated during mechanical vibrations with direct electrical transfer, thereby enhancing the overall energy efficiency of the system [87].

Repeated deformation can cause fatigue in the electrode materials, leading to cracking, delamination, and reduced performance over time. The choice of substrate, electrode materials (e.g., their flexibility, conductivity, and adherence to the substrate), and packaging is critical in mitigating these issues. Research is currently focused on more robust materials and designs that withstand mechanical stress. A broadly accepted approach is nanostructuring and nanocoposite formations with elastic polymers such as polyurethane to enhance flexibility. Adding crosslinking agents where possible also improves the mechanical stability of the polymer chains. Graphene and other carbon-based materials are often hybridized with other 2D materials like MXenes. Three-dimensional architectures, such as those using porous scaffolds or interconnected networks of nanomaterials, offer superior flexibility and mechanical resilience. Details about the approach toward achieving long-term stability at bending and improve the applicability in wearable devices can be found in [85,89,90]. The substrate must be flexible, durable, and provide good adhesion for the electrode materials. Mismatch in thermal expansion coefficients between the substrate and electrodes can lead to delamination. Polyimide (PI) offers excellent flexibility and thermal stability, but can be expensive, while polyethylene terephthalate (PET) is cost-effective and flexible, but exhibits limited thermal stability. Therefore, suitable alternatives are be elastomers (e.g., polydimethylsiloxane (PDMS)), which are stretchable and preferable for applications requiring significant deformation. In addition, this solves the problem of protecting the device from environmental factors (moisture, oxygen) and mechanical damage, because it must also be biocompatible for wearable applications [91,92].

Exposure to sweat, moisture, and other bodily fluids presents a significant challenge. Electrolytes can be affected by the chemical composition of these fluids, altering their performance. Moreover, these factors can increase the corrosion of electrodes and reduce the lifespan of the device. Encapsulation and the use of protective coatings are essential to safeguard supercapacitors. Hermetic sealing within a polymer film, embedding in a flexible polymer matrix, and incorporating protective layers, are among the approaches to mitigate this effect. For example, conformal coatings using parylene or epoxy resins are commonly used to create a barrier against moisture and chemicals [93,94].

The performance of thin supercapacitors is typically evaluated based on specific capacitance, energy density, power density, and cycle stability. Recent studies [90,95,96,97,98,99] have reported significant improvements in these metrics (

Table 2. Performance metrics of thin-film supercapacitors for piezoelectric harvesters.

Metric	Typical Values	Most Recent Reference
Gravimetric capacitance	100–600 F/g	[90,95]
Energy Density	1 to 50 Wh/kg	[96]
Power Density	10 to 10,000 W/kg	[97]
Cycle Life	50,000 to 110,000 cycles	[98]
Internal Resistance	<1 Ω	[99]
Operating Voltage Range	2.5 to 5 V	[99]
Charge/Discharge Time	Seconds to minutes	[99]

). For example, Swain et al. [90] have developed a thin supercapacitor that exhibited high gravimetric capacitance of 150 F/g, an energy density of 49.8 Wh/kg, and excellent cycle stability of 70% over 10,000 cycles. These advancements are crucial for applications requiring reliable and long-lasting energy storage solutions.

4. Electronic Circuits Used to Convert AC to DC Voltage

4.1. Circuit Configurations with Discrete Components

4.1.1. Standard Diode Bridge Rectifier

To build the power supplies for wearable electronic modules and systems, as shown in Figure 7, it is necessary to convert the AC voltage produced by the piezoelectric generator (or piezo harvesters) into a DC voltage using a rectifier and then use a DC-DC regulator to obtain a stabilized voltage. In this case, the collected electrical energy has to be transferred to supercapacitors to ensure the continuous operation of the powered wearable devices. As shown in Figure 7, two DC-DC converters are most often used, and they are generally connected in cascade before and after the energy storage elements. In this way, when there are periods of low physical activity in the patients, the supercapacitors can provide a supply voltage in the discharge mode of operation.

The basic electronic circuit used to convert AC voltage generated from piezoelectric elements to DC voltage is the standard diode bridge rectifier [100,101,102]. In fact, this bridge rectifier is used as a basic circuit configuration that has found extensive application in many interface circuits that convert electrical energy from various thin-film piezoelectric or triboelectric generators. This rectifier is used as a basic configuration against which all other rectifiers, which have multiple improvements, are compared. An electronic circuit of a diode bridge rectifier with a connected source of an input signal, for example, a piezoelectric generator (represented as an ideal current source and in parallel with it a parasitic capacitance C_o) and a connected external load with an impedance determined by R_L and C_L is shown in Figure 12a. The capacitance C_L is assumed to be large enough so that the output voltage is essentially constant. To illustrate the principle of operation in Figure 12b, time diagrams are given including the current i_p with approximately sinusoidal waveform, the voltage drops v_p across the capacitance C_p, and the current i_o through the external load. For this analysis, it is assumed that the internal parasitic resistance r_p is of sufficiently large value (or r_p → ∞) and can be neglected. During the time interval from the initial moment to t₁, the capacity C_p is charged. In this time interval, all diodes are reverse-biased, and no current flows to the output of the circuit. This process continues until the voltage reaches a value:

$$V_{p,m}=V_{RECT}+2V_D,$$

(1)

where $V_{RECT}$ is the output rectified voltage and $2V_D$ is twice the value of the diode forward voltages.

During the time interval from t₁ to t₂, current flows to the output network. Therefore, at internal resistance r_p → ∞, it can be written as [101]

$$i_o(t)=\{\begin{array}{l}0,\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}at\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}0\le \omega t\le \omega t_1\\ {\displaystyle \frac{C_L}{C_L+C_P}}|I_P\sin \omega t|,\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}at\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\omega t_1\le \omega t\le \omega t_2,\end{array}$$

(2)

where $\omega t_2=\pi$ and ω is the frequency of the mechanical vibrations.

Assuming that C_L >> C_P, most of the generated current will flow to the output of the circuit. In this case, the parasitic capacitance of the C_P will be a smaller value. Then, we can obtain

$${\displaystyle \frac{C_L}{C_L+C_P}}{I}_P\approx I_P.$$

(3)

For the average value of the output current at $C_L>>C_P$, $R_L\ne \infty$ and r_p → ∞, we obtain

$$I_o={\displaystyle \frac{1}{\pi }}{\displaystyle \underset{\omega t_1}{\overset{\pi }{\int }}{I}_P\sin \omega t}d\omega t={\displaystyle \frac{1}{\pi }}{I}_P+{\displaystyle \frac{1}{\pi }}{I}_P\cos \omega t_1.$$

(4)

To determine the component $\cos \omega t_1$, the formula for the rectified voltage $V_{RECT}$ is used, according to the following [100,101,102]

$$v_p(t_1)=V_{RECT}={\displaystyle \frac{1}{\omega C_P}}{\displaystyle \underset{0}{\overset{\omega t_1}{\int }}{I}_P\sin (\omega t})d\omega t+\stackrel{0}{\overbrace{v_p(0)}}={\displaystyle \frac{1}{\omega C_P}}{I}_P(1-\cos \omega t_1).$$

(5)

When solving expression (5) with respect to $\cos \omega t_1$ we find

$$\cos \omega t_1=1-{\displaystyle \frac{V_{RECT}\omega C_P}{I_P}}.$$

(6)

After substituting Formula (6) into the analytical expression (4) for the output current, we obtain

$$I_o={\displaystyle \frac{2}{\pi }}{I}_P-{\displaystyle \frac{1}{\pi }}{V}_{RECT}\omega C_P.$$

(7)

According to Formula (7), with a larger value of the inter-electrode capacitance of the piezoelectric element, a smaller average value of the output current is obtained, and hence, a smaller value for the power.

The average value of the electrical power that is obtained from the piezoelectric generator under a no-load condition yields

$$P_{av}={\displaystyle \frac{1}{T}}{\displaystyle \underset{0}{\overset{T}{\int }}{V}_{RECT}{i}_o(t)dt}={\displaystyle \frac{1}{2\pi }}{V}_{RECT}{\displaystyle \underset{\omega t_1}{\overset{\pi }{\int }}{I}_P\sin \omega td}\omega t,$$

(8)

where it is substituted $dt={\displaystyle \frac{d\omega t}{\omega }}$ and $T={\displaystyle \frac{2\pi }{\omega }}$.

Then, for the power the following expression is obtained

$$P_{av}={\displaystyle \frac{1}{2\pi }}(2I_P{V}_{RECT}-V_{RECT}^2\omega C_P).$$

(9)

The maximum value of the extracted average power is obtained by equating the first derivative of the power expression to zero (or ${\displaystyle \frac{dPav}{d{V}_{RECT}}}=0$), at which we find $V_{RECT}={\displaystyle \frac{I_P}{\omega C_P}}$, then

$$P_{av,\max }={\displaystyle \frac{1}{2\pi }}{V}_{RECT}^2\omega C_P.$$

(10)

If $r_p\ne \infty$, the output voltage decreases. To determine the output voltage decreases due to the load, the capacitance of the capacitor C_L is initially assumed to be infinitely large. Then, the output rectified voltage has a constant value, which is defined as $V_{RECT\infty }$. When reducing the resistance R_L, i.e., when the load increases, the time to recharge the capacitor C_L increases. A steady state is reached when the input charge on the capacitor is equal to the output charge, then the output voltage can be written as [103]

$$V_{RECT\infty }=V_{RECT}\left(1-\sqrt{{\displaystyle \frac{r_p}{2R_L}}}\right),$$

(11)

where $R_L=V_{RECT\infty }/I_L$ is the load resistance.

Then, for the output current, the following expression is obtained [103]

$$I_o={\displaystyle \frac{V_{RECT}}{\sqrt{2r_p{R}_L}}}.$$

(12)

As can be seen, the output current depends on the internal resistance r_p, and it is desirable to have a relatively small value. This means that the conductive electrodes located on the outer sides of the thin film energy harvesting generators must have the lowest resistance possible, otherwise the output current can be limited.

From a practical point of view, it is essential to determine the output current I_L through the external load R_L, because based on I_L, the power delivered to the load and the electrical energy efficiency of the rectifier can be determined. In the condition that an external resistance R_L is included in the output port of the rectifier and the grounded capacitor C_L is initially assumed to be infinitely large, according to [93] the I_L can be determined from the following analytical expression:

$$I_L={\displaystyle \frac{\frac{2}{\pi }{I}_P-\frac{4}{\pi }{V}_D\omega C_P}{1+\frac{2}{\pi }{V}_{RECT}\omega C_P{R}_L}}.$$

(13)

Then, according to [104], the output power (taking into account the power dissipation P_D of the diodes) is obtained as

$$P_{out}=\underset{P_L}{\underbrace{I_L^2{R}_L}}+\underset{P_D}{\underbrace{2V_D{I}_L}}={\left({\displaystyle \frac{\frac{2}{\pi }{I}_P-\frac{4}{\pi }{V}_D\omega C_P}{1+\frac{2}{\pi }{V}_{RECT}\omega C_P{R}_L}}\right)}^2{R}_L+2V_D\left({\displaystyle \frac{\frac{2}{\pi }{I}_P-\frac{4}{\pi }{V}_D\omega C_P}{1+\frac{2}{\pi }{V}_{RECT}\omega C_P{R}_L}}\right).$$

(14)

Based on an analysis of Formula (14), the maximum value of the load power P_L can be obtained by differentiating the analytical expression concerning the resistance R_L and equalizing it to zero or ${\displaystyle \frac{d{P}_L}{d{R}_L}}=0$. For the optimal value of resistance, R_L is found

$$R_{L,opt}={\displaystyle \frac{\pi }{2}}\times {\displaystyle \frac{1}{\omega C_p\left(1+\frac{2V_D}{V_L}\right)}}.$$

(15)

Then, in case the parasitic capacitance C_p can be neglected, the maximum value of the power is obtained as

$$P_{L,\max }={\left({\displaystyle \frac{2}{\pi }}{I}_P\right)}^2{R}_L.$$

(16)

According to Formula (16), it follows that greater output power can be obtained with a greater polarization current I_p and a smaller value of the voltage drop V_D on the rectifier diodes.

The analysis of Formula (16) shows that the optimal value of the resistance R_L depends on the voltage drop across the diodes, the angular frequency ω of the current source i_p, and the parasitic capacitance C_p. With a small value of the capacitance C_p, a larger value of the output voltage can be obtained. Also, with a small value of the voltage V_D, the output voltage will be larger. In terms of the value of the angular frequency, a higher current and correspondingly higher power are obtained when the piezoelectric element reaches resonance. In this case, an optimal load is determined for a given frequency.

A superposed ripple voltage occurs over the load for a finite value of the output filter capacitor C_L. The peak-to-peak pulsating voltage swing is calculated from the charge delivered by the capacitor during the discharge time t_d [103] using the following:

$$V_{L,p-p}={\displaystyle \frac{I_L{t}_d}{C_L}}={\displaystyle \frac{\pi I_L}{\omega C_L}}\left(1-\sqrt[4]{{\displaystyle \frac{r_p}{2R_L}}}\right),$$

(17)

where $t_d={\displaystyle \frac{\pi }{\omega }}\left(1-\sqrt[4]{{\displaystyle \frac{r_p}{2R_L}}}\right)$ is the time interval determined by the frequency of the mechanical vibrations.

Then, based on Formula (16), an appropriate value of the capacity of the C_L can be found at certain parameters for the energy harvesting generator and the external load [103]:

$$C_L={\displaystyle \frac{\pi I_L}{\omega V_{L,p-p}}}\left(1-\sqrt[4]{{\displaystyle \frac{r_p}{2R_L}}}\right).$$

(18)

The following approximate relationship for voltages can be used to determine the voltage [92] $V_{L,p-p}$:$V_{L,p-p}\approx {\displaystyle \frac{3}{2}}(V_{RECT\infty }-V_{L,\min })$, where $V_{L,\min }$ is the minimum value of the output voltage for a specified load R_L.

The analysis of Formulas (5) and (7) shows that the average value of the output current and the value of the rectified voltage depend on the polarization current I_P, which is generated by the piezoelectric element. In this case, the change in the frequency of the mechanical vibrations leads to a change in the current I_P, and hence to a change in the values of the quantities in the output network. Also, as can be seen from Formulas (11) and (12), changing the parameters of the external load reduces the value of the rectified voltage and current. One possible way to reduce the variations in the output voltage is to connect a capacitor C_L in parallel to the output. In this case, the output voltage is smoothed, reducing the ripple. However, to a large extent, energy harvesting generators are unstable, resulting in variations in output voltage and current. Simultaneously, all electronic signal processing circuits for wearable electronic devices require stable values for the supply voltage and current. This requires energy storage elements such as electrolytic capacitors, supercapacitors (formerly called ultra-capacitors), and even in some cases miniature rechargeable batteries to be added to the energy harvesting and conversion circuits.

In order to facilitate the achievement of the optimum voltage at the output of the rectifier, a low-power DC-DC converter is most often added, as shown in Figure 13. As can be seen in Figure 13, the low-power DC-DC converter is connected between the rectifier output and the energy storage element. Typically, the internal controller of this type of converter is designed to regulate the output voltage to provide an optimal mode for charging the storage element. It is noteworthy that in several wearable electronic devices, commercially available energy harvesting circuits, such as the example electronic devices in the previous section, are already used as DC-DC converters. For some of them, since the energy obtained from the energy harvesting generators is unstable, it is recommended that the energy storage element be connected immediately after the rectifier. Then, the voltage conversion is carried out, as in their output port small electrolytic capacitors are connected.

The basic electrical parameter that is related to the workability of the DC-DC converters is the overall electrical energy efficiency (or power conversion efficiency), which can be obtained by using the following analytical expression:

$$\eta ={\displaystyle \frac{P_o}{P_{in}}}\times 100\%,$$

(19)

where $P_{in}$ is the input power and $P_o=V_{STOR}^2/R_L$ is the output power of the converter and R_L is the external load.

Also, for the AC-DC converter circuits, the efficiency of a certain configuration can be evaluated by the so-called figure of merit or simply FoM. This parameter can be calculated as the ratio of the output power $P_o$ that can be delivered from the storage element (rechargeable battery or supercapacitor) to the maximum average power ${\widehat{P}}_{PEH,\max }$ that can be obtained from the piezoelectric element, provided that the lossless rectifier ($V_D\approx 0V$):

$$FoM={\displaystyle \frac{P_o}{{\widehat{P}}_{PEH,\max }}}={\displaystyle \frac{P_o}{C_{p}f{V}_{p,\max }^2}}.$$

(20)

A far more optimized solution was presented in the work of Aktakka et al., where the diodes were substituted with a set of NPN and PNP transistors [40]. If these transistors are properly chosen, the power losses over them will be drastically limited ($r_{ce}$ should be as low as possible). The substitution and resulting change in the base piezoelectric element structure are shown in Figure 14.

To validate the efficiency of such a design solution, we ran a few brief simulations on LTSpice by using SPICE models of existing BJT transistors and Schottky diodes. To perform the simulation study, simulation models of discrete components were used, 2N3904 (ON Semiconductor Corporation, Scottsdale, AZ, USA) was used for NPN transistors, and 2N2905A (STMicroelectronic, Geneva, Switzerland) was used for PNP transistors. PMEG2010AEB (Nexperia, Nijmegen, The Netherlands) was used for the Schottky diodes. The parameters of the load were selected with the following values: $R_L=1$ kΩ and $C_L=10$ μF. Figure 15 shows the results from the simulation. It shows that by substituting the Schottky diodes with bipolar transistors a noticeable increase in the rectifier’s output voltage can be observed.

The results from the simulated evaluation of the two circuits show that the addition of a BJT rectifier improves the circuit’s overall performance by decreasing the voltage losses. It can be seen that the Schottky diode rectifier’s output voltage reaches a maximum voltage of around 0.7 V at 1 V sine input, whilst the BJT rectifier reaches an output voltage in the vicinity of 0.95 V.

4.1.2. Voltage Doubler Rectifier

For most thin-film energy harvesters, the generated signal is at a relatively small level (up to about a few hundred mV, obtained through single samples [105,106,107,108,109,110,111]). Therefore, increasing its value is necessary to provide the required voltage for subsequent stages and functional parts of the converters. An optimal electronic circuit for increasing the level of the rectified voltage, in this case, is a voltage doubling rectifier, which contains most frequently two low-power Schottky diodes and two capacitors, one of which C₁ is connected in series to the piezoelectric generator, and the other C₂, connected in parallel to the load (Figure 16 [112,113]). A higher value for the output voltage level can be obtained by using a rectifier with a quadrupling of the output voltage (voltage quadrupler circuits [112,113]), but in this case, the number of diodes increases, and hence the energy efficiency coefficient decreases.

For the principle of operation of the rectifier during the first half-cycle (or negative half-period), and for the polarity of the voltage outside the brackets, the piezoelectric current passes through the diode $D_1$ charging the capacitor $C_1$ to the voltage $V_{C1}=V_{pm,0}$. For the first half-cycle, the $D_1$ is in forward mode of operation. During the second half-cycle (or positive half-period) the input voltage (signs in brackets) reverses polarity. The $D_1$ is turned off, and the sum of the capacitor voltage and the amplitude of the input voltage is applied to it. During the second half-cycle, the $D_2$ is turned on and the $C_2$ is charged, with the capacitor $C_1$ transferring part of its electrical energy until reaching a voltage equal to the sum of the input voltage and the voltage of $C_1$. Then, the voltage drop of the $C_2$ (at no load (R_L → ∞), yields $V_{C2}=V_{pm,0}+V_{C1}\approx 2V_{pm,0}$.

The basic waveforms of the currents and voltages [102], representing the operation of the voltage-doubler rectifier (Figure 16) are given in Figure 17. The output voltage $v_o$ is similar to the waveform of the load voltage for the bridge rectifier (Figure 15), as it is observed charging of the capacitor C₂ through the input signal, and as a result of this process, the level of the output voltage is slightly greater or slightly less than the average value. For larger values of capacitances (C₁ and C₂), smaller variations in output voltage are expected, and at higher frequencies of mechanical vibrations, smaller deviations may occur.

Provided that no load R_L is connected at the output port of the circuit, the piezoelectric sinusoidal current fully charges the capacitance C_p (starting from zero voltage over the C_p or the initial condition is $v_p(0)=0$), and the peak no-load voltage is obtained as

$$v_p\left({\displaystyle \frac{T}{2}}\right)={\displaystyle \frac{1}{\omega C_P}}{\displaystyle \underset{0}{\overset{\frac{\pi }{\omega }}{\int }}{I}_P\sin (\omega t})d\omega t+\stackrel{=0}{\overbrace{v_p(0)}}=2{\displaystyle \frac{I_P}{\omega C_P}}=2V_{p,m}.$$

(21)

As can be seen from Formula (21), the rectified voltage V_RECT has a maximum value equal to $2V_{p,m}$. The value of the rectified voltage changes its value during the process of recharging the capacitor C₂. Also, when connecting a load R_L to the output, the maximum piezoelectric voltage decreases, according to Formula (11), i.e., $v_p(t)<V_{RECT}$. The instantaneous power extracted from the rectifier, yields $P_L(t)=V_{RECT}{i}_{D2}(t)$. The current $i_{D2}(t)$ has a sinusoidal waveform and can be represented by the following analytical expression $I_P\sin \omega t$ for the interval $t_1<t<{\displaystyle \frac{T}{2}}$. For the rest of the period, the value of the $i_{D2}(t)$ is equal to zero. Then, the average value of the extracted energy from the piezoelectric element in the voltage-doubler circuit is determined by the same approach as for the bridge rectifier circuit, according to Formula (8). Based on the analysis of Formula (8), the same expression as Formula (10) is obtained for the maximum value of the average power, but for the value of the rectified voltage, determined by the expression $V_{RECT}=2{\displaystyle \frac{I_P}{\omega C_P}}$. This means that the powers for both rectifiers in the ideal case (without taking into account, for example, the voltage drops on the diodes) are the same, but with the voltage-doubler circuit, the rectified voltage is of a higher value. Therefore, the voltage-doubler circuit can extract maximum power from the piezoelectric element at a lower current. The extracted power at a lower current results in smaller voltage drops across the diodes and hence less power dissipation. In practice, the typical polarization current for the thin-film energy-harvesting elements is up to a few mA, but the reduction in power dissipation leads to an increase in the energy efficiency of the voltage-doubler, which is essential, especially at low-power electronic devices.

Also, the voltage-doubler rectifiers can be very effective in a piezoelectric supercapacitor structure [37]. From an electrical point of view, the structure of the input signal source is a piezoelectric generator, one terminal of which is connected to one terminal of a thin-film supercapacitor. In this case, a series connection of the two elements is obtained, which allows them to be connected to a voltage-doubler rectifier, as shown in Figure 18. In it, the input signal source is represented as an equivalent current source with an impedance determined by r_p and C_p. In the common node of the two elements to limit the voltage over the supercapacitor, several rectifier diodes can be connected to the ground so that the maximum voltage reaches a value up to nV_D, where n is the number of the diodes.

4.2. Circuit Configurations with Integrated Components

4.2.1. Bridge Rectifier Using MOSFETs

The use of a bridge rectifier with rectifying diodes is simple, but due to the inherent forward voltage drop over them and power loss, it is necessary to consider possible alternatives. A simple solution to mitigate this effect is to use Schottky diodes which have a smaller forward voltage drop, but this does not eliminate the issue. When working with small input voltages generated from thin-film energy harvesters, the diodes in the various types of rectifiers are replaced by bipolar or MOS transistors. This technique is more easily implemented in integrated circuit design. In recent years, MOS transistors (or Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs)) have often been used to replace rectifier diodes, since the voltage drop across a single device can be reduced to several tens of millivolts. Thus, the so-called FET diodes are obtained, and both n-channel and n-channel enhancement-type MOS transistors can be used. For the efficient operation of bridge rectifiers with FET diodes, the threshold voltage must have a value no greater than 0.5 V. Such threshold voltage values can be more easily achieved with MOSFETs with a minimum channel length no greater than 100 nm. An example circuit of a bridge rectifier with FET diodes is shown in Figure 19. Two n-channel MOS transistors (M₁ and M₂) and two n-channel MOS transistors (M₃ and M₄) are used to build the circuit configuration. To simplify the description of the structure and the principle of operation, the source of the input signal is represented according to Thevenin’s theorem as an ideal voltage source e_p and series-connected resistance r_p, modeling the internal resistance. The gates of M₂ and M₃ are connected to node 1, and the gates of M₁ and M₄ are connected to node 2. At a positive input voltage, transistors M₁ and M₃ are tuned on and transistors M₂ and M₄ are turned off. In this case, the voltage V_GS1 < 0, and the voltage V_GS3 > 0. At the same time, the voltage V_GS2 > 0, and the voltage V_GS4 < 0. The transistors M₁ and M₃ are tuned on by operating in a triode mode of operation or with a continuous (non-pinched-off) channel, obtaining an almost straight line of the dependence of i_D − v_DS with a slope proportional to V_DSsat. Then, current flows from the source e_p through node 1 to the load and then to the common node of the sources of M₃ and M₄. At a negative input voltage, transistors M₁ and M₃ are turned off, and transistors M₂ and M₄ are turned on. In this case, current flows in the same direction through the load. The current flows from the source e_p to node 2 and through the load and then to the common node of the sources of M₃ and M₄, M₄ being turned on and M₃ being turned off.

At a small value of the voltage V_DS, the MOS transistors can be considered as a linear resistance, the value of which can be controlled by the voltage v_DSsat. Then, for the drain current of the n-channel MOSFET, the following analytical expression can be written [114]

$$i_D=\left[{\mu }_n{C}_{ox}{\displaystyle \frac{W}{L}}(v_{GS}-V_{th})\right]v_{DS},$$

(22)

where μ_n is the mobility of the electrons at the surface of the channel, C_ox is the total capacitance between gate and channel, W is the width of the channel, L is the length of the channel, and $V_{th}$ the threshold voltage with typical values in the range of 0.3 V to 1.0 V.

Then, the resistance of the channel when maintaining a small value of $v_{DS}$ is obtained, as follows:

$$r_{DS}={\displaystyle \frac{1}{\frac{\partial i_D}{\partial v_{DS}}}}={\displaystyle \frac{1}{{\mu }_n{C}_{ox}\frac{W}{L}(v_{GS}-V_{th})}}.$$

(23)

As can be seen from the above expression, the resistance is determined by the following factors: (1) process transconductance parameter $k_n^{\prime }={\mu }_n{C}_{ox}$ [A/V²], (2) the ratio of $W/L$, and (3) overdrive voltage $v_{DS,\max }=v_{GS}-V_{th}$ [V]. The first two factors are largely related to the functional capabilities of the selected microelectronic technology, and the $W/L$ ratio can be changed within certain limits. When defining the $W/L$ ratio, the minimum channel length condition, L_min, must always be observed. The third parameter is the overdrive voltage $v_{DS,\max }=v_{GS}-V_{th}$, but its value directly determines the magnitude of the electron charge in the channel. For a small value of the voltage $v_{DS}$ the MOS transistor operates as a linear resistance, the value of which is controlled by the voltage $v_{GS}=v_{DS,\max n}+V_{th}$ (where n is the sequence number of a certain value of the overdrive voltage). At $v_{GS}\le V_{th}$ the resistance is infinite, and for voltages greater than $V_{th}$ the resistance decreases.

4.2.2. Active Rectifiers

To further limit the voltage drops across the active diodes in the electronic circuits of rectifiers, a modification of the FET diodes can be used, in which the so-called active voltage rectifiers and doublers are obtained [40,115,116]. In this case, the active diode is implemented using a single low-power p-channel MOSFET, controlled by a single operational amplifier (op-amp), whose inverting and non-inverting inputs are connected to source (S) and drain (D), respectively (Figure 20). The gate (G) of the transistor is connected to the output of the op-amp and the bulk (substrate or body) of the transistor is connected to the drain.

For a loop formed by the MOS transistor and the input port of the op-amp according to Kirchhoff Voltage Law (KVL), yields

$$v_{id}+v_{SD}-V_{OS}=0\to v_{id}=V_{OS}-v_{SD}.$$

(24)

where $V_{OS}$ is the input offset voltage for the chosen op amp; for typical low-power op amps the input offset voltage is up to several mV.

In case the DC differential voltage gain is denoted by A_d, then for the gate voltage of the transistor is obtained, as follows:

$$v_G=A_d{v}_{id}.$$

(25)

Then, after substituting (24) in Formula (25) for the voltage is found, as follows:

$$v_G=A_d(V_{OS}-v_{SD}).$$

(26)

As can be seen in Formula (26), since the voltage gain A_d for an ideal amplifier is infinite, small changes in the voltage of v_SD will control the gate voltage. Then, provided the amplifier’s inverting input voltage $v_i^{-}$ is greater than the non-inverting input voltage $v_i^{+}$, the active diode is forward connected (the MOSFET is turned on) and conducts current from source to drain. In case the voltage at the non-inverting input $v_i^{+}$ is greater than the voltage at the inverting input $v_i^{-}$, the diode is in a reverse circuit (the MOSFET is turned off) and the current can be neglected.

The power supply voltages to forward the active diode are obtained from a supply independent bias circuit. The electrical energy for this circuit is provided by the energy harvesting generator, and its power consumption has to be a small value. This means that the average current should be typically less than 1 μA. In order for the active diode to start working and the operational amplifier to start regulating the voltage drop, the supply voltage must be greater than $V_{th}+2V_{DSsat}$ [117] or approximately 0.60–0.65 V. To forward the active diode, it is necessary that the voltage between the source and the gate of the MOS transistor becomes less than the threshold voltage V_TH, which is with negative polarity. For the short-channel pMOS transistors, the typical value for the threshold voltage is –0.5 V, at V_DS = V_GS. In this case, if the $v_i^{-}$ is greater than $v_i^{+}$ the voltage at the gate terminal will decrease. This means that the voltage at a source terminal has to be greater than 0.5 V for the transistor to start conducting current so that V_GS < −0.5 V. For a higher value of the source voltage, a higher value for the drain current can be obtained.

When the MOS transistor is turned on at small values of the v_DS, the channel approximately behaves as a linear resistance (or triode region operation), the value of which is controlled by the v_GS, which in turn is determined by the voltage drop v_DS, given in [114].

If the effective voltage $V_{DSsat}$ is of sufficient value, the voltage drop between the source and drain of the transistor is equal to V_OS, and then [114]

$$i_D=\left[{\mu }_n{C}_{ox}{\displaystyle \frac{W}{L}}(v_{GS}-V_{th})\right]V_{OS}.$$

(27)

In the active diode configuration proposed for use, an additional Schottky diode is connected (presented with a dashed line) between S and D of the transistor [41], which provides current for charging the energy storage element until the |V_GS| voltage becomes greater than the threshold voltage. In this way, the connection of a relatively complex start-up circuit [118] can be avoided. An example circuit of an active rectifier is given in Figure 21a. In it, the active diode is connected in series with the input signal, and the capacitor C_RECT is connected to the equivalent anode and ground of the circuit.

Compared to the rectifiers using rectified diodes in the circuit of the low-power active rectifier (Figure 21a), the voltage drop on the FET diode is a few tenths of millivolts. In the electronic circuit, the active diode is turned on when the voltage v_p is higher than the voltage v_o, blocking the flow of reverse current when the voltage v_p falls below v_o. To reduce the value of the reverse current, the bulk of the p-channel MOSFET is always connected to the highest potential available from its source and the drain nodes. In this way, a bulk-regulated MOS transistor structure is obtained [118,119].

If the electrical equivalent circuit of the input source is introduced according to Thevenin’s theorem, then an ideal voltage source $e_p$ with internal resistance is obtained $r_p$. To illustrate the principle of operation of the electronic circuit in Figure 21b are given, the time diagrams of the voltage and current through the MOS transistor. In the time interval when the input voltage is greater than the output voltage v_o, a current i_D flows, and the capacitor C_RECT is recharged to a voltage value of $V_{om,0}=V_{pm,0}-V_{SD}$. When an external load R_L is connected to the output of the circuit, in parallel with the capacitor C_RECT, the voltage on the capacitor decreases faster, because the capacitor is discharged through the load. In the time intervals when the MOSFET is turned off, as shown in Figure 21b, the capacitor discharges and reduces the output voltage level. When the MOS transistor is turned on, the capacitor is charged to the maximum value. When the voltage on the capacitor is equal to the current value of the input voltage, the MOS transistor is turned off. The average value of the rectified voltage is determined by Formula (11). Then, for the peak value of the current through the FET diode, we obtain $I_{D,\max }={\displaystyle \frac{V_{om,0}}{\sqrt{r_p{R}_L}}}$. Based on the value of the output voltage for the average output current is $I_{L,av}=V_{om,\infty }/R_L$, then for the relation between the $I_{L,av}$ and the repetitive value of the peak current through the diode is ${\delta }_{I_L}={\displaystyle \frac{I_{L,av}}{I_{D,\max }}}=\left(1-\sqrt{{\displaystyle \frac{r_p}{R_L}}}\right)\sqrt{{\displaystyle \frac{r_p}{R_L}}}$. As can be seen, the average value $I_{L,av}$ is relatively small and depends on the internal resistance of the input source and the resistance of the external load.

The minimum supply voltage for this type of active rectifier is determined by the operational amplifier’s (op-amp) minimum supply voltage and the MOS transistor’s threshold voltage. The supply voltage must be greater than the op-amp’s minimum operating voltage and the MOS transistor’s threshold voltage to ensure proper operation. For the maximum values of the power supply voltage, the same limitation is applied. This voltage should be less than the op-amp’s maximum operating voltage and the MOS transistor’s maximum gate voltage.

4.2.3. Voltage Doubler AC-DC Converters

If the input voltage is not of sufficient amplitude, based on the circuit in Figure 21 and the voltage doubler with Schottky diodes given in Figure 18, the circuit diagram of the voltage doubler AC-DC converter (Figure 22) using two op-amps, which drives the MOSFETs is obtained.

For the electronic circuit in Figure 22, the M₁ is an n-channel MOS transistor and the M₂ is a p-channel MOS transistor. For transistor M₁, the substrate is short-circuited to the source, as for the equivalent diode, the anode matches the substrate and the cathode matches the drain, thus forming a PN junction. For transistor M₂, the substrate is short-circuited to the drain, and in this case for the equivalent diode, the anode matches the source and the cathode matches the substrate. The active components in this circuit configuration are the operational amplifiers op-amp₁ and op-amp₂, which control the operation of the MOSFETs. In some cases, op-amps can be replaced with analog comparators, which allows for faster switching at higher input signal frequencies. The power supply voltage for the operational amplifiers used in the circuit is provided by the output voltage, which is stored on the capacitor C_RECT. For the selected connection method, the operational amplifiers measure the voltage between the drain and source of the MOSFETs, forming a control voltage for the gates. Then, the transistors turn on or off depending on the polarity of the voltage between the drain and the source of the transistors. In this way, a controllable resistance is obtained, depending on the polarity of the voltage applied between the two terminals. Specifically, the op-amp₁ monitors the voltage between the substrate and the drain of the M₁, turning on the transistor when the difference V_BD is positive. This occurs when the negative piezoelectric current passes through the diode charging the capacitor $C_p$ to the amplitude $V_{Cp}=V_{pm,0}$. The op-amp₂ monitors the voltage between the source and the substrate of M₂, turning on the transistor when the voltage is positive. This occurs when the input voltage becomes higher than the output voltage or the voltage drops over the capacitor C_RECT.

If the voltage on the C_RECT is insufficient to provide a supply voltage for the operational amplifiers, the charging current is provided by the well-source diodes of the MOSFETs. This most often occurs when mechanical vibrations initially occur, and polarization current is generated.

In order to take into consideration the necessary input voltage for the PEH to operate, it is important to consider which are the limiting factors for it. Voltage drops are present overall active components, with their limitation being of the most importance. Diode voltage drops are present in the rectification circuits, and these voltage drops can be reduced from 0.6 V to 0.2 V if a migration towards Schottky diodes is performed. An additional issue is that these voltage drops roughly increase proportionally to output current consumption due to the diode’s internal resistance. To reduce the losses in the diodes, it is better to implement a rectification circuit using transistors. There are two possible solutions: a MOS rectifier and a BJT rectifier. Our analysis shows that due to the necessity that the $U_{GS}$ voltage must exceed the $U_{TH}$ voltage for all MOS transistors in order to turn them on, in a MOS rectifier, the input voltage has to be sufficiently higher that 2x $U_{TH}$ in order for the circuit to operate linearly and with minimum losses. It is difficult to manufacture MOS transistors with a threshold voltage below 0.5–0.7 V for discrete components, hence necessitating a high input voltage for the PEH of above 1 V. When constructing a BJT rectifier there is a similar issue in that for a bipolar transistor to operate a base-emitter voltage of 0.6–0.7 V needs to be provided, hence requiring the piezo transducer to generate a voltage of above 1.2 V. When implementing circuits which include an operational amplifier or comparator, efforts need to be directed towards choosing low-voltage power supplied ICs. For this the folded cascade configurations are optimal but in practicality, available operational amplifier ICs with a supply voltage of below 1.5–1.8 V are difficult to find and expensive. As a conclusion over this brief discussion, taking under consideration all factors: (1) if the piezo transducer is capable of providing a voltage of below 1 V, then a suitable circuit would implement a Schottky diode rectifier and passive (transformer or resonant-based circuit) voltage boosting prior to further energy-conversion steps; (2) if the piezo transducer can provide more than 1.5 V, then active transistor rectifiers and op-amp circuits can be implemented and utilized.

4.3. Parameter Study for Different Rectifier Stages Topologies of Reported Piezoelectric Energy Harvesting Systems

Ensuring efficient AC-to-DC conversion is one of the key aspects when designing piezoelectric energy harvesting devices. A short comparative study of several carefully selected representative topologies of rectifier stages is presented below, focusing on their primary parameters, performance metrics, and potential applications. A summary of their main parameters is shown in

Table 3. Comparison of selected recently reported rectifier-based circuit configurations.

Parameter	Godinho, A. et al. [120]	Frick, V. et al. [121]	Edla, M. et al. [122]	Yuen, P. W. et al. [123]	Kamran, M. et al. [124]
Technology	CMOS 130 nm	CMOS 0.35 μm	Discrete components	CMOS 65 nm	Discrete components
Frequency	3.2 kHz	100 Hz	2 Hz	120 Hz	5 Hz
Output voltage	0.45–1 V	1 V	3.8 V	1.21 V	18 V
Power Conversion Efficiency (PCE)	84%	n.a.	n.a.	84%	72.3%
Power Conversion Efficiency (VCE)	99%	n.a.	n.a.	98%	n.a.
Cost	high	medium	low	high	low
Complexity	high	medium	medium	low	low
Year	2021	2021	2021	2019	2023

n.a. = data not available.

.

Godinho, A. et al. [120] report an active CMOS rectifier designed in 130 nm CMOS technology which achieves a voltage conversion efficiency (VCE) of 99% and a power conversion efficiency (PCE) of 80% to 90% for input voltages ranging from 0.45 V to 1 V at 3.2 kHz. This circuit employs a threshold cancelation technique and a no-delay comparator to minimize power losses and avoid reverse leakage currents. These features make the rectifier highly suitable for integration into power management circuits (PMCs) for environmental monitoring in wireless sensor networks (WSNs). A voltage flip enhancement concept, using the Fully Autonomous Rectifier (FAR) principle, is analyzed by Frick, V. et al. [121]. The FAR achieves significant power performance improvements for piezoelectric energy harvesting (PEH) systems, especially under high load constraints. The CMOS prototype confirmed robust operation under circuit non-idealities. This solution is well-suited for low-voltage applications, and can be integrated into more complex PEH architectures like SSHI or SSHC for additional performance boosts. Edla, M. et al. [122] introduce an H-Bridge rectifier circuit that demonstrates superior performance over conventional full-bridge rectifiers (FBRs) in low-frequency, human-induced motion scenarios. Their experimental results indicate that the H-Bridge produces a maximum rectified voltage of 3.8 V DC and 21.05 μW of output power during walking tests, outperforming the FBR circuit’s 1.6 V DC and 5.01 μW. The circuit also offers higher stability, making it a suitable choice for wearable energy harvesting devices. Further investigation into dual-stage H-Bridge circuits is recommended for extended applications. A dual-output piezoelectric rectifier implemented in 65 nm CMOS technology, developed by Yuen, P. W. et al. [123], addresses the limitations of conventional rectifiers. The proposed NMOS rectifier achieves a VCE of over 98% and a peak PCE of 84%, delivering 120 mW of output power with a load resistance of 12 kΩ. The circuit covers an active area of 0.00372 mm² and provides a rectified voltage of 1.21 V with a current of 101.12 mA. This design is highly effective for low-power WSN devices. The Voltage Doubler Joule Thief (VDJT) circuit presented by Kamran, M. et al. [124], integrates voltage doubler and joule thief principles to optimize AC-DC conversion. Laboratory tests validated the VDJT circuit, achieving an efficiency of 72.3% by converting an input of 15 V AC at 5 Hz to an output of 18 V DC and 5500 μW of power. Its compact design makes it suitable for miniaturized energy harvesting systems. However, further exploration of control methodologies for boosting voltage is needed.

5. SSHI (Synchronized Switch Harvesting on Inductor) Based Energy Harvesting Circuits

5.1. General Principle of a SSHI Technique

The use of bridge rectifiers or voltage multiplier rectifiers makes it possible to directly convert the polarization voltage caused by mechanical vibrations. The main drawback of this method is the presence of voltage drops across the rectifier components, which can significantly reduce the harvested electrical energy, especially at generated low voltages. Also, during the change in polarity of the piezoelectric current, the stored charge on the internal capacitor of the transducer is wasted, which further reduces the efficiency of operation [125,126,127,128,129,130]. One of the widely used and interesting methods for extracting more electrical energy for wearable power supplies is by building bias-flip input stages [125,126,127,128,129,130] in which the amplitude of the AC voltage is increased up to two times. Moreover, this type of bias-flip input stage is connected before the voltage rectifier. Thus, the harvesting efficiency obtained by the piezoelectric generator can be increased. Specifically, Figure 23a shows a functional circuit of an input stage with an additional electronic switch connected in parallel to the piezoelectric element. For the piezoelectric element in a steady state, a sinusoidal excitation $u(t)=U_m\sin \omega t$ is applied, where $U_m$ is the maximum deflection and ω is the angular frequency of the vibrations. In the operation of the piezoelectric element, it is assumed that the produced periodic signal $v_p(t)$ is symmetrical according to the x-axis, and has a sinusoidal waveform and a frequency determined by the mechanical vibrations on the cantilever. When the input signal reaches its amplitude, the electronic switch S closes under the action of a control pulse $v_c(t)$ and the voltage $v_p^{\prime }(t)$ becomes equal to zero. The time interval t_p during which the switch is closed must be no more than 1/100 of the period of the input signal. After the time interval of the control pulse has expired, the voltage $v_p^{\prime }(t)$ starts to change from zero depending on the instantaneous value of the $v_p(t)$. This change continues until the input signal again reaches an amplitude value with negative polarity. The switch then closes again for a short time t_c. The signal $v_p^{\prime }(t)$ becomes equal to zero and after opening the switch the signal starts to change depending on the current value of $v_p(t)$. The process is then repeated, and as shown in Figure 23b, the voltage $v_p^{\prime }(t)$ reaches an amplitude (at no load operation) up to twice the value of the amplitude of the $v_p(t)$. As can be seen, in Figure 23b, the voltage $v_p^{\prime }(t)$ is phase-shifted and has a waveform different than a sinusoidal signal. Also, for the proper operation, it is necessary that the control signal is synchronized with the input signal $v_p(t)$ and has a frequency twice that of $v_p(t)$. The control pulse is generated by an electronic circuit with power supplied from the energy storage element included in the output port for the wearable power supply. Thus, a “self-powered” electronic switch is obtained.

5.2. Parallel SSHI Technique—Basic Functional Circuit and Operational Principle

To reduce non-linear distortions of the $v_p^{\prime }(t)$, as well as to increase energy efficiency, a technique is often used in which an inductor L_S is connected in series to the electronic switch S, as shown in Figure 24a. This results in a parallel SSHI (Synchronized Switch Harvesting on Inductor)-based switching circuit [127]. When utilizing such a parallel SSHI (p-SSHI) technique, it is reported that an increase of 300–400% in harvested energy $E_H$ is possible compared to the standard configuration at a fixed electromechanical coupling coefficient. To illustrate the principle of operation of an input stage with a parallel SSHI, in Figure 24b [115], time diagrams of voltages in the no-load mode of operation are given. As can be seen in Figure 24a, when the switch is closed, the C_p charges L_S until the inductor current i_Ls rises to the peak. Then, the L_S charges the C_p in return until i_Ls falls to zero, as shown in Figure 24b. An oscillator is formed with a resonant circuit defined by C_p and L_S. The electronic switch remains closed until the voltage on the piezoelectric element is reversed, as shown in Figure 24b. The time interval t_c, while the switch is closed, corresponds to a half-pseudo period (or T/2) of the formed oscillator, which is equal to

$$t_c=\pi \sqrt{L_S{C}_p}.$$

(28)

Of the addition of the inductor L_S, the waveform of the resulting signal $v_p^{\prime }(t)$ is close to a square voltage, and its first harmonic is approximately sinusoidal in form and matching the input signal $v_p(t)$.

To design electronic circuits using parallel SSHI, the value of the inductance L_S depends on the duration of the time interval t_c, as well as on the capacitance C_p of the selected piezoelectric element. For practical applications, the value of the inductance L_S is chosen to be approximately twenty to fifty times lower than the period of the mechanical vibrations [128]. The smallest value of the time interval t_p is determined by the time of switching on and off the selected electronic switch.

When choosing an inductor, the losses in the resulting oscillator circuit are mainly defined by the small-signal resistance r_L of the inductor and the on-state resistance R_ON (which for real switches is non-zero ohms) of the electronic switch. Then, the quality factor Q_LC of the oscillator circuit is determined as follows $Q_{LC}\approx \rho /(r_L+R_{ON})$ (where $\rho =\sqrt{L_S/C_p}$ is the characteristic resistance of the resonance circuit and R_ON is the on-resistance of the electronic switch S). The value of the resistance $r_{L_S}$ can be determined from the known formula, at a certain inductor L_S with a given value of the quality factor and $R_{ON}\approx 0\Omega$ (under the condition that the on-state resistance is neglected), as

$$r_{L_S}\approx {\displaystyle \frac{1}{Q_{LC}}}\sqrt{{\displaystyle \frac{L_S}{C_p}}}.$$

(29)

The relation between the quality factor and the piezoelectric open circuit voltage amplitude just before and just after ($V_{0,p}^{\prime }$ and $V_{0,p}$, respectively) the introducing the switching circuit with inversion is given by [131]

$$V_{0,p}^{\prime }=-V_{0,p}{e}^{-\pi /2Q_{LC}}.$$

(30)

When connecting a standard bridge rectifier and DC-DC converter after the electronic switch circuit, the maximum value of the average power that can be obtained through the C_L (see Figure 13) is given as [131]

$$P_{o,\max }={\displaystyle \frac{{\alpha }^2\omega U_m^2}{\pi C_p\left(1-e^{\frac{-\pi }{2Q_{LC}}}\right)}}$$

(31)

At

$$V_{L,opt}={\displaystyle \frac{\alpha }{C_p\left(1-e^{\frac{-\pi }{2Q_{LC}}}\right)}}{U}_m,$$

(32)

where α is a force factor of the piezoelectric disk, and its value is defined by the geometrical dimensions (the cross-sectional area A and inversely proportional to the thickness L of the piezoelectric generator), thus for the polarization current can be written $i_p={\displaystyle \frac{dQ}{dt}}=\alpha \dot{u}$ if $\left|{\displaystyle \frac{\alpha }{C_p}}u\right|\ge V_L$ and $Q=\alpha u$ is the outgoing electric charge from the piezoelectric through the bridge rectifier during the T/2 interval.

As can be seen from the above analytical expression (Formula (31)), the average power depends on the value of the quality factor determined by the inductor and the parameters of the electronic switch. For relatively large values of the quality factor, for example, when higher than 10, the average power is approximately proportional to Q_LC. For inductors with inductance values greater than 100 μH, it is difficult to obtain a quality factor higher than 20. In general, the quality factor of this type of passive element has typical values of up to about 50. Provided that the quality factor increases from 10 to 15, other things being equal, the power gain theoretically increases by a factor of 3.18 for the maximum average power.

5.3. Series SSHI Technique—Basic Functional Circuit and Operational Principle

The series SSHI (s-SSHI) technique is similar to the parallel SSHI, but the electronic switch and the series-connected inductor are connected in series to the piezoelectric element. Figure 25 shows the functional diagram for the series SSHI technique, as well as the waveforms of the sinusoidal excitation and the produced voltages using series SSHI. As in the circuit with parallel SSHI technique (Figure 24a), the electronic switch in Figure 25a is closed when the mechanical deflection in the vibration process reaches a maximum or minimum value. During the time intervals when the switch is closed, the electric charge passes through the inductor L_S, transmitting part of the electric energy stored in the piezoelectric capacitance C_p to the output capacitor C_L, connected to the output terminals of the rectifier. Figure 25b presents the corresponding time diagrams of the mechanical sinusoidal deflection and the waveform of the voltages. The value of the piezoelectric voltage at an open circuit, as well as the value of the electric charge outgoing from the piezoelectric element during the operation of the serial SSHI technique, are given by [131]

$$V_{0,m}^{\prime }=-V_{0,p}+2{\displaystyle \frac{\alpha }{C_p}}u \mathrm{and}$$

(33)

$$Q_p=C_p(V_{0,m}^{\prime }-V_{0,p}).$$

(34)

Based on Formulas (33) and (34), as well as some additional analytical transformations over the expression of the average harvested power ($P={\displaystyle \frac{2}{T}}{Q}_p{V}_L$), the maximum value of the average power at an optimal value of the rectified voltage related to the amplitude of the deviation has the form [131]

$$P_{\max }={\displaystyle \frac{\omega }{2\pi }}{\displaystyle \frac{1+e^{\frac{-\pi }{2Q_{LC}}}}{1-e^{\frac{-\pi }{2Q_{LC}}}}}{\displaystyle \frac{{\alpha }^2}{C_p}}{U}_m^2 \mathrm{at}$$

(35)

$$V_{L,opt}={\displaystyle \frac{\alpha }{2C_p}}{U}_m.$$

(36)

Then, based on Formulas (31) and (35) for the ratio of the harvested average powers in both techniques, the following expression can be obtained

$${\displaystyle \frac{{(P_{\max })}_{Series-SSHI}}{{(P_{\max })}_{Parallel-SSHI}}}={\displaystyle \frac{1+e^{\frac{-\pi }{2Q_{LC}}}}{2}}.$$

(37)

As can be seen from Formula (37), for small values of the quality factor (e.g., Q_LC < 10) the maximum harvested average power of the serial SSHI-based circuit is approximately two times smaller than the harvested average power of the parallel SSHI-based circuit. For high values of the quality factor, the harvested powers for the two techniques are of the same value. For example, for a quality factor equal to 10 the theoretically calculated ratio of the two powers is approximately equal to 0.927. Thus, the selection of a specific technique for switching the generated piezoelectric voltage depends on the specific application of the piezoelectric energy harvesting system. When using the parallel SSHI technique, higher values of the harvested average power can be obtained. Also, higher values of the rectified voltage can be obtained for the parallel SSHI technique than for the series SSHI technique. An advantage of the series SSHI technique is that it can work with lower values of piezoelectric voltages and does not require the use of an additional power optimization circuit. Therefore, the serial SSHI technique in some cases can be realized with a smaller number of passive and active components, and as a result, smaller values of the power dissipations can be obtained.

In 2024, Osama Younas et al. innovatively proposed a method to have large passive inductors be replaced with a floating gyroinductor [132]. For the proposed electronic circuit with a floating gyroinductor as an alternative to conventional inductors, the size of the printed circuit board can be reduced. This replacement is also suitable for lower switching frequencies when larger inductor sizes are required. As a result of the replacement, a higher quality factor value can be obtained. A weakness in this method of building switchable inductors is the relatively larger number of passive and active elements, as well as the need to provide a supply voltage for the operational amplifiers used for floating gyroinductors.

The circuit diagram of a grounded gyrator is presented in Figure 26. Under the condition that the two operational amplifiers (X₁ and X₂) are ideal active elements ($A_{d12}\to \infty$ or $v_{id,1}=v_{id,2}\approx 0V$v_id,1 = v_id,2 ≈ 0 V) for the voltages at their outputs, we obtain

$$v_1=v_{in}+R_2{\displaystyle \frac{v_{in}-v_2}{R_3}}=v_{in}\left(1-{\displaystyle \frac{R_2{R}_4}{R_3{R}_5}}\right) \mathrm{and}$$

(38)

$$v_2=v_{in}\left(1+{\displaystyle \frac{R_4}{R_5}}\right).$$

(39)

Then, for the input current and then for the input impedance is found

$$i_{in}={\displaystyle \frac{v_{in}-v_1}{R_1}}=v_{in}{\displaystyle \frac{R_2{R}_4}{R_1{R}_3{R}_5}}\to Z_{in}={\displaystyle \frac{v_{in}}{i_{in}}}={\displaystyle \frac{R_1{R}_3{R}_5}{R_2{R}_4}}.$$

(40)

When replacing the resistor R₄ with a capacitor C, the input impedance is obtained with an inductive character or gyroinductor, as follows:

$$Z_{in}=j\omega C_4\times {\displaystyle \frac{R_1{R}_3{R}_5}{R_2}}=j\omega \underset{L_e}{\underbrace{C_{4}R{R}_5}},$$

(41)

at $R_1=R_2=R_3$. In this way, the analytical expression for the equivalent inductance L_e is simplified, and through the resistor R₅, the desired value of L_e can be adjusted, taking into account the tolerances of the passive components. When considering a limited value of the gain coefficients $A_{d1}\approx A_{d2}\approx A_d\ne \infty$ for the equivalent small-signal resistance of the gyroinductor, we obtain

$$r_L={\displaystyle \frac{R_2+R_3}{R_2{A}_d}}{R}_1={\displaystyle \frac{2R}{A_d}},$$

(42)

at $R_1=R_2=R_3$.

Then, based on an analysis of the formed resonant circuit, the equivalent quality factor is obtained, as follows:

$$Q_{LC}={\displaystyle \frac{1}{r_L\sqrt{C_p/L_e}+\sqrt{L_e/C_p}/r_p^{\prime }}},$$

(43)

where $r_p^{\prime }=\left({\displaystyle \frac{R{R}_5{C}_4}{R_5{C}_4+R{C}_p}}\left|\right|r_p\right){\displaystyle \frac{A_d}{2}}\approx {\displaystyle \frac{R{R}_5{C}_4}{R_5{C}_4+R{C}_p}}$.

The maximum value of the equivalent quality factor for real operational amplifier has the form

$$Q_{LC,\max }={\displaystyle \frac{x{A}_{d1}{A}_{d2}}{2x^2{A}_{d1}+2A_{d1}+2x^2{A}_{d2}}}.$$

(44)

at $R={\displaystyle \frac{C_4}{C_p}}{R}_5{\displaystyle \frac{A_{d1}}{A_{d1}+A_{d2}}}$, and where $x=\sqrt{{\displaystyle \frac{A_{d1}}{A_{d1}+A_{d2}}}}$.

As can be seen from the above formula, the value of the maximum quality factor is determined only by the gain coefficients of A_d1 and A_d2 of the two operational amplifiers.

The floating gyroinductor is obtained by connecting two gyroinductors (see Figure 26) in series on the side of resistor R₅. In this case, the new value of the equivalent inductance is obtained as L_e = L_e1 + L_e2.

In 2024, Noora Almarri et al. presented an interface circuit employing synchronized switch harvesting on a capacitor (SSHC) energy harvesting circuit. The capacitor-based synchronized switch harvesting on capacitor (SSHC) is an alternative to inductor-based methods, with this approach utilizing a set of switched capacitors [123]. The basic structure of such a circuit configuration is shown in Figure 27, courtesy of [29]. An advantage of the SSHC technique is the possibility of obtaining a smaller area of the circuit, which is particularly suitable for the implementation of an integrated circuit in compact medical devices. A weakness of switched capacitor circuits is the higher noise level, which is reflected in the stability of the output voltage.

For the circuit with single capacitor C, the output signal of the piezoelectric capacitor is generated before the piezoelectric current crosses over zero. Capacitor C will be charged through the internal capacitance C_p. In the first half cycle, the charge over the C_p is cleared only when the piezoelectric current is zero. Finally, the C_p is charged back from C in the opposite direction of the polarity. If the capacitance C_p is equal to the C, for several repetitions of flipping, the voltage V_r in steady state has the form [29]

$$V_r=\left[{\left({\displaystyle \frac{1}{4}}\right)}^n+\dots +{\left({\displaystyle \frac{1}{4}}\right)}^2+{\displaystyle \frac{1}{4}}\right]V_{RECT}.$$

(45)

Then,

$$\underset{n\to \infty }{\lim }\left|V_r\right|={\displaystyle \frac{1}{3}}{V}_{RECT}.$$

(46)

The coefficient of the energy efficiency of such a circuit can be expressed by the following formula [29]:

$$\eta ={\displaystyle \frac{k{C}_k}{C_p+(k+1)C_k}}\times 100\%,$$

(47)

where k is the number of flying capacitors used in the circuit, and C_k is the capacitance of the certain flying capacitor.

As can be seen from Formula (47), the larger flying capacitors employed the higher value of the flipping energy efficiency. The energy efficiency for one-, two-, and four-stage SSHC based rectifiers will be increased with increasing ratios of the C_k/C_p.

5.4. Structure and Operational Principle of a Basic Resonant Rectifier Circuits

To implement the switching of the series inductor L_S in the circuits using SSHI, it is necessary to synchronize the operation of the pulse oscillator producing $v_c(t)$ and the input signal, which is obtained through the operation of the piezoelectric generator. For the basic structure of a resonant rectifier circuit, employing SSHI is given in Figure 28 [104,127,130]. The electronic switches in the basic structure are implemented with two MOS transistors, where M₁ is an n-channel MOS transistor and M₂ is a p-channel MOS transistor. A diode is connected in series to each transistor, and when M₁ is turned on, diode D₁ is in the forward mode of operation (the current is indicated by a red dashed line), and when transistor M₂ is turned on, diode D₂ is in the forward mode of operation (the current indicated by a blue dashed line).

For the implementation of the two transistors, their substrate is connected to the sources, and their drains are connected to the cathode of the D₁ and the anode of the D₂, respectively. Their gates are short-circuited, and the control pulse signal is obtained from the output terminal of an analog comparator U₁. The non-inverting input terminal of the U₁ is connected to the ground, and the inverting input is connected to the output node of the passive differentiator implemented with capacitor C₁ and resistors R₁ and R₂. The bipolar supply voltages for the U₁ are provided by the additional capacitors C_S1 and C_S2, as well as the rectified diodes D_S1 and D_S2. Moreover, the capacitors C_S1 and C_S2 are charged to voltages with suitable values to ensure the $V_{DD}^{+}$ and $V_{SS}^{-}$.

To analyze the behavior of the differentiator in the time domain, an ideal rectangular pulse is applied to the input node (Figure 29a,b). Based on an analysis of the electronic circuit, the differential equation is obtained for $v_p=0$:

$$R_{12}{C}_1{\displaystyle \frac{d{v}_{dif}}{dt}}+u_{dif}=0,$$

(48)

where $R_{12}={\displaystyle \frac{R_1{R}_2}{R_1+R_2}}$ is the equivalent resistance of the voltage divider.

The solution of the above equation has the form

$$v_{dif}\left(t\right)=U_{dif,m}{e}^{-t/R_{12}{C}_1}.$$

(49)

To measure the settling time of the output voltage, the time constant of the circuit is defined as $\tau =R_{12}{C}_1$.

The following additional condition is used to determine $U_{dif,m}$ at t = 0. When the input voltage changes in a rising edge, the charge on the capacitor does not change. The output voltage repeats the direction of changing of the input voltage (Figure 29a) from zero to $U_{dif,m}={\displaystyle \frac{R_1}{R_1+R_2}}{U}_{p,m}$, then decreases exponentially according to the expression (48) again to zero. If the input voltage jumps from $U_{dif,m}$ to zero (in a falling edge), then the output voltage will be jumps from zero to $U_{dif,m}=-{\displaystyle \frac{R_1}{R_1+R_2}}{U}_{p,m}$ (Figure 29b).

If at the input node of the differentiator in Figure 30, an approximately rectangular signal with a period T for which $\tau <T/2$ is applied, then the output voltage is described by short pulses for each half period ($T/2$). This is because the capacitor is almost completely discharged for each half-cycle to zero. The smaller the time constant is compared to $T/2$, the shorter output pulses will be produced.

Of the above-described principle of operation, upon the occurrence of a pulse with amplitude $U_{dif,m}={\displaystyle \frac{R_1}{R_1+R_2}}{U}_{p,m}$, the output of the analog comparator, which is a push-pull stage, will switch to a high level for the duration of the pulse determined by the time constant of the differentiator. For the duration of the pulse, the transistor M₁ turns on and flows current, providing the voltage reversal. When a pulse with an amplitude of $U_{dif,m}=-{\displaystyle \frac{R_1}{R_1+R_2}}{U}_{p,m}$ occurs, the output terminal of the comparator will switch the output to a low level, which will turn on the transistor M₂, due to which the input voltage will be reversed again. An example waveform of the control pulse v_c for $\tau <<T/2$ is shown in Figure 30.

5.4.1. Simulation Testing and Discussions on Resonant Rectifier Circuit, Employing Parallel SSHI Technique

The figures below show the simulated circuit (Figure 31) of the discussed parallel synchronous switch inductor and the simulations that demonstrate its transient response (Figure 32). The input stimuli are a 1 V sinusoidal wave with a frequency of 100 Hz.

To define what the maximum output power which such a circuit can generate, we performed a parametric sweep over the load resistor’s values. The results are shown in Figure 33. The results show that the maximum output power for such a circuit is around 3 mW with high fluctuations being observed.

Additionally, in order for us to investigate what is the efficiency of such a conversion circuit, we plotted the output and input power for the system and have displayed the results in Figure 34.

5.4.2. Simulation Testing and Discussions on Resonant Rectifier Circuit, Employing Series SSHI Technique

To achieve maximum efficiency, the storage capacitor $C_L$ value both for the standard configuration, and with the series SSHI technique must be optimally chosen. The increase in the value of the $C_L$ leads to an increase in the energy dissipated by mechanics, whilst at the same time, leads to a decrease in the energy remaining in the system [127,128]. Because of this reason, an optimal value for the $C_L$ must be chosen at the peak of the harvested energy curve. In regards to utilizing the series SSHI technique, it reduces the remaining system energy and results in a better energy transfer through the rectifier. When applying the SSHI technique to the optimal capacitance value, $C_L$ is one magnitude lower in size compared to that in the standard configuration. Figure 35 shows cases the application of such a series SSHI technique with a self-supplying BJT switch, based on the work of Fang et al. [129].

To further increase the level of the output voltage an additional boosting circuit was proposed by Kamran et al. It includes a set of coupled inductors driven by BJTs. This additional boosting circuit was added to our PEH module and shown in Figure 36 [124].

We were interested in investigating how this combination of several electronic techniques would influence the overall performance of the piezoelectric element. Because of this, we ran a series of simulation tests with the program LTSpice to analyze the presented electronic circuit (Figure 36). To perform the simulation study, simulation models of 2N3904 were used for NPN transistors, and 2N2905A was used for PNP transistors. PMEG2010AEB was used to implement the output Schottky diode. The passive components were selected with the following initial values: $C_d=100$ μF, $L_{SSHI}=40$ μH, $C_{L1}=10$ μF, $L_{L1}=1$ μH, $L_{L1}=10$ μH, $R_B=10$ kΩ, $C_{L2}=10$ μF, and $R_L=1$ kΩ.

Of the execution of the computer simulations, Figure 37, Figure 38, Figure 39 and Figure 40 present timing diagrams of the output voltage and output power when the circuit parameters (Figure 36) are changed. Figure 37 and Figure 38 show a simulation of how the value of the load resistor R_L influences the output voltage and output power of the circuit, respectively. As can be seen (Figure 39), the increase in the load current (or decrease in the load resistance) leads to a decrease in the value of the output voltage. In this case, the authors concluded that the load should have a resistance in the range of 1–10 kΩ, in order to supply a sufficiently high voltage as the input of a following buck-boost (SEPIC—single-ended primary-inductor converter) DC-DC converter circuit. The results in Figure 31 show that the maximum output power is reached at a load resistance equal to 100 Ω. But there are noticeable fluctuations in the output power. It can be seen from the plots shown that a load resistance of 1 kΩ results in a more stable DC power output. In addition, the further increase in the load resistor’s value leading to a decrease in outputted power. This motivates the authors that the optimal load should be near 1 kΩ for the presented circuit.

To find the optimum values for some of the LC components in the circuit, we also investigated their value’s influence over the output power of the piezoelectric element. The resulting graphs are shown in Figure 39 and Figure 40.

Figure 39 shows that the increase in the value of C_L1 from 10 nF to 100 nF leads to an increase in the output power of the harvester. But it can be seen that further increasing the capacitance’s value from 100 nF up to 100 μF leads to a decrease in the value of the output power. This result shows that for the given circuit, the optimal choice of the load capacitance C_L1’s value is located at the maximum output power of the harvesting circuit. From our results, this optimal value was shown to be in the vicinity of 100 nF.

Similarly to the simulation performed for the optimal value of the C_L1, Figure 40 shows that the optimum value of L₂ has to be chosen by the PEH’s output power peak. An increase in the inductor’s inductance, value from 10 μH up to 100 μH shows a negligible difference in output power. However, increasing the value of the L₂ further up to 1 mH was shown to drastically increase the PEH’s output power. Increasing the value of L₂ above 1 mH was shown to decrease the PEH’s output power. The authors concluded that for the given electronic circuit, the optimal value of the L₂ should be chosen close to 1 mH.

5.4.3. Simulation Results and Discussions on s-SSHI and p-SSHI Circuits, Employing a Model of Commercially Available Multilayer Piezoelectric Generator

To evaluate the performance of the synchronized switch harvesting on inductor topologies, especially parallel-SSHI (p-SSHI) and series-SSHI (s-SSHI), some computer simulations were performed by using a multilayer piezoelectric generator model. Specifically, the PPA-2011 (from MIDE Technology) piezoelectric generator was considered, with simulations conducted for two excitation frequencies as provided in the datasheet: 23 Hz and 147 Hz. The results for both resonant rectifier topologies were compared against a conventional full-bridge rectifier (FBR) (or simply bridge rectifier) under identical piezoelectric model parameters and two load resistances R_L. (or marked with R_T according to the simulator requirements). An estimation of power extraction performance was calculated for each circuit configuration. At a lower excitation frequency of 23 Hz, the output characteristics of the p-SSHI circuits were evaluated. The results are presented in Figure 41.

As can be seen, in this circuit, at the R_T = 30 kΩ, both p-SSHI and bridge rectifier circuits yielded an output voltage of 13.6–13.7 V, resulting in no apparent improvement. At the R_T = 10 kΩ, both circuits again produced identical outputs of 7.62 V.

The results for the s-SSHI circuit at the same frequency 23 Hz are presented in Figure 42. At the load resistance R_T = 30 kΩ, the s-SSHI circuit provided 13.8 V, achieving a 1.983 times power increase over the bridge rectifier, where the output voltage was 9.8 V. At the R_T = 10 kΩ, the output voltage was 7.8 V, marking a 1.906 times power improvement compared to the bridge rectifier circuit, where the output voltage was 5.65 V.

At a higher excitation frequency of 147 Hz, the output characteristics of the p-SSHI circuits are presented in Figure 43. As can be seen at the load resistance R_T = 30 kΩ, the output voltage reached 3.65 V, which represents a 1.736 times power improvement compared to the bridge rectifier circuit, the output voltage is 2.77 V. At the R_T = 10 kΩ, the output voltage was 2.32 V, which corresponds to a 1.523 times higher power than the bridge rectifier output equal to 1.88 V.

The results for the s-SSHI circuit at this frequency equal to 147 Hz are presented at Figure 44. At the load R_T = 30 kΩ, the output voltage reaches 3.65 V, showing a 1.762 times power enhancement over the bridge output of 2.75 V. At the R_T = 10 kΩ, the voltage reached 2.35 V, corresponding to a 1.523 times power improvement over the bridge rectifier value, equal to 1.90 V.

The simulation results demonstrate that both p-SSHI and s-SSHI circuits enhance the harvested energy relative to the conventional FBR topology for most of the studied cases. In low frequency scenarios such as 23 Hz, the p-SSHI practically does not bring any power improvements. On the other hand, for the s-SSHI topology, the improvement is more significant at lower frequencies, particularly for the s-SSHI circuit, which achieved nearly double the voltage output compared to the bridge rectifier in some cases. At higher frequencies, the performance enhancement remains substantial, with both SSHI topologies offering power gains exceeding 1.5× over the bridge rectifier.

These findings suggest that the SSHI-based rectification strategies are effective for improving the efficiency of piezoelectric energy harvesting, particularly in applications where low-frequency vibrations are predominant. The s-SSHI circuit generally outperforms p-SSHI in terms of voltage gain, making it a more suitable choice for scenarios demanding higher energy extraction efficiency.

5.5. Piezoelectric Harvester Resonant Frequency Matching and Tuning

All piezoelectric elements are designed in a manner that should produce a maximum mechanical displacement for a given external vibration source. This maximum displacement is possible only at the resonant frequency. The ambient vibrations are often not aligned in frequency with the resonant frequency of the piezoelectric elements. The piezoelectric elements have a narrowband response (or high–Q factor) close to their self-resonant frequency. The width of this response band can be expanded by decreasing the mechanical quality factor of the piezoelectric element [133].

To guarantee close to the resonant operation, because the external vibration source is unknown and independent, it is worthwhile to consider the possibility of tuning the resonant frequency of the PEH to match the ambient source’s. In order to do this in a controlled and regulated manner, electrically driven techniques for resonance tuning have been proposed in the past. This fine-tuning is typically performed by using external accelerometric sensors and an embedded MCU (microcontroller unit) [133]. By capturing the accelerometer data, the low-power CPU can evaluate the external vibration source’s frequency and fine-tune the system by controlling an electro-mechanical tuning system/actuator. Most often this system is a set of fixed constant magnets whose position relative to the piezoelectric element structure is changed thus influencing its resonant frequency, and influencing the positioning of the seismic mass [133,134]. To determine whether resonance tuning is necessary, it is important to consider what metric should be used as a toggle. The output power of the piezoelectric element might fluctuate due to frequency mismatch, but it can also decrease due to the decrease in the external vibration source’s amplitude. Because of this reason, a purely power-based measurement is not sufficient to determine whether a fine-tuning procedure should be initiated [133,135]. Another careful consideration that must be made is, as the vibration source’s mismatched frequency can be placed on either side of the resonance peak, equally displaced frequencies with a higher or lower frequency will yield the same output power-decreasing effect. For this reason, it is important to consider the frequency direction towards which the resonant frequency will be shifted [116].

There are several possible ways to influence the self-resonant frequency of the piezo harvester:

(1)

Positioning a set of constant magnets over the vibrating structure;

(2)

Adjusting the length of the cantilever;

(3)

Protruding the tip’s inertial mass.

Extending the tip of the inertial mass would require an additional micromechanical module, controlled by an external electronic circuit, wired near to the piezoelectric element. Adjusting the length of the cantilever is also troublesome due to the necessity of adding an actuator with an adjustable arm length, hence complicating the design further. The author’s opinion is that for purely practical reasons, and motivated by the necessity of simplifying the fine-tuning mechanism, the movement of a set of fixed magnets over the piezoelectric element is most optimal. To accomplish a self-adjusting system, it is best to add an external low-power CPU that will monitor the output power of the piezoelectric element and based on control software estimate whether it is necessary to adjust the magnets’ position and towards which direction. Figure 45 shows a rough block diagram of how such a system should be constructed. The low-power CPU is powered by a supercapacitor module, charged by the piezoelectric element. When a prolonged energy harvesting procedure is detected (a prolonged vibration cycle), the CPU will be woken up from its sleep mode by an external charge-duration circuit. After entering a normal operational mode, the CPU will measure the piezoelectric’s output voltage and perform a tuning check procedure. The tuning check procedure will contain an incremental step of the magnet system, controlled by a step motor. The direction of the rotation of the step motor is defined based on a randomly chosen direction and successive repeated measurements of the piezoelectric output voltage. If the output voltage decreases after the tuning step, then the direction of change must be changed. After the correct direction is found, then the CPU will perform a set of incremental steps, measuring the voltage at each step and it will stop the tuning procedure until it detects a drop in the output voltage.

5.6. Summary of Key Advances in SSHI Techniques for Piezoelectric Energy Harvesting Applications

In recent years, SSHI techniques have become a main solution for optimizing energy harvesting in piezoelectric systems. A large number of approaches have been published over the last few years. In this section, some selected works are compared, highlighting their unique features, performance, and suitability for various applications. By examining advancements in efficiency and design, this study aims to summarize the progress in SSHI technology and provide a clear perspective on its impact in addressing the challenges of miniaturization, adaptability, and performance optimization in piezoelectric energy harvesting systems. In

Table 4. Comparison of selected recently reported SSHI approaches.

Parameter	Sanchez, D.A. et al. [41]	Chamanian, S. et al. [44]	Ben Ammar, M.B. et al. [45]	Du, S. et al. [108]	Çiftci, B. et al. [110]	Fang, S. et al. [129]	Chew, Z. et al. [130]
Topology	Parallel-SSHI	E-SSHI	P-SSHI	SE-SSHC	SSCHI	Series-SSHI	Topology Switching
Piezoelectric Harvester	MIDE V21B and V22B	AB4113B-LW100-R	AB4113B-LW100-R	Custom MEMS	Custom MEMS	Custom PE	MFC8528-P2
Piezoelectric Capacitance	9–26 nF	4.66 nF	n.a.	1.94 nF	2 nF	180 nF	n.a.
Operating Frequency	134.6–229.2 Hz	208 Hz	1 Hz	219 Hz	415 Hz	n.a.	n.a.
Output Voltage	0.7–5 V	0.87 V	3.6 V	2.5 V	1.02 V	n.a.	1.2–20 V
Inductance Value	n.a.	68–820 μH	n.a.	n.a.	68–100 μH	1.5 mH	n.a.
Efficiency	94% (V22B), 89% (V21B)	86% (68 μH) 93% (820 μH)	n.a.	n.a.	78.7% (68 μH), 83% (100 μH)	50%	93–98%
FOM Factor	4.4 (res), 6.81 (off-res)	3.69 (68 μH) 5.23 (820 μH)	n.a.	3.6–8.2	4.56 (68 μH), 5.44 (100 μH)	2.68	n.a.
Device type	Discrete components	Integrated circuit	Discrete Components	Integrated circuit	Integrated circuit	Discrete Components	Discrete Components

n.a. = data not available.

, the most important parameters for the approaches discussed below have been summarized.

Sanchez, D. A. et al. [41] achieved impressive performance improvements over an ideal FBR, with a peak figure-of-merit (FOM) of 6.81 off-resonance and 4.4 in resonance. Its high operational efficiency (94%) includes all control circuits, and it can harness significantly more power from piezoelectric energy sources with low open-circuit voltages (670 mV). The work of Chamanian, S. et al. [44] introduces an autonomous low-profile SSHI circuit fabricated using a 180 nm CMOS process, occupying only 0.28 mm². It offers superior power improvement (up to 5.23 times over ideal FBR) while achieving 93% voltage flipping efficiency. The compact design makes it suitable for piezoelectric harvesters with capacitances in the Nano farad range. A wearable energy harvesting system featuring a GCC-PSSHI circuit was proposed by Ammar, M.B. et al. [45], demonstrating high adaptability to low-frequency and irregular excitations such as footsteps. This solution charges capacitors and batteries efficiently and autonomously, achieving a maximum efficiency of 83.02% and providing up to 3.6 mW of output power. It also features minimal component requirements and robust cold-start capability. A fully integrated SE-SSHC rectifier that eliminates bulky external components, significantly reducing system volume was presented by Du, S. et al. [108]. By employing a split-electrode piezoelectric transducer, the design minimizes the required capacitance for voltage flipping, making it compatible with a wide range of transducer capacitances while ensuring effective energy harvesting in miniaturized systems. Çiftci, B. et al. [110] have presented an autonomous SSHCI circuit with MPPT integration. They achieved a maximum power extraction improvement of 5.44 times over the ideal FBR. Using small external inductors and a compact CMOS design (1.23 mm²), the system achieves 83% power conversion efficiency, demonstrating suitability for embedded electronics and advancing system miniaturization. Fang, S. et al. [129] introduced a series-SSHI circuit that introduces the FNOV-MPPT control method, which tracks the MPP without interrupting the energy harvesting process. Achieving a maximum MPPT efficiency of 98.1%, the design ensures a high degree of energy extraction while maintaining compactness and functionality for weakly coupled piezoelectric harvesters. The last reviewed approach conducted by Chew, Z. [130] describes a topology-switching (VD/FB) rectifier based on the piezoelectric harvester’s voltage. This ensures efficient operation across a wide range of vibrations and excitations, maintaining low power consumption (240–410 nW). The adaptive design amplifies low voltage effectively and prevents overvoltage, making it highly versatile for energy harvesting.

6. Low-Dropout (LDO) Regulators for Piezoelectric Energy Harvesting Applications: Basic Parameters of Commercially Available ICs of LDO Regulators

To obtain a stabilized value of the output DC voltage, a cascade Low-Dropout (LDO) regulator is added after the voltage rectifier. The LDO regulators are used to supply wearable electronic devices due to their ability to provide stable and efficient voltage regulation with minimal power loss. Specially designed LDO regulators with low and ultra-low quiescent currents are commonly used in devices with limited energy sources, such as piezoelectric energy harvesting systems, because of their low power losses. Typically, they are used when multiple supply voltages are required using one harvesting circuit. One of the main advantages of LDO regulators is their low-noise operation. Almost all wearable electronic devices include microcontrollers, sensors, and other components that require precise and clean power to operate effectively. Excessive noise can interfere with signal processing, especially in sensitive applications like health monitoring or fitness tracking. The LDO regulators are essential components in power management circuits, ensuring stable and low-noise power supply to sensitive electronic circuits. These linear voltage regulators maintain a constant output voltage, regardless of the fluctuations of the input voltage and the varying load conditions. Their ability to operate with a minimal voltage difference (dropout voltage) between the input and output makes them highly efficient, particularly in battery-powered and portable devices.

The LDO regulators are widely used in devices requiring low noise and precise voltage regulation, such as consumer electronics, medical instruments, and industrial systems [136]. Unlike their switching counterparts, LDOs generate less electromagnetic interference, making them suitable for applications involving sensitive analog or mixed-signal circuits. The trend toward smaller and more power-efficient devices has further elevated their importance, especially in system-on-chip (SoC) designs where integration and compactness are critical. Capacitor-less LDO designs have emerged as a solution to the removal of bulky external capacitors while improving transient response and stability [136].

The design of LDOs involves addressing several trade-offs, including efficiency, stability, and dynamic response. For instance, achieving low quiescent current is crucial for enhancing battery life in portable and IoT devices, while maintaining high transient performance ensures robustness against rapid load changes. Innovations like multi-loop stabilization and flipped voltage follower (FVF) techniques are being explored to optimize these parameters [137]. Furthermore, modern designs aim to improve metrics such as power supply rejection ratio (PSRR) and transient response without increasing size or power consumption.

6.1. Typical Circuit Diagram of an LDO. Parameter Definition

In Figure 46 a typical circuit diagram of a CMOS LDO is shown [138]. The schematic consists of a voltage reference source V_ref, an error amplifier (EA), a pass pMOS transistor M_p, and voltage feedback, consisting of the resistors R_F and R_N. The RC group of the C_oA and r_oA model the output impedance of the error amplifier, as well as the C_L and R_L simulate the input impedance of the external load. More details about the calculations of the pole frequencies are presented in [138].

For an ideal operational amplifier, the transfer function has the form

$$V_L=\underset{A_V}{\underbrace{\left(1+{\displaystyle \frac{R_F}{R_N}}\right)}}\times V_{ref}.$$

(50)

Regarding the input and the output parameters of the circuit—V_RECT (the rectified voltage or the storage voltage over the energy storage element), V_L, and I_L we could define the Line Regulation (LR) as well as the Load Regulation (LDR):

$$LR={\displaystyle \frac{\Delta V_L}{\Delta V_{RECT}}}={\displaystyle \frac{\Delta A_d}{A_d}}{\displaystyle \frac{1}{1+{\beta }^{-}{A}_d}}-{\displaystyle \frac{\Delta {\beta }^{-}}{{\beta }^{-}}}={\displaystyle \frac{\Delta A_d}{A_d}}{\displaystyle \frac{1}{F^{-}}}-{\displaystyle \frac{\Delta {\beta }^{-}}{{\beta }^{-}}} \mathrm{and}$$

(51)

$$LDR={\displaystyle \frac{\Delta V_L}{\Delta I_L}}\cong {\displaystyle \frac{1}{{\beta }^{-}{A}_d{g}_{mp}}},$$

(52)

where ${\displaystyle \frac{\Delta {\beta }^{-}}{{\beta }^{-}}}={\displaystyle \frac{R_F}{R_N+R_F}}\left({\displaystyle \frac{\Delta R_N}{R_N}}-{\displaystyle \frac{\Delta R_F}{R_F}}\right)$ is the relative change in the negative feedback coefficient, $F^{-}=1+{\beta }^{-}{A}_d$ is the depth of the negative feedback, and $A_d$ is the open-loop voltage gain. Also, less instability can occur at greater depth $F^{-}=1+{\beta }^{-}{A}_d\approx {\beta }^{-}{A}_d$ at ${\beta }^{-}{A}_d>>1$.

As can be seen in Formula (51) the line regulation coefficient is determined by the relative change in the parameters of the negative feedback coefficient through the manufacturing tolerances ($\Delta R_N/R_N$ and $\Delta R_F/R_F$) and temperature coefficients of the resistors $TKR={\displaystyle \frac{\Delta R}{R}}.{\displaystyle \frac{1}{\Delta T}},\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\%/°C$.

As those equations show, the load regulation represents the ability of the LDO to maintain a constant output voltage while the output current changes. On the other hand, the line regulation represents the ability to keep the output voltage while the input voltage is changing. Quantitively, this could be estimated by the so-called Power Supply Rejection Ratio (PSRR). This parameter represents the ability of the regulator to suppress variations in V_RECT, affecting V_L and it could be defined by

$$PSRR=20{\log }_{10}{\displaystyle \frac{\Delta V_L}{\Delta V_{RECT}}}.$$

(53)

Then, the energy efficiency of the LDO is defined by:

$$\eta ={\displaystyle \frac{P_o}{P_{in}}}\times 100\%={\displaystyle \frac{V_L\times I_L}{V_{RECT}(I_L-I_Q)}}\times 100\%,$$

(54)

where I_Q is the quiescent current of the error amplifier.

For the implementation of an error amplifier, differential amplifiers using MOS transistors or basic MOS differential-pair configuration are most often used. To obtain a higher voltage gain, differential amplifier configurations with current-source loads are used. To further increase the gain, so-called cascode differential amplifiers are also used. In this way, telescopic cascodes are obtained because the stacking of several MOS transistors resembles the extension of a telescope [119]. In the implementation of low-voltage LDO regulators, the use of telescopic cascodes can be replaced by the construction of a folded-cascode amplifier. In this way, a high value of the amplification factor can be obtained without increasing the value of the supply voltage and without increasing the current consumption in the circuit. Based on an analysis of the basic folded-cascode amplifier circuit built using CS (common-source) and CG (common-gate) transistors, for the frequency of the dominant pole we can write

$$f_p={\displaystyle \frac{1}{2\pi r_{oA}(C_{oA}||C_{GSp})}}\approx {\displaystyle \frac{1}{2\pi r_{oA}{C}_{GSp}}}.$$

(55)

Then, for the unity-gain frequency, we find

$$B_1=G_m{r}_{oA}{f}_p\approx {\displaystyle \frac{G_m}{2\pi r{C}_{GSp}}}$$

(56)

From a design point of view, the capacitance C_GSp is suitable to be of such value that for the frequency B₁ the phase shift does not exceed 135°, which ensures stable operation of the electronic circuit. If the capacitance C_GSp is not sufficiently large in a given case, then an additional capacitor C_M can be connected in parallel to the C_GSp. It is important to note that as the capacitor C_M increases, the phase margin also increases. In other words, a larger capacitance C_M reduces the error amplifier bandwidth but does not impair its response (which can happen when the phase margin decreases). Of course, in the design process, the capacitor C_M can be increased to obtain the phase margin to its required value.

6.2. Recent Advances of LDOs. Comparative Analysis

A comparative analysis represented in

Table 5. Comparison of selected LDO designs, reported during the last five years.

Parameter	Koniavitis, K. et al. [136]	Sun, M. et al. [137]	Pérez-Bailón, J. et al. [138]	Khan, D. et al. [139]	Gao, M. et al. [140]	Serrano- Reyes, A. et al. [141]	Seo, U.-Y. et al. [142]	Christos K. et al. [143]
Technology	90 nm CMOS	180 nm CMOS	180 nm CMOS	180 nm CMOS	180 nm CMOS	180 nm CMOS	55 nm CMOS	55 nm CMOS
Output Voltage	1 V	1 V	1.2 V	1.8 V	1.8 V	1.8 V	1.0 V	0.5 V
Dropout Voltage	0.4 V	0.2 V	0.6 V	0.1 V	0.2 V	0.1 V	0.1 V	0.05 V
Quiescent Current	100 µA	47 µA	8.6 µA	13.8 µA	66.4 µA	158 µA	12 µA	558 nA
Load Regulation	10 µV/mA	25 µV/mA	5 µV/mA	1.94 µV/mA	6 µV/mA	5.7 µV/mA	0.6 µV/mA	1 µV/mA
PSRR	85 dB	60 dB	n.a.	95 dB	65 dB	85 dB	n.a.	n.a.
Settling Time	n.a.	0.2 µs	n.a.	0.2 µs	n.a.	n.a.	n.a.	0.3 µs
Main advantage	Multiloop design for low noise	Capacitor-less, fast transient response	Compact, temperature robust design	High gain, three-stage design	Enhanced transient response	Reverse Nested Miller Compensation	Electrostatic discharge protection	Event-driven, fast startup oscillator
Year	2024	2024	2021	2022	2023	2023	2024	2020

n.a. = data not available.

was made to overview key parameters for selected LDO designs drawn from recent approaches. The selection of works is mainly based on devices with low power losses which are suitable for wearable power supplies. These works were chosen for their focus on innovative solutions to enhance LDO performance, making them highly relevant for modern low-power, and wearable electronic applications. The selection includes designs optimized for capacitor-less operation, ultra-low power consumption, improved transient response, and robust noise immunity. These features are critical for devices like wearables, Internet of Things (IoT) systems, and portable electronics, where efficiency, compactness, and reliability are paramount.

The comparison examines essential parameters such as the technology node, output voltage, dropout voltage, quiescent current, load regulation, PSRR, settling time, and unique features. The technology node reflects the level of integration and power efficiency achievable, with advanced nodes such as 55 nm CMOS offering improved scalability. Parameters like dropout voltage and quiescent current highlight the designs’ energy-saving capabilities, essential for prolonging battery life in wearable devices. Load regulation and PSRR provide insight into the stability and noise resilience of each design, ensuring consistent performance under varying load conditions and in noisy environments. Settling time demonstrates the responsiveness of the LDO, a key parameter for systems that demand fast adaptation to dynamic loads. Additionally, unique features such as capacitor-less architecture, event-driven control, and ESD protection distinguish these works by addressing specific challenges in their target applications.

In ref. [136] Koniavitis, K. et al. describe a multiloop stabilized LDO regulator, emphasizing its low voltage operation and small compensation capacitor, which reduces the used chip area. The regulator demonstrated stability across process, voltage, and temperature (PVT) variations, with a high phase margin, showcasing its robustness for future use in integrated systems. Sun, M. et al. [137] present a capacitor-less LDO design suitable for digital-analog hybrid circuits, achieving stability even without on-chip capacitors by employing an RIPO and SSFB technique. The design’s ability to handle a wide load current range with an efficient transient response was highlighted. The approach from Pé-rez-Bailón, J. et al. [138] focuses on an output capacitor-less LDO regulator optimized for battery-powered devices. With its low quiescent current and relatively small chip area, this design is characterized by its good transient performance and efficiency, providing a viable solution for portable on-chip applications. Khan, D. et al. [139] explore the integration of multiple LDOs in a power unit for SoC applications, demonstrating high PSRR and load regulation. It highlights the stability of the LDOs across various output voltages (1.5 V, 3 V, 5 V) and their performance in delivering stable outputs under varying load conditions. Gao, M. et al. [140] discuss a high-speed LDO that incorporates transient enhancement techniques. The use of a class AB super source follower and an active capacitor circuit results in fast transient responses and low overshoot/undershoot, making the LDO suitable for automotive sensor chips. Serra-no-Reyes, A. et al. [141] present a compact LDO regulator using reverse nested Miller compensation, designed for enhanced regulation, dynamic response, and power efficiency. The LDO shows stable operation across a wide input voltage range and load current variations, reducing transient overshoot and undershoot, thus offering a compact, power-efficient solution for low-power devices. Seo, U.-Y. et al. [142] introduce an LDO regulator with integrated ESD protection, They claim that the LDO shows stable voltage output under load current variations. The proposed design proves its suitability for mobile applications requiring robust voltage regulation and high reliability in the face of potential IC damage from ESD events. Christos K. et al. [143] discuss a D-LDO designed for ultra-low-power and ultra-low-voltage IoT applications. The use of a burst oscillator allows for instant load response, offering exceptional power efficiency and a significant improvement in power efficiency compared to analog LDOs. This design is ideal for IoT systems requiring low quiescent current and high efficiency.

6.3. Commercially Available IC of LDOs

Building on the previous section, which analyzed innovative scientific approaches to LDO design, in this section commercially available LDO are compared. Only devices with low and ultra-low quiescent current are selected which are suitable for wearing applications. In

Table 6. Comparison of selected commercially available low-dropout (LDO) regulators.

Parameter	TPS7A16A-Q1 [144]	XC6206J [145]	STLQ015 [146]	MAX15007 [147]	MIC5365 [148]	LP5907 [149]
Input voltage	3–60 V	1.5–6.0 V	1.5–5.5 V	4.0–40 V	2.5–5.5 V	2.2–5.5 V
Output voltage	2.5–6.5 V	0.9–4.0 V	0.8–3.3 V	3.3 V	1.5–5.0 V	1.2–4.5 V
Quiescent current	25 µA	1 µA	1.4 µA	91 µA	29 µA	12 µA
Dropout voltage	300 mV	200 mV	60 mV	400 mV	80 mV	120 mV
Max output current	100 mA	200 mA	150 mA	350 mA	150 mA	250 mA
Main advantage	Wide input range, excellent PSRR	Ultra-low power, portable-friendly	Nano-power, optimized for IoT and wearables	Automotive reliability, industrial-grade	Compact design, ultra-low power	High PSRR, noise-sensitive applications

selected ICs with low quiescent current, which are mainly suitable for wearing devices are presented.

Table 6 provides a comparative analysis of six commercially available low-dropout regulators [144,145,146,147,148,149], showing their capabilities and suitability for different applications. The first two ICs that are compared are TPS7A16A-Q1 [144] from Texas Instruments (Dallas, TX, USA) and MAX15007 [147] from Analog Devices (Wilmington, MA, USA). They are designed for automotive and industrial systems, offering high reliability and broad input voltage ranges. The ICs specially designed for portable electronics are XC6206J [145] from Torex (Tokyo, Japan), STLQ015 [146] from STMicroelectronics (Geneva, Switzerland), and MIC5365 [148] from Microchip Technology (Chandler, Arizona, USA). They are characterized by ultra-low quiescent currents, which optimize battery life. Lastly, the LP5907 [149], also from Texas Instruments, delivers excellent high PSRR, making it an ideal choice for noise-sensitive analog circuits. This comparison highlights how manufacturers tailor LDO designs to balance energy efficiency, robustness, and noise performance across diverse applications.

7. Conclusions

In recent years, wearable electronic devices have grown in popularity, especially for health monitoring. These devices require power supplies that are small, lightweight and well-integrated into the human body. Traditional batteries pose challenges due to their limited lifespan, large size, and the need for frequent replacements. To address these problems, battery-free power supplies combining supercapacitors with piezoelectric generators are discussed. They offer good efficiency and smaller form factors. Furthermore, low-power integrated circuits, such as synchronized switch harvesting on inductors (SSHIs) and LDO regulators are presented. These circuits help to simplify power management and reduce the overall size of wearable devices.

In this paper, the focus of the authors’ attention was placed on the analysis of circuit configurations suitable for the development of wearable battery-free power supply devices. The functioning of this class of battery-free power supplies involves the use of thin-film piezoelectric input generators, which convert the energy of mechanical vibrations spontaneously arising as a result of human activity into electrical energy. Since the analysis was concentrated on the application of power sources in biomedical signal processing systems, the paper presented an overview of contemporary thin-film piezoelectric generators. The paper analyzed the structure, the principle of operation, and the most important parameters that can be used as a basis for forming the parameters of the internal equivalent impedance of the generators. Due to the specific structure, method of use, and values of the electrical parameters of thin-film piezoelectric generators, the selection of an appropriate circuit configuration of the input stage, converting AC to DC voltage, is essential for obtaining a sufficient value for the energy efficiency coefficient. The structure, operating principles, and the most important parameters of various circuit configurations suitable for the design of input stages for thin-film piezoelectric piezo harvesters were analyzed in the greatest detail. In reviewing the input stages, the authors have tried to point out the advantages and disadvantages of each circuit, depending on the specific source, the designer can choose the most suitable configuration. The authors have presented a design approach that indicates the various available compromises when selecting a circuit configuration and when selecting component values for a given configuration. This approach is characteristic of the design most often of analog circuits, which are largely the input stages in the circuits for converting AC to DC voltage. Unlike digital circuits, there are still no algorithms and programs for analog and analog circuits with pulse output that would fully ensure the design process. This is due, on the one hand, to the wide variety of options for a given type of circuit, and on the other hand, in some cases, it is relatively difficult to cover the issue in a purely theoretical way, since there are often mutually contradictory requirements. To a significant extent, the design of analog circuits requires specialized knowledge and skills acquired through many years of experience. The analog circuits are more sensitive to non-idealities and any other second and higher-order effects, as well as to parasitic interference (“interference” between channels, noise from transistor substrates, noise from external sources, etc.). In the group of analog circuits, the subjects of consideration were bridge rectifiers using Schottky diodes or transistors (BJTs and MOSFETs) and voltage-doubler rectifiers implemented with Schottky diodes and an active diode with regulation loop, composed by an op-amp. The paper does not consider multipliers with a higher multiplication factor, since for thin-film piezo harvesters there would be a limitation in the level of the rectified output voltage. In the group of analog circuits with pulsed output, the subject of analysis is SSHI (Synchronized Switch Harvesting on Inductor) based energy harvesting circuits, connected before the voltage rectifier to increase the amplitude of the AC voltage. To illustrate the practical applicability, an electronic circuit implementing the SSHI technique with an output-coupled inductor booster was studied. Based on computer simulations for sample electronic circuits, the influence of various parameters on the level of the output rectified voltage and the output power was studied. Of the performed analysis, a practical approach for piezoelectric harvester resonant frequency matching and tuning was proposed.

To provide a stable and low-noise power supply to sensitive electronic circuits, the structure and principle of operation of a typical schematic diagram of a CMOS low-dropout (LDO) regulator were analyzed in the paper. Also, the key parameters for selected LDO designs drawn from recent approaches were presented. Based on a comparative analysis, the most important advantages and disadvantages were discussed and the possibilities for use in wearable electronic devices were considered. In addition to the presented custom LDO designs, reported during the last five years, the electrical parameters of the commercially available IC of LDOs, suitable for the design of electronic systems of low-power piezoelectric energy harvesting circuits for wearable power supply devices, were also systematized.

Looking ahead, the opportunity to develop self-sustaining wearable devices powered by body heat, movement, or biochemical reactions is promising. More efficient power management and energy harvesting systems could lead to smaller, longer-lasting wearable electronics. However, challenges in miniaturization, cost, and stability must be addressed for these solutions to become widely adopted in commercial products. Based on the analysis presented in this paper within the framework of project BG-RRP-2.004-0005, the future work of the authors is to synthesize electronic circuits of micro-power piezoelectric energy harvesting circuits for wearable battery-free power supply devices. The electronic circuits are intended to be implemented on flexible printed circuit boards and to provide the ability to obtain several stabilized DC voltages in the range from 1.2 V to 3.3 V and output power of no less than a few mW.