Stability Analysis of a Receiving-End VSC-HVDC System with Parallel-Connected VSCs

Abstract

Voltage source converter-based high-voltage direct current (VSC-HVDC) systems integrated into weak AC grids may exhibit oscillation-induced instability, posing significant threats to power system security. With increasing structural complexity and diverse control strategies, the stability characteristics of VSC-HVDC system require further investigation. This paper focuses on the stability of a receiving-end VSC-HVDC system consisting of a DC voltage-controlled VSC parallel-connected to a power-controlled VSC, under various operating conditions. First, small-signal models of each subsystem were developed and a linearized full-system model was constructed based on port relationships. Then, eigenvalue and participation factor analyses were utilized to evaluate the influence of control strategy, asymmetrical grid strength, power flow direction, and tie line on the system’s small-signal stability. A feasible short-circuit ratio (SCR) region was established based on joint power–topology joint, forming a stable operating space for the system. Finally, the correctness of the theoretical analysis was validated via MATLAB/Simulink time-domain simulations. Results indicate that, in comparison to the power control strategy, the DC voltage control strategy was more sensitive to variations in the AC system and demands a strong grid, and this disparity was predominantly caused by the DC voltage control. Furthermore, the feasible region of the short-circuit ratio (SCR) diminished with the increase in the length of the tie-line and alterations in power flow direction under the mutual-support power mode, leading to a gradual reduction in the system’s stability margin.

1. Introduction

By means of flexible control over their converters, VSC-HVDC systems can achieve rapid power flow reversal, ensuring stable power transmission and optimized power distribution, thereby promoting efficient energy utilization and low-carbon development. Consequently, they have been widely applied in fields such as power grid integration of renewable energy and interconnection of multi-regional systems [1,2,3,4,5]. However, as typical power electronic conversion devices, voltage source converter (VSCs) exhibit dynamic characteristics that significantly influence system stability [6,7]. In recent years, oscillation incidents in VSC-HVDC systems have occurred frequently in various regions globally, posing severe threats to the safe and stable operation of power systems.

Owing to their increasingly complex and variable operating conditions, oscillation-induced instability has emerged as a critical issue constraining the development of VSC-HVDC systems [8]. To address the issue, the impact of phase-locked loop (PLL) parameters, grid strength, and current inner-loop parameters on system stability have been analyzed in previous research [9] where the frequency-domain model including PLL, current inner loops, and grid impedance was established. Researchers [10] have pointed out that AC/DC converter stability heavily relies on the DC-link voltage, and virtual inertia has been employed to mitigate rapid changes in DC-link voltage, achieving stable and reliable grid operation. An equivalent single-input single-output model of VSC-HVDC connected to a weak grid was developed [11] in order to analyze the coupling interaction between PLL bandwidth and power control loops. Through eigenvalue analysis, the controller bandwidth stability boundaries for VSCs connected to extremely weak grids have been quantified [12], exploring the interaction between inner and outer control loops. Furthermore, the impact of inner control parameters and SCR on system stability has been analyzed [13] by establishing an AC impedance model of a VSC-HVDC system. The results indicated that as SCR decreased, the eigenvalues of the impedance matrix approached critical points, thereby leading to a degradation in system stability.

The aforementioned studies primarily analyzed the influence of system and control parameters on the stability of single converter systems, and the impact of the strong coupling between control loops among multiple converters needs further consideration. The dynamic interactions between different VSCs have been investigated [14] using frequency-domain analysis and equations of motion, revealing the impact of different droop coefficients on system dynamic characteristics by analyzing discrepancies in equivalent damping and inertia coefficients. In terms of the interactive coupling effects between converters, participation factor analysis was adopted [15,16] to quantitatively assess the contribution of state variables from different converters in dominant oscillation modes. The results indicated that controller state variables directly related to DC-side electrical quantities contributed significantly, proving that interactions among converters degraded the system’s stability margins. However, the research scenarios of the above studies were limited to VSC-HVDC systems with single control strategies. Regarding the stability analysis of VSC-HVDC systems with multiple control strategies, the impact of different control strategies and power flow reversal on the small-signal stability of a four-terminal VSC-HVDC system was investigated [17] by employing modal analysis. The results indicated that reversal of the power flow increased the risk of oscillation-induced instability. Combining grid-forming control with typical DC voltage droop control, there exists a mode of low-frequency harmonic instability in the MTDC system [18] under the interactions between the converters with different control strategies.

The existing literature primarily employs power-weighted averaging methods [19,20,21] or parameter aggregation identification approaches [22,23] to equivalently represent multiple VSCs as a single aggregated model, thereby neglecting the differential impacts imposed by heterogeneous control strategies. In contrast, the dual-receiving-end VSC-HVDC system investigated in this paper originates from the Baihetan–Jiangsu ultra-high voltage hybrid cascaded HVDC transmission practical project [24], adopting a parallel VSC architecture combining DC voltage control and active/reactive power control. Conventional multi-terminal HVDC or multi-infeed HVDC systems exhibit electrical topology configurations with singular coupling exclusively on either the DC or AC side, whereas the investigated system demonstrates strong bilateral coupling characteristics across both AC and DC sides. Considering the divergences in converter control strategies and electrical topologies between existing research and the system investigated in this paper, prior analytical conclusions exhibit limited applicability in explaining the oscillation mechanisms within the specific engineering configuration.

By conducting modeling and mechanistic analysis of a dual-receiving-end VSC-HVDC system that rigorously incorporates practical engineering constraints, this paper aims at elucidating oscillation characteristics under diversified control strategies and delivering practical operational guidance for enhancing stability. The principal contributions are summarized as follows:

• A small-signal model of dual-receiving-end VSC-HVDC system connected to asymmetric weak grids is established, clarifying the interactive coupling relationships between AC network, control system, and DC-link;
• The influence of control strategy, asymmetrical grid strength, power flow direction, and tie line on the small-signal stability is analyzed, and a feasible SCR region constrained by power and topology is formed, providing guidance for dynamic adjustment of system parameters;
• Based on various influencing factors, a variety of operating conditions are constructed to validate the effectiveness of the feasible SCR region.

The remainder of this paper is organized as follows. The topology and control strategies of the dual-receiving-end VSC-HVDC system are analyzed in Section 2. Section 3 establishes and validates the system’s small-signal model. In Section 4, the impact patterns of critical parameters on the small-signal stability of system are investigated, and the feasible SCR region constrained by multiple factors is constructed. Finally, the conclusions are drawn in Section 5.

2. Structure and Controller of Dual-Receiving-End VSC-HVDC System

The main circuit of a dual-receiving-end VSC-HVDC system is shown in Figure 1. The system’s topology features VSC₁ and VSC₂ connected in parallel on the DC side through a common DC bus, with the AC sides connected to two different AC systems (AC₁ and AC₂). AC₁ and AC₂ are interconnected through a tie line. VSC₁-HVDC employs DVC to support the DC bus voltage u_dc, with corresponding variables denoted by i = 1. VSC₂-HVDC adopts PQC to ensure stable power transmission, with corresponding variables denoted by i = 2. The DC ports stabilize u_dc through a DC capacitor C_dc, and the AC ports connects to the AC systems through transformers T_i. Variables such as $u_{\mathrm{c}}^{\mathrm{VSC}i}$, i_dci, and $i_{\mathrm{pcc}}^{\mathrm{VSC}i}$ represent AC port voltage, DC current, and AC current of VSC, respectively, while $u_{\mathrm{pcc}}^{\mathrm{VSC}i}$ stands for the voltages at point of common coupling (PCC). The DC transmission line current is represented by i_line. The equivalent electromotive force and grid-side current of the AC system are denoted by $u_{\mathrm{g}}^{\mathrm{VSC}i}$ and $i_{\mathrm{g}}^{\mathrm{VSC}i}$, respectively. The current of the tie line is represented by i_tie, while R_gi and L_gi stand for the equivalent resistance and inductance of the AC system, respectively, characterizing the grid strength. The resistance and inductance of the tie line are denoted by R_tie and L_tie, respectively, while R_Ti and L_Ti represent the leakage resistance and inductance of T_i, respectively. Additionally, VSC₂-HVDC is equipped with a mutual-support power mode, characterized by reversed active power transmission direction, providing power support to AC₁.

The control architecture of the dual-receiving-end VSC-HVDC system is presented in Figure 2. Both VSC₁-HVDC and VSC₂-HVDC employ current vector control (VCC), with $k_{\mathrm{pi}}^{\mathrm{VSC}i}$ and $k_{\mathrm{ii}}^{\mathrm{VSC}i}$ representing the proportional and integral coefficients, respectively. The proportional and integral coefficients of the DC voltage outer loop are denoted by k_pv and k_iv, respectively, while k_pac and k_iac represent the proportional and integral coefficients of the power outer loop, respectively. The controller outputs modulation signals $m_{\mathrm{d}}^{\mathrm{VSC}i}$ and $m_{\mathrm{q}}^{\mathrm{VSC}i}$ in a dq rotating reference frame, which are transformed to the three-phase stationary coordinate system via inverse Park transformation and then modulated by sinusoidal pulse width modulation (SPWM) to generate the converter’s AC port voltage. In addition, the synchronous reference frame PLL (SRF-PLL) is utilized, with ${\theta }_{\mathrm{pll}}^{\mathrm{VSC}i}$ and ω₀ representing the phase tracked by PLL and the rated angular frequency, respectively. The proportional and integral coefficients of the PLL controller are denoted by $k_{\mathrm{ppll}}^{\mathrm{VSC}i}$ and $k_{\mathrm{ipll}}^{\mathrm{VSC}i}$, respectively.

In this paper, subscripts abc, dq, and xy denote variables in the three-phase stationary coordinate system, dq rotating reference frame, and xy coordinate system, respectively. Uppercase letters and the superscript ^ represent steady-state values and small-signal quantities of variables, respectively. Bold type denotes vectors, and the symbol s represents the Laplace operator.

The following assumptions are stated prior to conducting modeling and analysis:

• The delays in the modulation process and sampling are neglected. This is because the modulation and sampling frequencies are typically much higher, mainly influencing the system’s high-frequency behavior, with limited effect on the 10–100 Hz frequency band that is the focus of this study [25];
• Since the power loss of the converter typically accounts for approximately 1% of its rated capacity, it is neglected in this study. Accordingly, the AC-side power of the VSC is assumed to be equal to its DC-side power [26];
• In the process of system modeling, the external characteristics of the receiving-end VSC-HVDC system serve as the main concern in this paper. As a result, its internal dynamic characteristics are neglected, and a two-level VSC is employed as a substitute for MMC [27].

3. Small-Signal Modeling

In this section, linearized state-space models for the controller, AC network, and DC-link subsystems are first established, based on the dynamic equations of the dual-receiving-end VSC-HVDC system. Subsequently, the subsystem models are combined to obtain a linearized closed-loop transfer function model, whose validity is verified through time-domain simulations. The AC part of the system is modeled in the xy coordinate system, while the controller part is modeled in the dq rotating reference frame for compatibility with VCC.

3.1. Small-Signal Modeling of AC Network

The dynamic equations of the AC port for the VSC grid can be expressed by Equation (1), where, i = 1, 2; ${\mathit{i}}_{\mathrm{gxy}}^{\mathrm{VSC}1}={\mathit{i}}_{\mathrm{pccxy}}^{\mathrm{VSC}1}/T_1-{\mathit{i}}_{\mathrm{tiexy}}$, ${\mathit{i}}_{\mathrm{gxy}}^{\mathrm{VSC}2}={\mathit{i}}_{\mathrm{pccxy}}^{\mathrm{VSC}2}/T_2+{\mathit{i}}_{\mathrm{tiexy}}$.

$$\left\{\begin{array}{l}\mathrm{d}{i}_{\mathrm{pccx}}^{\mathrm{VSC}i}/\mathrm{d}t=\left(u_{\mathrm{cx}}^{\mathrm{VSC}i}-u_{\mathrm{pccx}}^{\mathrm{VSC}i}/T_i-R_{\mathrm{Ti}}{i}_{\mathrm{pccx}}^{\mathrm{VSC}i}+{\omega }_0{L}_{\mathrm{T}i}{i}_{\mathrm{pccy}}^{\mathrm{VSC}i}\right)/L_{\mathrm{T}i}\\ \mathrm{d}{i}_{\mathrm{pccy}}^{\mathrm{VSC}i}/\mathrm{d}t=\left(u_{\mathrm{cy}}^{\mathrm{VSC}i}-u_{\mathrm{pccy}}^{\mathrm{VSC}i}/T_i-R_{\mathrm{T}i}{i}_{\mathrm{pccy}}^{\mathrm{VSC}i}-{\omega }_0{L}_{\mathrm{T}i}{i}_{\mathrm{pccx}}^{\mathrm{VSC}i}\right)/L_{\mathrm{T}i}\\ \mathrm{d}{i}_{\mathrm{gx}}^{\mathrm{VSC}i}/\mathrm{d}t=\left(u_{\mathrm{pccx}}^{\mathrm{VSC}i}-u_{\mathrm{gx}}^{\mathrm{VSC}i}-R_{\mathrm{g}i}{i}_{\mathrm{gx}}^{\mathrm{VSC}i}+{\omega }_0{L}_{\mathrm{g}i}{i}_{\mathrm{gy}}^{\mathrm{VSC}i}\right)/L_{\mathrm{g}i}\\ \mathrm{d}{i}_{\mathrm{gy}}^{\mathrm{VSC}i}/\mathrm{d}t=\left(u_{\mathrm{pccy}}^{\mathrm{VSC}i}-u_{\mathrm{gy}}^{\mathrm{VSC}i}-R_{\mathrm{g}i}{i}_{\mathrm{gy}}^{\mathrm{VSC}i}-{\omega }_0{L}_{\mathrm{g}i}{i}_{\mathrm{gx}}^{\mathrm{VSC}i}\right)/L_{\mathrm{g}i}\end{array}\right.$$

(1)

According to Formula (1), the VSC output current ${\mathit{i}}_{\mathrm{pccxy}}^{\mathrm{VSC}i}$ and the system current ${\mathit{i}}_{\mathrm{gxy}}^{\mathrm{VSC}i}$ are selected as state variables ${\mathit{X}}_{\mathrm{AC}i}$, and the VSC output voltage ${\mathit{u}}_{\mathrm{cxy}}^{\mathrm{VSC}i}$ and PCC voltage ${\mathit{u}}_{\mathrm{pccxy}}^{\mathrm{VSC}i}$ as input variables ${\mathit{U}}_{\mathrm{AC}i}$; the small-signal model of the AC network can be described as follows:

$$\left\{\begin{array}{l}\Delta {\dot{\mathit{X}}}_{\mathrm{AC}i}={\mathit{A}}_{\mathrm{AC}i}\Delta {\mathit{X}}_{\mathrm{AC}i}+{\mathit{B}}_{\mathrm{AC}i}\Delta {\mathit{U}}_{\mathrm{AC}i}\hfill \\ \Delta {\mathit{Y}}_{\mathrm{AC}i}={\mathit{C}}_{\mathrm{AC}i}\Delta {\mathit{X}}_{\mathrm{AC}i}+{\mathit{D}}_{\mathrm{AC}i}\Delta {\mathit{U}}_{\mathrm{AC}i}\hfill \end{array}\right.$$

(2)

where:

$$\begin{array}{l}{\mathit{A}}_{\mathrm{AC}i}=\left[\begin{array}{cccc}-R_{\mathrm{Ti}}& {\omega }_0{L}_{\mathrm{T}i}& 0& 0\\ -{\omega }_0{L}_{\mathrm{T}i}& -R_{\mathrm{Ti}}& 0& 0\\ 0& 0& -R_{\mathrm{g}i}& {\omega }_0{L}_{\mathrm{g}i}\\ 0& 0& -{\omega }_0{L}_{\mathrm{g}i}& -R_{\mathrm{g}i}\end{array}\right],{\mathit{B}}_{\mathrm{AC}i}=\left[\begin{array}{cccccc}1& 0& -1& 0& 0& 0\\ 0& 1& 0& -1& 0& 0\\ 0& 0& 1& 0& -1& 0\\ 0& 0& 0& 1& 0& -1\end{array}\right],\\ {\mathit{C}}_{\mathrm{AC}i}=\left[\begin{array}{cccc}1& 0& 0& 0\\ 0& 1& 0& 0\\ 0& 0& 1& 0\\ 0& 0& 0& 1\end{array}\right],{\mathit{D}}_{\mathrm{AC}i}={\mathbf{0}}_{4\times 6}\end{array}$$

Similarly, by defining the tie line current $i_{\mathrm{tiex}}$ and $i_{\mathrm{tiey}}$ as the state variable ${\mathit{X}}_{\mathrm{tie}}$, and the PCC voltages of AC1 and AC2, namely ${\mathit{u}}_{\mathrm{pccxy}}^{\mathrm{VSC}1}$ and ${\mathit{u}}_{\mathrm{pccxy}}^{\mathrm{VSC}1}$, as the input variable ${\mathit{U}}_{\mathrm{tie}}$, the linearized model of the tie line is obtained as follows:

$$\left\{\begin{array}{l}\mathrm{d}{i}_{\mathrm{tiex}}/\mathrm{d}t=\left(u_{\mathrm{pccx}}^{\mathrm{VSC}1}-u_{\mathrm{pccx}}^{\mathrm{VSC}2}-R_{\mathrm{tie}}{i}_{\mathrm{tiex}}+{\omega }_0{L}_{\mathrm{tie}}{i}_{\mathrm{tiey}}\right)/L_{\mathrm{tie}}\\ \mathrm{d}{i}_{\mathrm{tiey}}/\mathrm{d}t=\left(u_{\mathrm{pccy}}^{\mathrm{VSC}1}-u_{\mathrm{pccy}}^{\mathrm{VSC}2}-R_{\mathrm{tie}}{i}_{\mathrm{tiey}}-{\omega }_0{L}_{\mathrm{tie}}{i}_{\mathrm{tiex}}\right)/L_{\mathrm{tie}}\end{array}\right.$$

(3)

$$\left\{\begin{array}{l}\Delta {\dot{\mathit{X}}}_{\mathrm{tie}}={\mathit{A}}_{\mathrm{tie}}\Delta {\mathit{X}}_{\mathrm{tie}}+{\mathit{B}}_{\mathrm{tie}}\Delta {\mathit{U}}_{\mathrm{tie}}\hfill \\ \Delta {\mathit{Y}}_{\mathrm{tie}}={\mathit{C}}_{\mathrm{tie}}\Delta {\mathit{X}}_{\mathrm{tie}}+{\mathit{D}}_{\mathrm{tie}}\Delta {\mathit{U}}_{\mathrm{tie}}\hfill \end{array}\right.$$

(4)

where ${\mathit{A}}_{\mathrm{tie}}=\left[\begin{array}{cc}-R_{\mathrm{tie}}& {\omega }_0{L}_{\mathrm{tie}}\\ -{\omega }_0{L}_{\mathrm{tie}}& -R_{\mathrm{tie}}\end{array}\right],{\mathit{B}}_{\mathrm{tie}}=\left[\begin{array}{cccc}1& 0& -1& 0\\ 0& 1& 0& -1\end{array}\right],{\mathit{C}}_{\mathrm{tie}}=\left[\begin{array}{cc}1& 0\\ 0& 1\end{array}\right],{\mathit{D}}_{\mathrm{tie}}={\mathbf{0}}_{2\times 4}$

3.2. Small-Signal Modeling of DC-Link

The dynamic equation of the DC port for the dual-receiving-end VSC-HVDC system can be given by Equation (5), as follows:

$$\mathrm{d}{u}_{\mathrm{dc}}/\mathrm{d}t=\left(i_{\mathrm{line}}-i_{\mathrm{dc}1}-i_{\mathrm{dc}2}\right)/C_{\mathrm{dc}}$$

(5)

Neglecting VSC losses, the AC side power equals the DC side power, as follows:

$$\left\{\begin{array}{l}{u}_{\mathrm{dc}}{i}_{\mathrm{dc}i}={\displaystyle \frac{3}{2}}{u}_{\mathrm{cd}}^{\mathrm{VSC}i}{i}_{\mathrm{pccd}}^{\mathrm{VSC}i}+{\displaystyle \frac{3}{2}}{u}_{\mathrm{cq}}^{\mathrm{VSC}i}{i}_{\mathrm{pccq}}^{\mathrm{VSC}i}\\ {\mathit{u}}_{\mathrm{cdq}}^{\mathrm{VSC}i}={\displaystyle \frac{u_{\mathrm{dc}}}{2}}{\mathit{m}}_{\mathrm{dq}}^{\mathrm{VSC}i}\end{array}\right.$$

(6)

The small-signal model of DC-link can be derived as Equation (7) via the linearization of Equations (5) and (6).

$$p{\widehat{u}}_{\mathrm{dc}}={{\displaystyle \widehat{i}}}_{\mathrm{line}}-{\displaystyle \frac{3}{4C_{\mathrm{dc}}}}{\displaystyle \sum _{i=1}^2\left({\mathit{M}}_{\mathrm{dq}}^{\mathrm{VSC}i,\mathrm{T}}{{\displaystyle \widehat{\mathit{i}}}}_{\mathrm{pccdq}}^{\mathrm{VSC}i}+{\mathit{I}}_{\mathrm{pccdq}}^{\mathrm{VSC}i,\mathit{T}}{{\displaystyle \widehat{\mathit{m}}}}_{\mathrm{dq}}^{\mathrm{VSC}i}\right)}$$

(7)

3.3. Small-Signal Modeling of Controller

The dynamic equations and output equations of the controller are given by Equations (8) and (9), respectively, where i = 1, 2; $x_{\mathrm{od}}^{\mathrm{VSC}1}$, ${\mathit{x}}_{\mathrm{odq}}^{\mathrm{VSC}2}$ and ${\mathit{x}}_{\mathrm{idq}}^{\mathrm{VSC}i}$ denote state variables of the controller. Take the controller of VSC₁ as an example, the input and output variables are U_Con1 = [${\mathit{u}}_{\mathrm{pccdq}}^{\mathrm{VSC}1,\mathrm{T}}$, ${\mathit{i}}_{\mathrm{pccdq}}^{\mathrm{VSC}1,\mathrm{T}}$, u_dc, u_dcref, $i_{\mathrm{pccqref}}^{\mathrm{VSC}1}$]^T and Y_Con1 = ${\mathit{m}}_{\mathrm{dq}}^{\mathrm{VSC}1}$, respectively.

$$\left\{\begin{array}{l}\mathrm{d}{x}_{\mathrm{od}}^{\mathrm{VSC}1}/\mathrm{d}t=k_{\mathrm{pv}}\left(u_{\mathrm{dc}}-u_{\mathrm{dcref}}\right)\\ \mathrm{d}{x}_{\mathrm{od}}^{\mathrm{VSC}2}/\mathrm{d}t=k_{\mathrm{iac}}\left(P_{2\mathrm{ref}}-P_{\mathrm{VSC}2}\right)\\ \mathrm{d}{x}_{\mathrm{oq}}^{\mathrm{VSC}2}/\mathrm{d}t=k_{\mathrm{iac}}\left(Q_{2\mathrm{ref}}-Q_{\mathrm{VSC}2}\right)\\ \mathrm{d}{x}_{\mathrm{id}}^{\mathrm{VSC}i}/\mathrm{d}t=k_{\mathrm{ii}}^{\mathrm{VSC}i}\left(i_{\mathrm{pccdref}}^{\mathrm{VSC}i}-i_{\mathrm{pccd}}^{\mathrm{VSC}i}\right)\\ \mathrm{d}{x}_{\mathrm{iq}}^{\mathrm{VSC}i}/\mathrm{d}t=k_{\mathrm{ii}}^{\mathrm{VSC}i}\left(i_{\mathrm{pccqref}}^{\mathrm{VSC}i}-i_{\mathrm{pccq}}^{\mathrm{VSC}i}\right)\end{array}\right.$$

(8)

$$\left\{\begin{array}{l}{i}_{\mathrm{pccdref}}^{\mathrm{VSC}1}=x_{\mathrm{od}}^{\mathrm{VSC}1}+k_{\mathrm{pv}}\left(u_{\mathrm{dc}}-u_{\mathrm{dcref}}\right)\\ i_{\mathrm{pccdref}}^{\mathrm{VSC}2}=x_{\mathrm{od}}^{\mathrm{VSC}2}+k_{\mathrm{pac}}\left(P_{2\mathrm{ref}}-P_{\mathrm{VSC}2}\right)\\ i_{\mathrm{pccqref}}^{\mathrm{VSC}2}=x_{\mathrm{oq}}^{\mathrm{VSC}2}+k_{\mathrm{pac}}\left(Q_{2\mathrm{ref}}-Q_{\mathrm{VSC}2}\right)\\ m_{\mathrm{d}}^{\mathrm{VSC}i}=x_{\mathrm{id}}^{\mathrm{VSC}i}+k_{\mathrm{pi}}^{\mathrm{VSC}i}\left(i_{\mathrm{pccdref}}^{\mathrm{VSC}i}-i_{\mathrm{pccd}}^{\mathrm{VSC}i}\right)+u_{\mathrm{pccd}}^{\mathrm{VSC}i}-{\omega }_0{L}_{\mathrm{T}i}{i}_{\mathrm{pccq}}^{\mathrm{VSC}i}\\ m_{\mathrm{q}}^{\mathrm{VSC}i}=x_{\mathrm{iq}}^{\mathrm{VSC}i}+k_{\mathrm{pi}}^{\mathrm{VSC}i}\left(i_{\mathrm{pccqref}}^{\mathrm{VSC}i}-i_{\mathrm{pccq}}^{\mathrm{VSC}i}\right)+u_{\mathrm{pccq}}^{\mathrm{VSC}i}+{\omega }_0{L}_{\mathrm{T}i}{i}_{\mathrm{pccd}}^{\mathrm{VSC}i}\end{array}\right.$$

(9)

The small-signal models of the controller can be derived as below through the linearization of Equations (8) and (9):

$$\left\{\begin{array}{l}\Delta {\dot{\mathit{X}}}_{C\mathrm{on}i}={\mathit{A}}_{C\mathrm{on}i}\Delta {\mathit{X}}_{C\mathrm{on}i}+{\mathit{B}}_{C\mathrm{on}i}\Delta {\mathit{U}}_{C\mathrm{on}i}\hfill \\ \Delta {\mathit{Y}}_{C\mathrm{on}i}={\mathit{C}}_{C\mathrm{on}i}\Delta {\mathit{X}}_{C\mathrm{on}i}+{\mathit{D}}_{C\mathrm{on}i}\Delta {\mathit{U}}_{C\mathrm{on}i}\hfill \end{array}\right.$$

(10)

The dynamic equations of PLL can be expressed by Equation (11), where, i = 1, 2; ${\theta }_{\mathrm{pcc}}^{\mathrm{VSC}i}$ = arctan ($u_{\mathrm{pccy}}^{\mathrm{VSC}i}$/$u_{\mathrm{pccx}}^{\mathrm{VSC}i}$), and $x_{\mathrm{PLL}}^{\mathrm{VSC}i}$ stands for the state variables of PLL:

$$\left\{\begin{array}{l}\mathrm{d}{x}_{\mathrm{PLL}}^{\mathrm{VSC}i}/\mathrm{d}t=k_{\mathrm{iPLL}}^{\mathrm{VSC}i}\left({\theta }_{\mathrm{pcc}}^{\mathrm{VSC}i}-{\theta }_{\mathrm{PLL}}^{\mathrm{VSC}i}\right)\\ \mathrm{d}{\theta }_{\mathrm{PLL}}^{\mathrm{VSC}i}/\mathrm{d}t=x_{\mathrm{PLL}}^{\mathrm{VSC}i}+k_{\mathrm{pPLL}}^{\mathrm{VSC}i}\left({\theta }_{\mathrm{pcc}}^{\mathrm{VSC}i}-{\theta }_{\mathrm{PLL}}^{\mathrm{VSC}i}\right)\end{array}\right.$$

(11)

The input variables and output variables are U_PLLi = ${\mathit{u}}_{\mathrm{pccxy}}^{\mathrm{VSC}i}$ and y_PLL = ${\theta }_{\mathrm{PLL}}^{\mathrm{VSC}i}$, respectively. The small-signal model of PLL can be derived as Equation (12) via the linearization of (11), as follows:

$$\left\{\begin{array}{l}\Delta {\dot{\mathit{X}}}_{\mathrm{PLL}i}={\mathit{A}}_{\mathrm{PLL}i}\Delta {\mathit{X}}_{\mathrm{PLL}i}+{\mathit{B}}_{\mathrm{PLL}i}\Delta {\mathit{U}}_{\mathrm{PLL}i}\hfill \\ \Delta y_{\mathrm{PLL}i}={\mathit{C}}_{\mathrm{PLL}i}\Delta {\mathit{X}}_{\mathrm{PLL}i}+{\mathit{D}}_{\mathrm{PLL}i}\Delta {\mathit{U}}_{\mathrm{PLL}i}\hfill \end{array}\right.$$

(12)

The transformation equations between the dq rotating reference frame and xy coordinate system are given by (13), where x represents electrical quantities such as voltage, current, and modulation signals, as follows:

$$\left\{\begin{array}{l}{x}_{\mathrm{x}}=\cos \left({\theta }_{\mathrm{PLL}}\right)x_{\mathrm{d}}-\sin \left({\theta }_{\mathrm{PLL}}\right)x_{\mathrm{q}}\\ x_{\mathrm{y}}=\sin \left({\theta }_{\mathrm{PLL}}\right)x_{\mathrm{d}}+\cos \left({\theta }_{\mathrm{PLL}}\right)x_{\mathrm{q}}\end{array}\right.$$

(13)

3.4. Interconnection of Subsystem Models

Interconnecting the small-signal models of each subsystem yields the linearized model of the whole system, as presented in Equation (14) where ∆X stands for the state variables of the whole system, which is an 18 × 1 vector, and ∆U = [${\widehat{u}}_{\mathrm{dcref}}$, ${\widehat{i}}_{\mathrm{pccqref}}^{\mathrm{VSC}1}$, ${\widehat{P}}_{2\mathrm{ref}}$, ${\widehat{Q}}_{2\mathrm{ref}}$, ${\widehat{i}}_{\mathrm{line}}$, ${\widehat{\mathit{u}}}_{\mathrm{xy}}^{\mathrm{g}1,\mathrm{T}}$, ${\widehat{\mathit{u}}}_{\mathrm{xy}}^{\mathrm{g}2,\mathrm{T}}$]^T, containing the input variables. In addition, A and B denote the state matrix and the input matrix, respectively.

$$\Delta \dot{\mathit{X}}=\mathit{A}\Delta \mathit{X}+\mathit{B}\Delta \mathit{U}$$

(14)

The graphical representation of Equation (14) is shown in Figure 3. Regarding control strategies, it is noted that different control strategies exhibit differentiated regulation capabilities for modulation signals, and this difference, combined with DC voltage, jointly affects the AC port voltage of VSC₁ and VSC₂. Regarding the DC link, the dynamic response characteristics of u_dc exhibit strong dynamic interaction with the modulation signals and AC currents of the converter, and this interaction is simultaneously influenced by the control strategies. Additionally, different control strategies produce coupling through the common DC link, leading to interaction coupling between the DVC and PQC during system operation. Regarding the tie line model, this reveals an energy exchange mechanism between the AC₁ and AC₂ subsystems, where coupling strength exhibits an inverse correlation with the tie line length. Notably, structural asymmetry in grid topology induces dynamic interactions via the tie line, potentially reducing phase margin and destabilizing the system, which warrants rigorous modal analysis.

In conclusion, the dual-receiving-end VSC-HVDC system is characterized by highly dynamic interaction. In this context, VSC₁-HVDC and VSC₂-HVDC are endowed with distinctive operating characteristics through the implementation of differentiated control strategies, while being dynamically coupled through interactions mediated by the DC-side capacitor and AC tie line, thereby amplifying the complexity of the system responses. As a result, the stability of the system is not dictated by a single control strategy but rather by the collective influence of DVC and PQC, manifesting disparities compared with VSC-HVDC systems operating under single control strategies.

3.5. Model Validation

Based on the main circuit topology in Figure 1 and the control architecture illustrated in Figure 2, an electromagnetic transient (EMT) model was established in MATLAB/Simulink. By comparing the calculation results of the small-signal model and the EMT model, the accuracy of the small-signal model is verified. The system parameters are presented in

Table 1. Parameters of main circuit.

Parameters		Values
VSC1-HVDC subsystem	Rated DC voltage udc	400 kV
	Voltage of AC system $u_{\mathrm{g}}^{\mathrm{VSC}1}$	525 kV
	SCR	3.5
	Rated active power	1000 MW
	Transformer leakage impedance LT1/RT1	0.20 p.u./0.20 p.u.
VSC2-HVDC subsystem	Voltage of AC system $u_{\mathrm{g}}^{\mathrm{VSC}2}$	510.089 kV
	SCR	3.5
	Rated DC voltage udc	400 kV
	Rated active power	1000 MW
	Transformer leakage impedance LT2/RT2	0.20 p.u./0.20 p.u.
Tie line	Tie line length	50 km
	Tie line resistance Rtie	28 mΩ/km
	Tie line inductance Ltie	12.9 mH/km

and

Table 2. Parameters of main controller.

Parameters	Values
PLL bandwidth of VSC1-HVDC	20 Hz
PLL bandwidth of VSC2-HVDC	20 Hz
DVC parameters of VSC1-HVDC kpv/kiv	5 × 10−7/0.1
PQC parameters of VSC2-HVDC kpac/kiac	7 × 10−6/7 × 10−5
VCC parameters of VSC1-HVDC $k_{\mathrm{pi}}^{\mathrm{VSC}1}/k_{\mathrm{ii}}^{\mathrm{VSC}1}$	1.0/330
VCC parameters of VSC2-HVDC $k_{\mathrm{pi}}^{\mathrm{VSC}2}/k_{\mathrm{ii}}^{\mathrm{VSC}2}$	0.5/300

.

The system commences operation at its rated operating point during the initial phase. The predefined disturbance conditions are structured as follows: (1) u_dcref undergoes an upward step change of 0.05 p.u. at t = 6 s; (2) i_line experiences an upward step change of 0.01 p.u. at t = 8 s; (3) P_2ref encounters an upward step change of 0.03 p.u. at t = 10 s. Each disturbance signal is removed after being injected for 0.5 s. The comparison results of the time-domain responses between the small-signal model and the EMT model are presented in Figure 4. The solid-line waveforms represent the simulation results of the EMT model, while the dashed-line waveforms denote the theoretical calculation results of the small-signal model. The time-domain responses of x-axis currents in VSC₁ and VSC₂, the active power of VSC₂-HVDC, and the DC voltage are illustrated in Figure 4a–d, respectively. The time-domain responses of the two models exhibit substantial overlap when the additional high-frequency components caused by the switching processes of the EMT model are excluded, demonstrating the validity and accuracy of the established small-signal model.

4. Construction of a Feasible SCR Region with Joint Power–Topology Constraints

In this section, based on the small-signal model, the influence of control strategy, asymmetrical grid strength, power flow direction, and tie line on the small-signal stability is analyzed, and the formation of a feasible SCR region constrained by power and topology is described.

4.1. The Impact of AC System Strength

As shown in Figure 1, the main circuit is interconnected on the AC side via the tie line. In this configuration, when the connected AC power grid exhibits relatively weak strength, the voltage at PCC becomes susceptible to disturbances, resulting in enhanced dynamic coupling between VSC₁-HVDC and VSC₂-HVDC, which in turn affects the system’s stability [28,29]. Therefore, three sets of SCR combination conditions were selected for investigation, as discussed in the following sections.

In Case 1, SCR₂ was kept constant while varying SCR₁ from 5 to 1; in Case 2, SCR₁ was kept constant while varying SCR₂ from 5 to 1; In Case 3, SCR₁ and SCR₂ both varied from 5 to 1. In all three aforementioned cases, the length of the tie line was 50 km, and VSC₂-HVDC transmitted rated power. The system’s root loci are depicted in Figure 5a–c, respectively, with the color bars corresponding to the real axis of the dominant mode.

As shown in Figure 5a,b, as SCR₁ decreases in Case 1, the dominant modes exhibit a progressive migration toward the imaginary axis, directly reducing the system’s stability margin. When SCR₁ < 2.1465, the system oscillates and becomes unstable. Similarly, for Case 2, the system could still operate stably when SCR₂ is reduced to 1. On this basis, SCR₂ was further decreased; when SCR₂ < 0.48, the system fails to maintain stable operational conditions. According to the aforementioned analysis, despite the symmetrical configuration of Case 1 and Case 2, the distinct control strategies adopted by VSC₁-HVDC and VSC₂-HVDC lead to a situation where the minimum acceptable SCR for AC₂ is lower than that for AC₁, which implies that a VSC-HVDC system employing PQC is less affected by grid strength and can accommodate a weaker AC system while maintaining the same rated power. According to Figure 5c, as both SCR₁ and SCR₂ decrease simultaneously, the small-signal stability of the system also weakens, and when both SCR₁ and SCR₂ < 2.3367, the system oscillates and becomes unstable.

Furthermore, by configuring additional SCR combination scenarios as shown in Figure 5, the feasible SCR region can be constructed as illustrated in Figure 6. The solid black line in the figure represents the SCR’s critical boundary, indicating the minimum acceptable SCR when either SCR₁ or SCR₂ varies. For instance, points A, B, and C on the critical boundary correspond to the minimum acceptable SCR values for Case 1, Case 2, and Case 3, respectively. The regions above and below the solid black line denote the feasible and infeasible SCR regions, respectively.

4.2. The Impact of Tie Line Length

AC₁ and AC₂ are electrically interconnected through the tie line. As illustrated in Figure 3, different tie-line lengths exhibit significant variations in their impact on the cross-coupling of dynamic responses among differentiated control strategies and the degree of interaction between electrical quantities in the VSC₁-HVDC and VSC₂-HVDC subsystems [30]. To further evaluate the aforementioned impacts, three SCR combinations were analyzed under constant rated power transmission of VSC₂-HVDC: Case 4 (SCR₁ = 2.1465, SCR₂ = 3.5), Case 5 (SCR₁ = 3.5, SCR₂ = 2.1465), and Case 6 (SCR₁ = 2.8233, SCR₂ = 2.8233). Under these three operating conditions, the length of tie line varied from 20 km to 100 km. The system’s root loci are depicted in Figure 7a–c, respectively, with the color bars corresponding to the real axis of the dominant mode.

Figure 7a–c demonstrate that the extended tie line lengths induce dominant modes to approach and cross the imaginary axis, which may escalate the risk of small-signal instability. Furthermore, the maximum permissible tie line length is jointly determined by the outer-loop control strategy and the unbalanced grid parameters. Specifically, under a symmetric grid configuration (Case 6), the maximum acceptable length of the tie line is 91 km. In contrast, under balanced grid parameters (Case 4 and Case 5), when the grid connected to the VSC-HVDC with DVC is weaker (Case 4), the maximum allowable length of the tie line is 51 km, whereas under conditions where the grid connected to the VSC-HVDC with PQC is weaker (Case 5), the system can still operate stably with a tie line length of 100 km. Although Case 4 and Case 5 are symmetrically configured, their critical tie line lengths differ. Based on the aforementioned analysis, it can be stated that VSC₁-HVDC is more critically dependent on grid strength; therefore, when the strength of AC₁ is weaker, reducing the equivalent electrical distance of the tie line becomes essential to mitigate oscillations and maintain stability.

By maintaining the power transmission of VSC₂-HVDC at a constant rate, the feasible SCR region under various tie line lengths was obtained, as illustrated in Figure 8. The definition of the feasible SCR region in this figure is consistent with that presented in Figure 6. It can be discerned that the line impedance experiences an upward trend with the increase in tie line length, and the equivalent SCR of the AC system gradually decreases [31,32]. As a result, the stability boundary migrates towards the upper right region of the graph, accompanied by a reduction in the area of the feasible SCR region, signifying a progressive decline in the system’s stability margin. In addition, the smaller the value of SCR₁ is, the more rapid the change of stability boundary with respect to the tie line length, indicating that compared with the PQC strategy, the DVC strategy amplifies the impact of tie line length fluctuations on small-signal stability under weak grid conditions.

4.3. The Impact of Power Condition for VSC₂-HVDC

On the basis of the aforementioned research, the constraint relationships between the feasible SCR region and the capacity as well as the direction of P_VSC2 were considered. For all the aforementioned tie line configurations, by gradually adjusting the operating point of P_VSC2 from 1.0 p.u. to −1.0 p.u., a feasible SCR region subject to combined power–topology constraints was constructed; the evolutionary characteristics are depicted in Figure 9, for the conditions of a 66.67 km tie line and P_VSC2 = −1.0 p.u., where point P represents a set of critical SCR combinations (SCR₁ = 4.303, SCR₂ = 2.5) for maintaining stable operation. During the process of the VSC₂-HVDC transitioning from the normal operating mode to the mutual-support power mode, the stability boundary migrates towards the upper-right section, accompanied by a reduction in the area of the feasible SCR region, signifying a progressive diminishment of the system’s stability margin, with this trend unaffected by changes in the length of tie line.

Furthermore, with SCR₂ and the tie line length fixed at 2.5 and 50 km, respectively, the participation factor distributions at operating points on the stability boundary are comparatively illustrated in Figure 10, for two operational scenarios of the VSC₂-HVDC system: normal operating mode and mutual-support power mode. All the state variables are categorized into seven groups: AC system, PLL₁, PLL₂, DVC loop, PQC loop, VCC₁, and VCC₂. A quantitative examination of the operational characteristics demonstrates that under forward power flow conditions in VSC₂-HVDC, the state variable x_od1 associated with DVC exhibits dominant participation (79.79% contribution rate). Conversely, when VSC₂-HVDC provides power support to AC_1, the participation of x_od1 further increases to 87.78%, while the participation of other variables decreases, indicating that the mutual-support power mode exacerbates the sensitivity of DVC strategy to the weak AC grid, thereby reducing the system’s stability margin.

4.4. The Impact of PLL Bandwidth

As depicted in Figure 3, PLL also plays a role in the stability of the interconnected system. To further evaluate the impact of PLL bandwidths, the bandwidths of PLL₁ were varied from 20 Hz to 12 Hz. The system’s root loci are depicted in Figure 11, with the color bars corresponding to the real axis of the dominant mode.

Figure 11 demonstrates that decrease in PLL bandwidths induce dominant modes to approach and cross the imaginary axis with a critical PLL bandwidth of 15.8 Hz, which may escalate the risk of small-signal instability. Therefore, it is recommended to set the PLL bandwidth at a larger value to ensure the stable operation of the dual-receiving-end VSC-HVDC system.

4.5. Simulation Verification

A dual-receiving-end VSC-HVDC system simulation model was established in MATLAB/Simulink. Initially, the system commenced operation with stable parameters (P_VSCi = 1.0 p.u., SCR_i= 3.5, tie line length = 50 km). Subsequently, while maintaining other parameters unchanged, SCR₁ was sequentially switched to 2.15 and 2.14. The waveforms of u_dc, active and reactive power, PCC current, and PCC voltage of VSC₁-HVDC were plotted, as presented in Figure 12. Although the system exhibited minor oscillations after SCR₁ was switched to 2.15, the oscillations were rapidly suppressed as SCR₁ and SCR₂ were within the feasible region at that time, with all parameters converging well to steady-state values. After SCR₁ was switched to 2.14, the system gradually became unstable, and the oscillations could not be suppressed. FFT (fast Fourier transform) analysis was performed on the u_dc waveforms during the oscillation process, revealing the presence of a 12.5 Hz oscillation component.

The verification results of point P for the feasible SCR region are illustrated in Figure 13. After the system was initiated under stable parameters (P_VSCi = 1.0 p.u., SCR₁ = 4.31, SCR₂ = 2.5, tie line length = 66.67 km), while maintaining other parameters unchanged, P_VSC2 was first set to −1.0 p.u. and SCR₁ was then switched to 4.3. The results indicate that after the first parameter switching, SCR₁ and SCR₂ were within the feasible region, and the system smoothly entered the mutual-support power mode. After the second parameter switching, the system gradually became unstable, indicating that SCR₁ and SCR₂ were outside the feasible region at that time, thereby validating the effectiveness of the SCR feasible region constructed in Figure 9.

Figure 14 illustrates the verification results for the critical bandwidth value of PLL₁. The system was initiated with a PLL₁ bandwidth of 16 Hz, while maintaining all other parameters constant. Subsequently, the PLL₁ bandwidth was adjusted to 15.7 Hz, at which point a gradual divergence in the active power waveform of VSC₁ was observed. This observation indicates that the PLL₁ bandwidth exceeded its critical value, thereby validating the effectiveness of the theoretical analysis.

5. Conclusions

In this paper, a small-signal model of dual-receiving-end VSC-HVDC system is described, incorporating comprehensive considerations of differential control strategies, bidirectional power flow dynamics, and grid topology configurations. By comparing its time-domain response with that of the MATLAB/Simulink R2023b electromagnetic transient model, the accuracy of the established model was verified. Eigenvalue and participation factor analyses were applied to evaluate the influence of control strategy, asymmetrical grid strength, power flow direction, and tie line on the system’s small-signal stability. The following conclusions are drawn:

• Compared with the combined active/reactive power control strategy, DC voltage control strategy is more sensitive to changes in the power grid. Under conditions of the same rated power, it requires the configuration of a stronger AC system, and the state variable of DC voltage controller is the dominant factor causing this difference;
• An increase in the tie line length leads to a decrease in the area of the feasible SCR region, a reduction in the system’s stability margin, and an increase in the risk of instability. Moreover, the critical length is jointly determined by the outer loop control strategy and the asymmetric configuration of power grid;
• Compared with the combined active/reactive power control strategy, DC voltage control strategy exacerbates the influence of tie line length fluctuations on small-signal stability under weak grid conditions.