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Article

A 6 Mbps 7 pJ/bit CMOS Integrated Wireless Simultaneous Lightwave Information and Power Transfer System for Biomedical Implants

by
Andrea De Marcellis
1,*,
Guido Di Patrizio Stanchieri
1,
Marco Faccio
1,
Elia Palange
1 and
Timothy G. Constandinou
2
1
Department of Information Engineering, Computer Science, and Mathematics, University of L’Aquila, 67100 L’Aquila, Italy
2
Centre for Bio-Inspired Technology, Department of Electrical and Electronic Engineering, Imperial College London, London SW7 2AZ, UK
*
Author to whom correspondence should be addressed.
Electronics 2024, 13(9), 1774; https://doi.org/10.3390/electronics13091774
Submission received: 12 March 2024 / Revised: 23 April 2024 / Accepted: 28 April 2024 / Published: 4 May 2024

Abstract

:
This paper presents a Simultaneous Lightwave Information and Power Transfer (SLIPT) system for implantable biomedical applications composed of an external and internal (i.e., implantable) unit designed at a transistor level in TMSC 0.18 µm standard CMOS Si technology, requiring Si areas of 200 × 260 µm2 and 615 × 950 µm2, respectively. The SLIPT external unit employs a semiconductor laser to transmit data and power to the SLIPT internal unit, which contains an Optical Wireless Power Transfer (OWPT) module to supply its circuitry and, in particular, the data receiver module. To enable these operations, the transmitter module of the SLIPT external unit uses a novel reverse multilevel synchronized pulse position modulation technique based on dropping the laser driving current to zero so it produces laser pulses with a reversed intensity profile. This modulation technique allows: (i) the SLIPT external unit to code and transmit data packages of 6-bit symbols received and decoded by the SLIPT internal unit; and (ii) to supply the OWPT module also in the period between the transmission of two consecutive data packages. The receiver module operates for a time window of 12.5 µs every 500 µs, this being the time needed for the OWPT module to fully recover the energy to power the SLIPT internal unit. Post-layout simulations demonstrate that the proposed SLIPT system provides a final data throughput of 6 Mbps, an energy efficiency of 7 pJ/bit, and an OWPT module power transfer efficiency of 40%.

1. Introduction

Simultaneous Wireless Information and Power Transfer (SWIPT) technology conjugates data transmission and power transfer by employing the same physical architectures through the specific electronic circuitries enabling these two processes. Nowadays, an increasing number of devices communicate cooperatively in static and dynamic network systems located in different environments [1,2,3,4]. Focusing on medical implantable systems, sensors employed for the continuous monitoring of patient healthcare are designed to have low-voltage low-power electronic front-end circuitries to elaborate the received and transmitted data from the patient to the external equipment and vice versa [5,6,7,8]. These implanted systems are powered by batteries that must be regularly replaced by surgery, with possible risks for the patient’s health because of the occurrence of infections. This is the case, for example, for medical implants like pacemakers and programmable wireless neural stimulators. SWIPT technology employs the device to both transmit data and to power the receiver. This is achieved by implementing proper time-switching relaying protocols designed for each specific methodology that, nowadays, are mainly in the radio frequency (RF) region [8,9,10,11,12,13,14,15]. However, the electromagnetic power employed in RF-based SWIPT systems must not exceed the health radiation exposure limits for the general population [16]. For example, for an averaging exposure time within 30 min, the maximum exposure power for electromagnetic field frequencies ranging from 300 MHz to 1.5 GHz is f/1500 mW/cm2 with the frequency in MHz. To overcome these limitations and reduce the size of RF-based SWIPT systems, wireless technology has been reported to implement Simultaneous Lightwave Information and Power Transfer (SLIPT) systems in the visible and near infrared regions of the electromagnetic spectrum [17,18,19]. In this sense, SLIPT systems are the optical counterparts of RF and inductive SWIPT systems. In SLIPT architectures, LEDs or semiconductor lasers are employed to transfer data by suitable coding and decoding paradigms and power by using photodiodes or small solar cells to energize the receiving or transmitting SLIPT modules [17,18,19,20,21,22,23,24]. SLIPT technology presents several advantages in terms of its operability at long distances, high electromagnetic compatibility and signal integrity, operation in low-power and low-voltage conditions, and full compatibility with standard CMOS Si technology to reduce the system size. The integrated solutions reported in the literature present several disadvantages in terms of the maximum achievable transmission data rate, energy efficiency for transmission, and light-to-electrical power conversion efficiency [17,24]. The SLIPT architecture reported in this paper was designed for implantable biomedical systems and the developed circuitry solutions greatly improve the state of the art of the above-mentioned main characteristics of these systems. The presented SLIPT system is composed of an external and an internal (i.e., implantable) unit designed at a transistor level in TMSC 0.18 µm standard CMOS Si technology. The circuitries of the SLIPT external and internal units require total Si areas of 200 × 260 µm2 and 615 × 950 µm2, respectively. The SLIPT external unit receives the bitstream to be transmitted to the SLIPT internal unit. Specific modules allow for the coding process and drive a semiconductor laser to optically transmit data and transfer power to the SLIPT internal unit. The latter operates as a data receiver and includes: (i) an Optical Wireless Power Transfer (OWPT) module with an integrated array of eight Si photodiodes that, once illuminated, generates the photocurrent to power the SLIPT internal unit circuitries [25,26]; (ii) an RX-READY block that enables the SLIPT external unit to transmit data only when the SLIPT internal unit is fully powered by the OWPT module; and (iii) an RX receiver module implementing the clock and data decoding process. To achieve the correct operation of the SLIPT system (i.e., data transmission/reception and optical power transfer), a pulse generator module is included in the external unit, which generates pulsed coded data by using a novel modulation technique that is the reversed version of the optical Synchronized Pulse Position Modulation (S-PPM) technique [27,28,29,30]. The laser driver module receives the pulsed coded data and modulates the amplitude of the laser beam to allow for the simultaneous data transmission and power transfer to the SLIPT internal unit. To achieve this functionality, the value of the current applied to the laser is maintained at greater than the threshold value and is dropped fast to zero (i.e., no laser action holds) to allow for data transmission. In other words, in the reverse S-PPM modulation paradigm, the laser operates in a continuous wave (CW) regime to power the OWPT module, except when data must be transmitted. Therefore, the novelty of this modulation technique is that, instead of using “bright” laser pulses, now, “dark” laser pulses are generated to transmit each symbol of the data package from the SLIPT external unit to the internal unit. The SLIPT system can code, transmit, receive, and decode data packages composed of 6-bit symbols. The SLIPT internal unit is enabled to receive data packages within time windows of 12.5 µs repeated every 500 µs. The latter is the time required for the OWPT module to recover the energy to power the SPLIT internal unit. The reported results of post-layout simulations demonstrate the functionalities of the SLIPT system, with a final data throughput of 6 Mbps and an energy efficiency of 7 pJ/bit. In terms of the ratio between the input and output powers, the resulting OWPT module efficiency is equal to 40%.
This paper is organized as follows: the Section 2 includes an overview of the optoelectronic modules composing the SLIPT external and internal units; the Section 3 analyzes, in detail, the implemented novel modulation technique for data transmission and power transfer; the Section 4 discusses the architecture implementation of the SLIPT external and internal units; the Section 5 reports on the results of a series of post-layout simulations to evaluate the main characteristics of the proposed SLIPT system, which are compared with those of similar systems reported in the literature; and a Section 6 ends the paper.

2. Overview of the Proposed SLIPT System

Referring to Figure 1, the proposed SLIPT system is composed of an EXTERNAL UNIT and an INTERNAL UNIT that work cooperatively. Both the SLIPT units, in fact, operate a threefold function: the EXTERNAL UNIT codes and transmits data and power to the INTERNAL UNIT by using a single semiconductor laser; the INTERNAL UNIT receives and decodes the transmitted data and drives an external ACTUATOR (e.g., an implantable system not included in this work). While the EXTERNAL UNIT is powered by the POWER block (e.g., a battery pack), the INTERNAL UNIT is supplied by the OWPT-MODULE, which performs an energy-harvesting process employing the laser power detected by the PW-PD array of photodiodes. The OWPT-MODULE needs a certain time to achieve the operative values of the output voltage and current to power the INTERNAL UNIT circuitry and the ACTUATOR. Therefore, the SLIPT system operates in a discrete time regime with a dead-time period needed to allow for the energy recovery of the OWPT-MODULE. Within the dead-time period, the two SLIPT units operate as follows: (i) the EXTERNAL UNIT must stop the data transmission to the INTERNAL UNIT, since it is under-powered and, thus, not able to receive and decode the data; and (ii) the OWPT-MODULE of the INTERNAL UNIT recovers energy by using the photocurrent generated by the PW-PD array of photodiodes illuminated by the laser beam generated by the semiconductor laser of the EXTERNAL UNIT. As shown in Figure 1, to avoid data losses, a synchronization procedure is implemented by employing the ST-Signal generated by a µLED located in the INTERNAL UNIT and received by the PD-TX photodiode of the EXTERNAL UNIT. When the INTERNAL UNIT is ready to operate (i.e., is correctly powered by the OWPT-MODULE), an ST-Signal is generated and transmitted to the EXPERNAL UNIT to enable the data coding and transmission procedures.
Referring to Figure 1, the TX-MODULE of the EXTERNAL UNIT is composed of: (i) a set of four blocks (i.e., the FREQUENCY DIVIDER, the SYMBOL BUFFER, the PROGRAMMABLE DELAY, and the PULSE GENERATOR blocks) that allows for delivering the Pulsed Coded Data signal obtained by combining the input Bitstream-Sync clock signal and the Transmitted Bitstream data signal; (ii) a DRIVER block that receives these signals and modulates the semiconductor laser current to optically transmit data and power to the EXTERNAL UNIT by generating the Power and Data Optical Signal; and (iii) an ST-TX block that receives, through the integrated PD-TX photodiode, the TX-Signal delivered by the EXTERNAL UNIT, enabling the SLIPT system to operate.
On the other hand, the INTERNAL UNIT includes: (i) the OWPT-MODULE, which harvests and accumulates energy using the photocurrent generated by the PW-PD array of eight Si photodiodes illuminated by the semiconductor laser of the EXTERNAL UNIT. When the proper values of the voltage and current are achieved, the CONTROL UNIT connects the CP-Output signal to the input of the Low-Drop-Out (LDO) voltage regulator block that powers the INTERNAL UNIT circuitry; (ii) the RX-MODULE, which receives the transmitted data employing the DATA-PD array composed of four Si photodiodes and provides the Recovered Bitstream and the Recovered Bitstream-Sync signals to the ACTUATOR powered by the LDO block; and (iii) the RX-READY block, which generates the optical ST-Signal by using an external µLED to activate the TX-MODULE of the EXTERNAL UNIT.

3. The Reverse S-PPM Technique for Efficient Optical Data and Power Transfer

The Power and Data Optical Signal delivered by the EXTERNAL UNIT is generated by using a novel reverse S-PPM modulation technique that simultaneously enables a high data rate transmission and power transfer from the SLIPT external and internal units (see Figure 1). This is obtained by modulating the current that drives the semiconductor laser. In Figure 2, an example is shown of the time diagram describing the multilevel data coding procedure and the corresponding pulse modulation process performed by the TX-MODULE of the EXTERNAL UNIT. The Transmitted Bitstream is composed of a series of symbols (e.g., Symbol 1 and Symbol 2, etc.), formed by 6 bits. The frequency of the periodic clock signal Sym-Clk is:
f S y m - C l k = f B i t s t r e a m - S y n c N B I T
where f B i t s t r e a m - S y n c is the bit frequency (i.e., the input data rate) of the incoming Transmitted Bitstream to be coded and transmitted and N B I T is the number of bits per symbol included in a symbol period T S = 1 / f S y m - C l k . Synchronously with the rising edge of each Sym-Clk clock signal, a Sync-Pulses signal is generated and transmitted. This signal does not carry any data information of the Transmitted Bitstream, since it only allows the RX-MODULE of the INTERNAL UNIT to perform the clock recovery and data decoding processes. During each symbol period T S , an additional Data Pulses signal is generated with a specific delay time Δ T with respect to the Sync-Pulses signal. The time position of each pulse composing the Data-Pulses signal within the symbol period T S uniquely identifies the specific transmitted symbol. The time delay between a Sync-Pulse signal and a Data-Pulse signal as a function of the specific symbol to be transmitted is:
T = T S 2 N B I T S y m b o l 10
where S y m b o l 10 represents the decimal number related to the binary code composing the symbol. The value of Δ T depends on: (i) the specific sequence of bits composing a symbol. As an example, in Figure 2 the time delays Δ T 1 and Δ T 2 are associated with Symbol 1 and Symbol 2, respectively; (ii) the number of bits per symbol; and (iii) the data rate that defines the corresponding symbol period T S .
Referring to Figure 2, the amplitudes of the pulses included in the Sync-Pulses and Data-Pulses signals decrease from a high (i.e., 1) to a low (i.e., 0) value while, conversely, the amplitudes of the Sym-Clk and Bitstream-Sync signals vary from a low to a high value. Therefore, the Sync-Pulses and Data-Pulses signals are reversed signals with respect to the rising edge of the Sym-Clk and Bitstream-Sync signals. The Pulsed Coded Data signal containing the coded and modulated data to be transmitted is generated by combining the Sync-Pulses and Data-Pulses signals. As shown in Figure 1, the Pulsed Coded Data signal is the input signal of the DRIVER block that modulates the semiconductor laser current to generate the Power and Data Optical signal, which is the optical replica of the electrical input signal. As shown in Figure 2, the Power and Data Optical signal is the optical implementation of the proposed reverse S-PPM modulation technique: the data transmission is implemented by fast decreasing the laser current to values below threshold for short periods, thus generating laser pulses with a reverse intensity profile (i.e., from the maximum, PMAX, to the minimum, PMIN = 0, laser power); at the same time, the Power and Data Optical signal allows for transferring optical power to the OWPT-MODULE of the INTERNAL UNIT. Referring to Figure 2, this is achieved by maintaining the laser operating at the maximum power PMAX in between two transmitted consecutive symbols or when no symbol must be transmitted. Thus, in the latter case and when the EXTERNAL UNIT is waiting to be activated by the ST-Signal, the semiconductor laser operates in a CW regime to power the OWPT-MODULE.

4. Design and Architecture Implementation of the SLIPT System

The SLIPT system was designed and simulated in a Cadence Design System environment at a transistor level in TSMC 0.18 μm CMOS Si technology, considering a single supply voltage of 1.2 V. The EXTERNAL UNIT layout shown in the left panel of Figure 3 integrates the TX-MODULE circuitry that occupies a Si total area of 260 × 200 µm2 and a PD-TX photodiode with a Si area of 200 × 200 µm2. Referring to Figure 1, the PD-TX photodiode is used to detect the synchronization the ST-Signal optical signal. The ST-TX block converts the PD-TX photocurrent in the ST-OP digital signal, enabling the DATA SOURCE block to generate the clock Bitstream-Sync and the Transmitted Bitstream data signals. Every six Bitstream-Sync periods, the SYMBOL BUFFER block generates the Symbol to be transmitted to the INTERNAL UNIT (see Figure 2).
At the same time, the FREQUENCY DIVIDER block generates the square wave signal Sym-Clk with a period equal to the symbol period. Starting from the Symbol and Sym-Clk signals, the PROGRAMMABLE DELAY BLOCK generates two signals: the Delayed Sym-Clk signal, a replica of the Sym-Clk signal delayed by a value that depends on the symbol to be transmitted, and an unchanged copy of the Sym-Clk signal. The PULSE GENERATOR block internally provides two signals: the Sync-Pulses signal generated at the rising edge of the Sym-Clk signal and the Data-Pulses associated with the Delayed Sym-Clk signal (see Figure 2). The PULSE GENERATOR block adds and inverts these two signals, obtaining the Pulsed Coded Data signal. The DRIVER block uses this signal to modulate the semiconductor laser current to produce the Power and Data Optical signals that are detected by the Data-PD and PW-PD photodiode arrays of the INTERNAL UNIT. Referring to the right panel in Figure 3, the overall optoelectronic circuitry of the INTERNAL UNIT in Figure 1 requires a total Si area of ~950 × 615 µm2, allowing for the integration and the fabrication of: (i) sixteen Si PDs for a total area of ~600 × 600 µm2; (ii) eight 28.64 pF capacitors used by the OWPT-MODULE of Figure 1 for a total area of ~550 × 300 µm2; and (iii) all the electronic components, devices, and circuits, requiring a Si area of ~65,000 µm2.
In more detail, according to the right panel of Figure 3, the Data-PD is an array of four Si PDs, each with a sensitive area of 100 × 100 µm2. Since the proposed SLIPT system is designed to operate by using 300 ps laser pulses to transmit and receive the data, the junction capacitance C j of each of these designed PDs must be allowed to reach the suitable rise and fall time for these devices (i.e., the needed frequency bandwidth) to fulfill all the SLIPT functionalities. In this sense, for example, the characteristics of the commercial FDS015 fast Si PD by Thorlabs are considered as a reference design: 35 ps and 200 ps rise and fall times, respectively, achieved with C j = 0.65 pF and a sensitive area of 0.018 mm2. In particular, the latter are considered as the maximum reference values not to be exceeded in designing the four integrated PDs composing the Data-PD array. The four PDs are electrically connected to form the parallel of two identical elements composed of two photodiodes in series (i.e., [PD1 + PD2]//[PD3 + PD4]). This way, the junction capacitance results in being equal to that of each single photodiode. Thus, the characteristics of the Data-PD permit the SLIPT system to operate with sub-nanosecond laser pulses at high repetition rates, therefore minimizing the energy efficiency expressed in pJ/bit for the data transmission. On the other hand, the PW-PD is an array of eight Si photodiodes with a sensitive area of 200 × 200 µm2 (see the right panel of Figure 3). In this case, the design favored an increase in the total array sensitive area to collect the largest possible amount of optical power to energize the OWPT-MODULE through the generated photocurrent. Recalling the description of the reverse S-PPM modulation technique in Figure 2 (see the Power and Data Optical signal waveform), the junction capacitance of each PD of the PW-PD array was designed to be in the order of about 30 pF, so as to obtain rise and fall times in the order of 10 ns, with these values being greater than the pulse width of the Data Optical signal. This way, the PW-PD array provides a continuous photocurrent to supply the OWPT-MODULE, even during the data transmission process. Under these conditions, the PW-PD array is optimized to collect optical power even when data transmission is operating (i.e., between the transmission of two consecutive symbols). The Si photodiodes of the PW-PD array are electrically connected to form the parallel of two identical elements constituted of four Si photodiodes in series (i.e., [PD5 + PD6 + PD7 + PD8]//[PD9 + PD10 + PD11 + PD12]).
The OWPT-MODULE of Figure 1 is composed of a CONTROL UNIT, a ring oscillator RO block, and a charge pump CP block, with the latter connected to the PW-PD photodiode array that provides the input voltage OWPT-Input and photocurrent to be harvested and accumulated. In more detail, according to Figure 1 and referring to Figure 4, the RO block is composed of: (i) an OSCILLATOR block implemented by three inverter stages that generates a square wave whose amplitude and frequency mainly depend on the OWPT-Input voltage level; (ii) a BUFFER block that squares the CLK signal provided by the OSCILLATOR block generating the signal CLKCP; and (iii) an INVERTER block that generates the signal/CLKCP. The CP block is composed of a cascade of four identical stages based on a cross-coupled voltage double topology (one of these stages is shown on the right of Figure 4) capable of boosting the input voltage OWPT-Input to higher values using the signals CLKCP and/CLKCP [27]. The CONTROL UNIT measures the energy accumulated during the harvesting process, and when it is enough to supply the INTERNAL UNIT, enables the transfer of the collected energy OWPT-Output to the LDO block. As reported in Figure 5, the LDO block is implemented by using a standard architecture, including a BJT-based voltage reference V r e f [31]. The LDO block provides a 1.2 V single-supply voltage for a suitable period, performing the SLIPT system activation by using the RX-READY block. This block generates the optical ST-Signal through the µLED to notify the EXTERNAL UNIT that the RX-MODULE is ready to operate. The TX-MODULE starts the data transmission, generating the Pulsed Coded Data signal used to drive the LASER through the DRIVER block. The schematic circuit at the transistor level of the DRIVER block is shown in Figure 6 and is based on a current mirror stage formed by transistors M4 and M5 to convert the Pulsed Coded Data voltage into a current that directly drives the LASER. Moreover, it is possible to regulate both the pulsed current amplitude and the DC current level through the two control signals BIAS_DC and BIAS_AC, which act on the transistors M2 and M3, respectively. The LASER generates the Power and Data Optical signal that passes through the skin and is converted into the Pulsed Coded Data signal using the TransImpedance Amplifier (TIA) connected to the Data-PD array of the INTERNAL UNIT of the SLIPT. The schematic of the implemented TIA is shown in Figure 7. It is composed of the transistors M1–M5 and includes the resistor R1 setting the TIA gain. Three additional CMOS inverter stages implemented by the transistor pairs, M6–M7, M8–M9, and M10–M11, generate the Pulsed Coded Data signal. At this time, the RX-MODULE executes the clock and data recovery process performed by the internal CLOCK REC, COUNTER, BUFFER, and PISO blocks. In this way, the transmitted data and the clock synchronism are acquired to provide the Recovered Bitstream and Recovered Bitstream-Sync signals to the ACTUATOR. The CLOCK-REC block generates: (i) the Sym-Clk clock signal (synchronous with the received symbol); (ii) the Recovered Bitstream-Sync signal; and (iii) the Temp-Clock signal. The frequencies of the Recovered Bitstream-Sync and Temp-Clock signals, as a function of the frequency of the Sym-Clk clock signal, are equal to:
f R e c o v e r e d   B i t s t r e a m - S y n c   = f S y m - C l k × N B i t  
f T e m p - C l o c k   = f S y m - C l k × 2 N B i t
In addition, the LD-Buffer signal is a replica of the received Sync-Pulse signal. All these timing and synchronism signals perform the data decoding and demodulation processes: each couple of Sync-Pulse and Data-Pulse signals of the Pulsed Coded Data signal identify the time window where the Temp-Clock signal was generated. At the beginning of each symbol period T S , the 6-bits COUNTER is firstly reset by the LD-Buffer and then increased by the Temp-Clock signal. Simultaneously, the number of the transitions of the Temp-Clock signal is stored by the COUNTER block. Thus, at the end of each symbol period T S , the Counter Output signal related to the transitions detected by the COUNTER block corresponds to a specific recovered symbol that is stored in the BUFFER block. The Recovered Symbol at the BUFFER block output is saved and serialized through the PISO register by employing the Recovered Bitstream-Sync and Sym-Clk signals. Therefore, the PISO register generates the Recovered Bitstream signal as a perfect replica of the Transmitted Bitstream signal, except for a time delay of about two symbol periods T S due to the coding modulation process performed by the TX-MODULE and the decoding and demodulation processes performed by the TX-MODULE. Finally, the two-output digital Recovered Bitstream and Recovered Bitstream-Sync signals are used by the ACTUATOR block designed for the specific application. Table 1 reports the size of the components of the analog circuits shown in Figure 4, Figure 5, Figure 6 and Figure 7.

5. Post-Layout Simulations Results

The SLIPT system functionalities and operations are validated by performing a series of post-layout simulations. The EXTERNAL UNIT optically transmits the Sync-Pulses and Data-Pulses signals by using 300 ps laser pulses and employing the reverse S-PPM modulation technique, thus achieving a 240 Mbps data rate transmission with a symbol length of 6-bits. The SLIPT operating window is equal to 12.5 µs repeated every 500 µs. The 12.5 µs time duration of the operating window corresponds to the time during which the INTERNAL UNIT can be suitably powered to perform the transmitted data acquisition after every charge cycle of the OWPT-MODULE. The dead-time of 500 µs is required by the OWPT-MODULE to store enough energy so as to power then the INTERNAL UNIT, therefore enabling the subsequent data acquisition. Under these operating conditions, data packages of 3 kbit are transmitted/received with an overall system throughput of 6 Mbps and an energy efficiency of about 7 pJ/bit. As an example, the chosen operating window allows for the generation of signals in the kHz frequency range, so as to produce suitable nerve stimulations [32]. It is worth noting that the SLIPT operating window can be varied by changing the values of the capacitors used by the OWPT-MODULE.
Referring to Figure 1 and the configuration of the PW-PD array of Si photodiodes in the right panel of Figure 3, with the OWPT input voltage set at 0.75 V, the INTERNAL UNIT can accumulate the energy for its operation during the working window of 12.5 µs (i.e., the period between the transmissions of two consecutive symbols) and the period of 500 µs when the data transmission is discontinued to allow the OWPT-MODULE to fully recover energy in order to power the INTERNAL UNIT. An example of a post-layout simulation is shown in Figure 8, where all the electrical and optical operations performed by the SLIPT system are reported.
From the top to the bottom of the upper panel of Figure 8, the first plot is the OWPT-Input voltage, which is always equal to 750 mV, except when the data transmission is activated; the second plot is the CP-Output voltage that, at the beginning of the SLIPT operation (considering the initial voltage equal to zero), employs 1.5 ms to reach the voltage level of 1.6 V and drops down to 1.2 V (the minimum INTERNAL UNIT operating voltage) during the data transmission window of 12.5 µs. Throughout the dead-time of 500 µs between two consecutive transmission windows, the INTERNAL UNIT is disconnected, thus allowing the OWPT-MODULE to recover sufficient energy and increase the value of the CP-Output voltage from 1.2 to 1.6 V, which is needed to again supply the INTERNAL UNIT. The third plot is the OWPT-Output voltage at the input of the LDO block, which guarantees an average power of 2 mW to supply the INTERNAL UNIT.
In the lower panel of Figure 8, a magnification of the transmission of four 6-bits symbols with the related data coding and decoding processes is reported. In particular, the Transmitted Bitstream signal is a pseudorandom sequence of bits, where each group of 6-bits composes a specific symbol to be transmitted. The related Bitstream-Sync signal is a clock signal with a period equal to that of a single bit. According to the reverse S-PPM modulation technique (see Figure 2), the Pulsed Coded Data signal (i.e., the TIA output of Figure 1) includes the Sync-Pulse signal generated at the beginning of every symbol to be transmitted and the additional Symbol Pulse signal with a value of the delay time Δ T specific for each of the four transmitted symbols. Finally, the Recovered Bitstream-Sync and the Recovered Bitstream signals demonstrate the correct operations performed by the RX-MODULE of the INTERNAL UNIT.
The main characteristics of the proposed SLIPT system are reported in Table 2 and are compared with those of similar solutions designed for biomedical applications and reported in the literature. Additionally, the first column of Table 2 also shows the main features of an RF-based integrated solution reported here only for comparison with those of the optical-based solutions. The Power Conversion Efficiency (PCE) is evaluated as the ratio between the OWPT-MODULE output and input powers. On the contrary, the Energy Efficiency is calculated as the ratio between the overall power consumption of the circuit in a time unit and the number of bits received in the same time period. Except for the data rate, with respect to the RF-based system, the proposed SLIPT architecture shows a better energy efficiency, lower chip size and power supply voltage, and a value only 0.7 lower for the power transfer efficiency. On the other hand, the comparison to the features achievable with the other reported optical systems demonstrates that the proposed SLIPT system reaches the best values concerning the maximum data rate, energy efficiency, power transfer efficiency, and dimension of the chip, since it includes the OWPT MODULE capacitors.

6. Conclusions

This paper reports on the design and performance analysis of a Simultaneous Lightwave Information and Power Transfer (SLIPT) system suitable for implantable biomedical devices. The system is composed of an external and an internal unit (i.e., implantable), both designed in TMSC 0.18 µm standard CMOS Si technology. The resulting Si areas are 200 × 260 µm2 and 615 × 950 µm2 for the SLIPT internal and external units, respectively. By using a suitable integrated array of four Si photodiodes, the SLIPT internal unit receives data streams optically transmitted from the SLIPT external unit by using a semiconductor laser. The data-encoding process employs a novel reverse multilevel synchronized pulse position modulation technique that also enables the semiconductor laser to energize an optical wireless power transfer (OWPT) module located in the SLIPT internal unit by using an integrated array of eight Si photodiodes. This way, the OWPT module can supply all the SLIPT internal unit circuitry. The semiconductor laser is always in operation and data packages of 6-bit symbols are optically transmitted by quickly switching off the laser driving current, thus disabling the laser action. Under these operation conditions, data transmission is achieved by generating “dark” laser pulses (i.e., absence of light for short periods) instead of the “bright” laser pulses (i.e., presence of light) commonly used in optical communication systems. Data transmission is enabled within a time window of 12.5 µs every 500 µs. The latter is the time needed for the OWPT to fully recover energy to power the SLIP internal unit. The results of a series of post-layout simulations were presented and discussed to demonstrate that the proposed SLIPT system was capable of achieving a final data throughput of 6 Mbps, an energy efficiency of 7 pJ/bit, and an OWPT module power transfer efficiency of 40%. Finally, these features were compared with those obtained from other similar solutions for biomedical applications reported in the literature.

Author Contributions

Conceptualization, A.D.M., G.D.P.S. and T.G.C.; data curation, G.D.P.S., E.P. and T.G.C.; formal analysis, G.D.P.S. and E.P.; funding acquisition, A.D.M.; investigation, G.D.P.S.; methodology, A.D.M., M.F. and T.G.C.; project administration, A.D.M.; resources, M.F.; supervision, A.D.M., M.F., E.P. and T.G.C.; validation, G.D.P.S.; visualization, G.D.P.S. and E.P.; writing—original draft, A.D.M. and E.P.; writing—review and editing, A.D.M., G.D.P.S., M.F., E.P. and T.G.C. All authors supplied the overall system specifications, equally providing the contribution to this work. All authors have read and agreed to the published version of the manuscript.

Funding

This work has been funded by the European Union—Next Generation EU, under the Italian Ministry of University and Research (MUR), National Innovation Ecosystem grant ECS00000041—VITALITY—CUP E13C22001060006.

Data Availability Statement

Data is contained within the article.

Conflicts of Interest

The authors declare no conflicts of interest.

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Figure 1. The proposed SLIPT system at a block level that uses the reverse S-PPM modulation technique for data transmission and power transfer.
Figure 1. The proposed SLIPT system at a block level that uses the reverse S-PPM modulation technique for data transmission and power transfer.
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Figure 2. Example of the time diagram of the coding process using the novel reverse S-PPM modulation technique.
Figure 2. Example of the time diagram of the coding process using the novel reverse S-PPM modulation technique.
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Figure 3. Layouts of the external (left panel) and internal (right panel) unit of the SLIPT system designed in TSMC 0.18 μm standard CMOS Si technology.
Figure 3. Layouts of the external (left panel) and internal (right panel) unit of the SLIPT system designed in TSMC 0.18 μm standard CMOS Si technology.
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Figure 4. Schematic circuits at transistor level of the RO and CP blocks (for the CP block is reported only one of the four identical stages of which it is composed).
Figure 4. Schematic circuits at transistor level of the RO and CP blocks (for the CP block is reported only one of the four identical stages of which it is composed).
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Figure 5. Schematic circuit at transistor level of the LDO block.
Figure 5. Schematic circuit at transistor level of the LDO block.
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Figure 6. Schematic circuit at transistor level of the DRIVER block.
Figure 6. Schematic circuit at transistor level of the DRIVER block.
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Figure 7. Schematic circuit at transistor level of the TIA block.
Figure 7. Schematic circuit at transistor level of the TIA block.
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Figure 8. Post-layout simulation results of the SLIPT system operating at 6 Mbps and transmitting a pseudorandom sequence coded with 6-bits per Symbol.
Figure 8. Post-layout simulation results of the SLIPT system operating at 6 Mbps and transmitting a pseudorandom sequence coded with 6-bits per Symbol.
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Table 1. Transistor and device sizes of the analog circuit schematics reported in Figure 4, Figure 5, Figure 6 and Figure 7.
Table 1. Transistor and device sizes of the analog circuit schematics reported in Figure 4, Figure 5, Figure 6 and Figure 7.
-DeviceW (µm)L (µm)
RO and CP blocksM1, M3, M50.441
M2, M4, M60.445
M70.220.18
M80.220.36
M9, M1180.18
M10, M1240.18
M13, M15, M14, M161500.18
C1, C2 = 28.64 pF--
DRIVER blockM1, M360.18
M267
M490.18
M51200.18
TIA blockM1, M22500.18
M3300.18
M4500.18
M5430.18
M6, M8, M1090.18
M7, M9, M1130.18
R1 = 600 Ω--
LDO blockM1, M230.18
M4, M514
M3, M633
M74500.18
Q11010
R1 = 100 kΩ--
R2 = 500 kΩ--
R3 = 19 kΩ--
CC = 1 pF--
Table 2. Comparison of the main characteristics of the proposed SLIPT system with similar solutions reported in the literature.
Table 2. Comparison of the main characteristics of the proposed SLIPT system with similar solutions reported in the literature.
[14]
(2022)
[17]
(2014)
[24]
(2022)
This Work
(2024)
Communication
Link Type
RFOPTICALOPTICALOPTICAL
CMOS
Technology (nm)
180130180180
Chip
Size (mm2)
4.35.35
(PDs included)
0.074
(Off-chip capacitors)
0.64
(PDs included)
Power
Supply (V)
2.31.23/1.81.2
Data
Rate (Mbps)
20.50.0161.356
Energy
Efficiency (pJ/bit)
3230628007
Power Transfer
Efficiency (%)
604.9N/A40
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MDPI and ACS Style

De Marcellis, A.; Di Patrizio Stanchieri, G.; Faccio, M.; Palange, E.; Constandinou, T.G. A 6 Mbps 7 pJ/bit CMOS Integrated Wireless Simultaneous Lightwave Information and Power Transfer System for Biomedical Implants. Electronics 2024, 13, 1774. https://doi.org/10.3390/electronics13091774

AMA Style

De Marcellis A, Di Patrizio Stanchieri G, Faccio M, Palange E, Constandinou TG. A 6 Mbps 7 pJ/bit CMOS Integrated Wireless Simultaneous Lightwave Information and Power Transfer System for Biomedical Implants. Electronics. 2024; 13(9):1774. https://doi.org/10.3390/electronics13091774

Chicago/Turabian Style

De Marcellis, Andrea, Guido Di Patrizio Stanchieri, Marco Faccio, Elia Palange, and Timothy G. Constandinou. 2024. "A 6 Mbps 7 pJ/bit CMOS Integrated Wireless Simultaneous Lightwave Information and Power Transfer System for Biomedical Implants" Electronics 13, no. 9: 1774. https://doi.org/10.3390/electronics13091774

APA Style

De Marcellis, A., Di Patrizio Stanchieri, G., Faccio, M., Palange, E., & Constandinou, T. G. (2024). A 6 Mbps 7 pJ/bit CMOS Integrated Wireless Simultaneous Lightwave Information and Power Transfer System for Biomedical Implants. Electronics, 13(9), 1774. https://doi.org/10.3390/electronics13091774

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