FPGA-Based Hardware Accelerator on Portable Equipment for EEG Signal Patterns Recognition

Round 1

Reviewer 1 Report

Overview and general recommendation:

The authors proposed a lightweight CNN inference hardware accelerator unit based on the PYNQ platform. It is an interesting study. Especially, it includes artificial intelligence (AI) technology. And in the article, the authors also compare three types (Raw, STFT, CWT) of EEG signal and the device computing performance. There are several questions and suggestions that need the authors response.

Major comments:

1. The introduction does not mention why to choose STFT and CWT. The benefit of these two methods for EEG. That seems to be one of the characteristics of the article.

2. In lines 102-106. The descript of Fast Fourier Transform (FFT) is confusing. The first line shows that FFT is widely used in time-frequency domain analysis, but it also says that the time and frequency domains cannot be considered. Finally, the solution is FFT again.

3. In the article, the author compares the RAW signal and after conversion by STFT and CWT for eyes open/close. Whether the image converted by STFT can also be added to the article.

4. In figure 5, the upper left image is an alpha signal or not? And the upper right is a beta signal? Please add a description.

5. Relevant statements should be included in the article, such as “Author Contributions”, “Funding”, “Acknowledgment”, “Conflicts of interest”, etc.

6. Did the experiment been reviewed by the Institutional Review Board? If so, please add the pass number and description.

Minor comments:

1. Line 15, “meth-ods” should be “methods”.

2. The from in “CWT-CNN” is different between line 16 and line 17, please unify.

3. In figure 2 mentions “the red circle”, but not seen in the picture.

4. Line 265, the end of the sentence seems incomplete.

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Reviewer 2 Report

1.     The title of this paper implies that the main contribution of this work is the configuration of a FPGA as a computational accelerator, nevertheless, I have not found any reference to the architecture implemented in the FPGA. Then, the following question required to be cleared.

a.     What the main contribution is?

b.     What the authors’ original work is? (I don’t have any reference about what FPGA is executing so, no reference to compare with other works and evaluate the authors’ original work).

c.     What is the structure of your accelerator?

d.     What part of the process this accelerator improves?

e.     With the information provided in your paper, could any reader replicate your idea of “FPGA Based Hardware Accelerator” for any other application?

f.      Are you proposing in this paper the CNN framework?

2.     In section 2.5, do not dedicate a section to describe the hardware and/or software you used, instead of that describe how you used them and what results and important information you obtained from them.

3.     Table 3 is very confusing since you are presented different classifications (GPU ARM FPGA I5 … + GTX ARM+FPGA)

4.     Why only CWT-CNN framework was used to obtain the table 3 results? How is the behavior with STFT-CNN and Raw-CNN?

5.     Your power comparison is not adequate, since you are considering estimations and in the case of GPU you are considering the maximum power delivered by the power source (this does not mean that GPU system is consuming all this power). With this your power evaluation is not fair. 

6.     without considering the power consumption because the measurement criterion is not fair, GPU solution seems to be the best.

7.     Int table 4. DSP48e is a very particular block for Xilinx platforms, not all readers know the meaning of this term and how are you using it.

8.      According with your data in table 4, your work requires more RAM than [32] and [33], more DSP48E blocks than [32], more Flip-flops than [33], mor Look-Up tables than [33], slightly high accuracy than [32]. How do you justify that this 0.14 of accuracy improvement makes your proposal better than other works? 

9.     Please provide a details specifically of your  CNN inference accelerator framework, otherwise it not possible a fair evaluation of your work in general.

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Round 2

Reviewer 2 Report

Please, except for my concern 10, reword the document to address my concerns 1-9, I found you only addressed my concern 7 in the document.

see attached file

Comments for author File: Comments.pdf

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Round 3

Reviewer 2 Report

No more concerns.

Author Response

Thank you for your suggestions.