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Appl. Sci. 2017, 7(2), 154;

A Scalable Parallel Architecture Based on Many-Core Processors for Generating HTTP Traffic

Future Network Research Center, Chongqing University of Posts and Telecommunications, Chongqing 400065, China
Author to whom correspondence should be addressed.
Academic Editor: Lorenzo J. Tardón
Received: 8 December 2016 / Revised: 25 January 2017 / Accepted: 2 February 2017 / Published: 8 February 2017
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The past years have witnessed the significant development of the Internet. Numerous emerging network architectures and protocols have triggered the demand for traffic generators which stand in stark contrast to previous schemes. Namely, fixed test content is inefficient in the presence of such a dynamic and realistic demand. Moreover, the requirement of high-performance has raised the stakes on developing a new concurrent system. In this paper, we present a hierarchical parallel design for a Web traffic generator on a TILERAGX36 processor, called TGMP. We discuss the challenges in developing its hierarchical architectural design, and elaborate on its implementation details. Specifically, in order to generate a realistic network workload over a long and large time scale, we propose a user-control scheme based on cubic spline interpolation. To better improve the scalability of the system and satisfy the required flow rate, we adopt techniques, including optimization of parameters under the Linux kernel, event-driven concurrency, and parallel architectures of a TILERAGX36 processor. The experimental results demonstrate that TGMP is able to create real traffic and simulate 50,000 users accessing the Web server simultaneously. View Full-Text
Keywords: scalability; high performance; TGMP; TILERAGX36 scalability; high performance; TGMP; TILERAGX36

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Wang, X.; Xu, C.; Jin, W.; Wang, J.; Wang, Q.; Zhao, G. A Scalable Parallel Architecture Based on Many-Core Processors for Generating HTTP Traffic. Appl. Sci. 2017, 7, 154.

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