VDGA-Based Resistorless Mixed-Mode Universal Filter and Dual-Mode Quadrature Oscillator

Abstract

This study introduces an electronically tunable resistorless mixed-mode universal filter and dual-mode quadrature oscillator configuration utilizing merely two voltage differencing gain amplifiers and two grounded capacitors. The suggested filter can perform all generic biquadratic filter functions in all four modes: voltage mode, trans-admittance mode, current mode, and trans-impedance mode, while utilizing the same design. The pole frequency and the quality factor can be tuned electronically and orthogonally by means of the transconductances of the voltage differencing gain amplifier. The dual-mode quadrature oscillator featuring both voltage and current outputs can also be obtained from the proposed filter core. It additionally provides separate electronic control of the oscillation condition and frequency. Several PSPICE simulations with the TSMC 0.18 μm CMOS model confirm the feasibility of the proposed configurations. Both proposed circuits were experimentally evaluated using commercially available integrated circuit LM13600s. Both simulation and experimental results have validated the performance of the design.

1. Introduction

Active frequency-selective universal filters play an important part in several signal processing systems, as they can implement multiple filtering functions simultaneously. Analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) utilize active universal filters for diverse signal processing functions, including noise elimination, phase adjustment, and aliasing prevention. They are also an integral part of audio processing, telecommunications, and instrumentation systems. Image processing uses analog universal filters to eliminate noise or enhance the edges of images. Additionally, sinusoidal quadrature oscillators (QOs) produce two identical sinusoidal output signals, which have equal amplitude and frequency with a 90° phase shift. They are widely employed in numerous electrical engineering applications, including communication, information, and measurement systems, such as communication receivers, zero-IF and image rejection receivers, soil measurement systems, and phase-sensitive detection.

Therefore, the design and synthesis of active analog universal filters and QOs have attracted the interest of researchers during the past decades. In the technical literature [1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28], there are numerous analog universal filters and QO realizations that utilize a variety of active components. In addition, the circuits mentioned above are examined to provide further insight on certain aspects of circuit design and integrated circuit (IC) fabrication as follows:

• Modern analog signal processing circuits may process signals in a mixed mode, integrating both voltage or current operations. Many configurations, as reported in [1,2,3,4,6,7,8,9,10,11,14,15,16,17,18,19,20,23,24,25,26,28], are designed for only a single mode of operation.
• Circuit designs that use floating capacitors generally suffer from the perspective of IC fabrication [9,21]. The design structures referenced in [1,2,3,5,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,25,26,28] further employ external passive resistors for their implementations.
• The electronic tuning feature is a crucial characteristic of modern analog signal processing circuits. The filter architectures described in [2,9,11,22,25,26] lack the characteristic of electronic tunability.
• Configurations capable of operating as both a mixed-mode universal filter and QO with the same structure seem to be more useful and versatile in signal processing circuits and solutions. It was intended for the circuit configurations presented in [1,3,4,5,6,7,9,10,11,12,15,16,17,18,21,22,23,26,27,28] to function solely as universal filters or as QO circuits.
• Experimental measurements are a crucial method for assessing the feasibility of the circuit for acceptance purposes. In [4,5,7,8,9,11,12,13,16,23,24,25,27,28], the features and applications of the circuits were evaluated by only computer simulations.

In the present scenario, mixed-signal processing systems necessitate interaction between current-mode (CM) and voltage-mode (VM) circuits. To enable a distortion-free interface between CM and VM sections, transimpedance-mode (TIM) and transadmittance-mode (TAM) circuits are required to satisfy this criterion. The voltage differencing gain amplifier (VDGA) has emerged as an alternative active component in recent years for a wide range of analog generation circuits and signal processing tasks [13,29,30]. The VDGA generally has three voltage-controlled current sources, each possessing the requisite number of outputs, which are internally interconnected sub-circuits. Active components with multiple adjustable characteristics are especially advantageous in circuit design and synthesis. The resulting circuit solutions frequently enable electronic control of many parameters. Thus, the main objective of this study is to propose an electronically tunable resistorless mixed-mode universal biquadratic active filter and QO circuit employing a VDGA as the active element. There are only two VDGAs and two grounded capacitors in the proposed core circuit; no external passive resistors are used. The designed filter is capable of generating all five biquadratic filter functions: lowpass (LP), bandpass (BP), bandstop (BS), highpass (HP), and allpass (AP), in CM. The filter in VM, TAM, and TIM can simultaneously realize LP, BP, and HP responses. The pole frequency and quality factor of the filter can be changed electronically and independently by varying the transconductance gains of the VDGA. Furthermore, a dual-mode QO featuring both voltage and current outputs is derived from the filter design. The oscillation condition and frequency of the QO are electronically and separately adjustable. The PSPICE simulations employing TSMC 0.18 μm CMOS technology have confirmed the effectiveness of the proposed filter circuit. Experimental findings of commercially available IC LM13600 dual OTAs have been incorporated as proof of the theoretical claims.

Table 1. Performance comparison of the prior related works [1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30] with the proposed circuits.

Ref.	Configuration	No. of Active Components	No. of Passive Components		Operation Mode of Filter				Electronic Tunability	Orthogonal Tuning of ωp and Q	Simulation			Experimental		QO
			R	C	VM	CM	TAM	TIM			Technology	Power Supply (V)	Power Dissipation (mW)	Technology	Power Supply (V)	Operation Mode	Orthogonal Tuning of OC and ωosc
[1]	Filter	Figure 2a, DDCCTA = 1	F = 2	G = 2	all five	--	--	--	yes	yes	0.18 μm	±0.9, −0.5	0.389	AD8130, AD844, MAX435	±5	--	--
		Figure 2b, DDCCTA = 1	F = 2, G = 1	G = 2	all five	--	--	--	yes	yes
[2]	Filter	CCII = 4	F = 2, G = 2	G = 2	all five	--	--	--	no	yes	--	--	--	AD844	±15	--	--
[3]	Filter/QO	VDDDA = 3	G = 1	G = 2	all five	--	--	--	yes	yes	0.18 μm	±0.9, −0.35	0.343	LM13700, AD830	±5	VM	yes
[4]	Filter	CCII- = 1, OTA = 2	none	G = 2	--	all five	--	--	yes	yes	0.18 μm	±1, −0.47, −0.71	N/A	--	--	--	--
[5]	Filter	VDTA = 1	G = 1	F = 1, G = 2	LP, BP, HP	LP, BP, HP	--	--	yes	yes	0.18 μm	±0.9	0.54	--	--	--	--
[6]	Filter	CCCII = 3	none	G = 2	--	all five	--	--	yes	yes	PR100N, NP100N	±2.5	9.9	2N3904, 2N3906	±2.5	--	--
[7]	Filter	CCCII = 3	none	G = 2	--	LP, BP, HP	--	--	yes	yes	PR100N, NP100N	±3	N/A	--	--	--	--
[8]	Filter/QO	DXCCTA = 1	G = 1	G = 2	--	all five	--	--	yes	no	0.18 μm	±1.25, +0.42	N/A	LM13700, AD844	±5	CM	yes
[9]	Filter	FDCCII = 1	F = 1, G = 2	F = 2	LP, BP, HP, BS	--	--	--	no	no	0.18 μm	±1.25	2.8	--	--	--	--
[10]	Filter	VDDDA = 3	G = 1	G = 2	all five	--	--	--	yes	yes	0.18 μm	±0.9, −0.35	N/A	LT1228, AD830	±5	--	--
[11]	Filter	Figure 2, DVCC = 3	F = 1, G = 1	G = 2	LP, BP, HP, BS	--	--	--	no	no	0.13 μm	±0.75	4.36	--	--	--	--
		Figure 3, DVCC = 3	G = 2	G = 2	all five	--	--	--
[12]	Filter	CDTA = 3	F = 1, G = 1	G = 2	LP, BP, HP	LP, BP, HP	LP, BP, HP	LP, BP, HP	yes	no	0.18 μm	±2.5	N/A	--	--	--	--
[13]	Filter/QO	VDGA = 1	F = 1, G = 1	G = 2	LP, BP, HP	LP, BP, HP	--	--	yes	yes	0.25 μm	±1	1.49	--	--	VM, CM	yes
[14]	Filter/QO	CFOA = 3	F = 2, G = 2	G = 2	LP, BP, HP	--	--	--	no	yes	AD844	±6	255	AD844	±6	VM	yes
[15]	Filter	LT1228 = 3	F = 3, G = 1	G = 2	LP, BP, HP	--	--	--	yes	yes	LT1228	±5	N/A	LT1228	±5	--	--
[16]	Filter	ZC-VDCC = 1	G = 2	F = 1, G = 1	BP, HP	--	--	--	no	yes	0.18 μm	±0.9	1.65	--	--	--	--
[17]	Filter	CFOA = 3	F = 2, G = 1	G = 2	LP, BP, BS	--	--	--	no	yes	AD844	±6	255	AD844	±6	--	--
[18]	Filter	LT1228 = 2	F = 4, G = 1	G = 2	LP, BP, HP	--	--	--	yes	yes	LT1228	±5	N/A	LT1228	±5	--	--
[19]	Filter/QO	VDCC = 2	G = 3	G = 2	--	all five	--	--	yes	yes	0.18 μm	±0.9	N/A	LM13700, AD844, OPA860	±5	CM	yes
[20]	Filter/QO	VD-DIBA = 2	F = 1, G = 1	G = 2	all five	--	--	--	yes	yes	0.18 μm	±0.9	N/A	LM13700, AD830	±5	VM	yes
[21]	Filter	VDBA = 2	G = 2	F = 2	all five	all five	all five	LP, BP	yes	yes	0.18 μm	±0.75	0.373	LT1228	±5	--	--
[22]	Filter	DVCC = 2	G = 4	G = 2	LP, BP, HP	all five	HP, BP	LP, BP, HP	no	yes	0.18 μm	±1.25	8.47	AD844	±12	--	--
[23]	Filter	VDCC = 2	G = 1	G = 2	--	all five	--	--	yes	yes	0.18 μm	±0.9	2.61	--	--	--	--
[24]	Filter/QO	VDTA = 2	none	G = 2	LP, BP, HP	LP, BP, HP	--	--	yes	yes	0.25 μm	±1	3	--	--	VM, CM	yes
[25]	Filter/QO	CFOA = 3	F = 3, G = 2	G = 2	LP, BP, HP	--	--	--	no	yes	--	--	--	0.18 μm	±0.9	VM	yes
[26]	Filter	Figure 2a, CFOA = 2	G = 3	G = 2	LP, HP	--	--	--	no	no	AD844	N/A	N/A	AD844	±15	--	--
		Figure 2b, CFOA = 2	F = 1, G = 2	G = 2
[27]	Filter	VDTA = 2	none	G = 2	LP, BP	LP, BP, HP	LP, BP, HP	--	yes	yes	0.18 μm	±0.9	N/A	--	--	--	--
[28]	Filter	LT1228 = 3	F = 5, G = 2	G = 2	LP, BP, HP, BS	--	--	--	yes	yes	LT1228	±5	N/A	--	--	--	--
This work	Filter/QO	VDGA = 2	none	G = 2	LP, BP, HP	all five	BP, HP	LP, BP, HP	yes	yes	0.18 μm	±0.9	2.84	LM13600	±5	VM, CM	yes

Note: R = resistor, C = capacitor, F = floating, G = grounded, N/A = not available or not measured, “--” = not provided, QO = quadrature oscillator, DDCCTA = differential difference current conveyor transconductance amplifier, CCII = second-generation current conveyor, CCII- = minus CCII, CCCII = current-controlled current conveyor, FDCCII = fully differential second-generation current conveyor, OTA = operational transconductance amplifier, VDTA = voltage differencing transconductance amplifier, DXCCTA = dual-X current conveyor transconductance amplifier, CDTA = current differencing transconductance amplifier, DVCC = differential voltage current conveyor, VDGA = voltage differencing gain amplifier, CFOA = current-feedback operational amplifier, VDCC = voltage differencing current conveyor, ZC-VDCC = z-copy VDCC, VD-DIBA = voltage differencing differential input buffered amplifier, VDBA = voltage differencing buffered amplifier.

provides a comparative study of the proposed circuits and the related works [1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28] to further improve the literature survey. It summarizes benefits and drawbacks of both the prior research studies and the proposed designs.

2. Basic Concept of VDGA

This study utilizes VDGAs as active building blocks in the design. The VDGA component features two voltage input terminals (p and n) characterized by high input impedance, three current output terminals (z+, z−, and x) with high output impedance, and one voltage output terminal (w) exhibiting low output impedance. The differential input voltage, (v_p − v_n), is converted into current by the transconductance gain, g_mA, which flows through the output terminal z+ (i_z+), while an inverted current flows via the terminal z− (i_z−). The voltage at terminal z+ (v_z+) is transformed into current at terminal x (i_x) by the transconductance gain g_mB and is simultaneously sent to terminal w (v_w) with a voltage gain η. Figure 1 shows the VDGA representation and its CMOS realization with its ideal functionality expressed as follows:

$$\left[\begin{array}{c}{i}_{z+}\\ i_{z-}\\ i_x\\ v_w\end{array}\right]=\left[\begin{array}{ccc}{g}_{mA}& -g_{mA}& 0\\ -g_{mA}& g_{mA}& 0\\ 0& 0& -g_{mB}\\ 0& 0& \eta \end{array}\right]\left[\begin{array}{c}{v}_p\\ v_n\\ v_{z+}\end{array}\right].$$

(1)

Here, g_mk (where k = A, B, C) and η are the transconductance gain and the transfer voltage gain of the VDGA, respectively. Generally, the g_mk value is electronically tunable via an external bias current, simplifying the design of circuit parameters. Electronic control becomes crucial when circuit design parameters are altered and the integrated circuit is constructed. According to the CMOS VDGA circuit in Figure 1b, the voltage gain η is equal to the ratio of g_mB to g_mC (or η = g_mB/g_mC).

3. Proposed Resistorless Mixed-Mode Universal Filter

Figure 2 illustrates the proposed mixed-mode universal biquadratic filter, which is designed using two VDGA units and two grounded capacitors, eliminating the need for any external passive resistors. In IC design, employing grounded capacitors is helpful for reducing stray parasitic capacitance at their terminals, which is alleviated by external grounded capacitors.

With the same designed topology, the proposed circuit can realize mixed-mode universal filter functions in VM, TAM, CM, and TIM, as characterized below.

3.1. VM Filter

If i_in = 0, namely open-circuited, the electronically tunable SITO universal filter in VM can be obtained with the following voltage transfer functions:

$$T_{VLP}(s)={\displaystyle \frac{v_{o1}}{v_{in}}}=T_{LP}(s),$$

(2)

$$T_{VBP}(s)={\displaystyle \frac{v_{o2}}{v_{in}}}=-T_{BP}(s),$$

(3)

and

$$T_{VHP}(s)={\displaystyle \frac{v_{o3}}{v_{in}}}=-T_{HP}(s).$$

(4)

In the above relations, the transfer functions T_LP(s), T_BP(s), and T_HP(s) are in the form of, respectively:

$$T_{LP}(s)={\displaystyle \frac{\left(\frac{g_{mA1}{g}_{mB1}}{C_1{C}_2}\right)}{D(s)}},$$

(5)

$$T_{BP}(s)={\displaystyle \frac{\left(\frac{g_{mA1}}{C_2}\right)s}{D(s)}},$$

(6)

and

$$T_{HP}(s)={\displaystyle \frac{\left(\frac{g_{mA1}}{g_{mA2}}\right)s^2}{D(s)}},$$

(7)

where:

$$D(s)=s^2+\left({\displaystyle \frac{g_{mB2}{\eta }_1}{C_2}}\right)s+\left({\displaystyle \frac{g_{mA1}{g}_{mB1}}{C_1{C}_2}}\right).$$

(8)

In the expressions above, the parameters g_mki and η_i (i = 1, 2) refer to the gains g_mk and η of the corresponding VDGA. As indicated by Equations (2)–(4), the output voltage v_o1 exhibits a noninverting LP response, v_o2 displays an inverting BP response, and v_o3 presents an inverting HP response. In addition to Equation (7), the realization of the HP filter requires an equal element condition g_mA2 = g_mB2.

3.2. TAM Filter

With i_in = 0, the BP and HP filter responses in TAM can also be realized from i_o2 and i_o3, respectively, as given by:

$$T_{YBP}(s)={\displaystyle \frac{i_{o2}}{v_{in}}}=\left({\displaystyle \frac{g_{mB1}}{g_{mA1}}}\right)T_{BP}(s),$$

(9)

and

$$T_{YHP}(s)={\displaystyle \frac{i_{o3}}{v_{in}}}=-\left({\displaystyle \frac{g_{mA2}}{g_{mA1}}}\right)T_{HP}(s),$$

(10)

The proposed circuit realizes TAM BP and HP filter functions, as shown in Equations (9) and (10), with the passband gains of (g_mB1/g_mA1) and (g_mA2/g_mA1), respectively. Note that the passband gains for the proposed circuit can be tuned electronically by adjusting the ratio of VDGA transconductances. It is important to mention that the output current responses of this type are sensed from the passive elements; therefore, the practical implementations necessitate the current sensing units. The works of [4,19,23] suggested innovative solutions to achieving high-output impedance.

3.3. CM Filter

If v_in = 0, namely the node v_in is connected to ground, three generic biquadratic filter functions in CM may be derived simultaneously, and its transfer functions can be expressed by the following:

$$T_{ILP}(s)={\displaystyle \frac{i_{o1}}{i_{in}}}=-T_{LP}(s),$$

(11)

$$T_{IBP}(s)={\displaystyle \frac{i_{o2}}{i_{in}}}=-\left({\displaystyle \frac{g_{mB1}}{g_{mA1}}}\right)T_{BP}(s),$$

(12)

and

$$T_{IHP}(s)={\displaystyle \frac{i_{o3}}{i_{in}}}=\left({\displaystyle \frac{g_{mA2}}{g_{mA1}}}\right)T_{HP}(s).$$

(13)

It is further noted that the BS current response can be realized by connecting the relevant output currents as follows: i_BS = i_o3 + i_o1. Similarly, the AP current response can be derived from the interconnection of LP, BP, and HP responses, expressed as i_AP = i_o3 + i_o2 + i_o1. Since the LP current response i_o1 exhibits an inverting phase, an additional element is necessary to provide the noninverting phase of i_o1 for the BS and AP filter functions.

3.4. TIM Filter

With v_in = 0, the following LP, BP, and HP filter response in TIM can be obtained at the output terminals v_o1, v_o2, and v_o3, respectively:

$$T_{ZLP}(s)={\displaystyle \frac{v_{o1}}{i_{in}}}=-\left({\displaystyle \frac{1}{g_{mA1}}}\right)T_{LP}(s),$$

(14)

$$T_{ZBP}(s)={\displaystyle \frac{v_{o2}}{i_{in}}}=\left({\displaystyle \frac{1}{g_{mB2}{\eta }_1}}\right)T_{BP}(s),$$

(15)

and

$$T_{ZHP}(s)={\displaystyle \frac{v_{o3}}{i_{in}}}=-\left({\displaystyle \frac{1}{g_{mA2}}}\right)T_{HP}(s).$$

(16)

The realized filtering functions demonstrate that the circuit can generate all three standard biquadratic filter functions in all four operational modes utilizing the same circuit design. Thus, the circuit depicted in Figure 2 operates as a mixed-mode universal biquad filter, featuring the following key parameters:

$${\omega }_p=2\pi f_p=\sqrt{{\displaystyle \frac{g_{mA1}{g}_{mB1}}{C_1{C}_2}}},$$

(17)

and

$$Q=\left({\displaystyle \frac{1}{g_{mB2}{\eta }_1}}\right)\sqrt{{\displaystyle \frac{g_{mA1}{g}_{mB1}{C}_2}{C_1}}}=\left({\displaystyle \frac{g_{mC1}}{g_{mB2}}}\right)\sqrt{{\displaystyle \frac{g_{mA1}{C}_2}{g_{mB1}{C}_1}}}.$$

(18)

where η₁ = g_mB1/g_mC1, ω_p is the pole frequency in radians/second and Q is the quality factor of the filter. Equation (17) indicates that the circuit possesses electronic adjustability of the frequency ω_p through g_mA1 and/or g_mB1. On the other hand, the parameter Q in Equation (18) can also be electronically and independently tuned without affecting ω_p by g_mB2 and/or g_mC1. Consequently, the parameters ω_p and Q are orthogonally tunable by controlling (g_mA1 and/or g_mB1) and (g_mB2 and/or g_mC1) in that order. This feature is desired in universal biquadratic filters to provide flexibility of designing and tuning.

Table 2. Passband gains of the proposed mixed-mode universal biquad filter in Figure 2.

Operation Mode	LP	BP	HP
VM	1	−1	−1
TAM	--	${\displaystyle \frac{g_{mB1}}{g_{mA1}}}$	$-{\displaystyle \frac{g_{mA2}}{g_{mA1}}}$
CM	−1	$-{\displaystyle \frac{g_{mB1}}{g_{mA1}}}$	${\displaystyle \frac{g_{mA2}}{g_{mA1}}}$
TIM	$-{\displaystyle \frac{1}{g_{mA1}}}$	${\displaystyle \frac{g_{mC1}}{g_{mB1}{g}_{mB2}}}$	$-{\displaystyle \frac{1}{g_{mA2}}}$

provides the passband gains for the proposed filter functioning in all four modes.

4. Proposed Resistorless Dual-Mode Quadrature Oscillator

The proposed resistorless dual-mode QO circuit is slightly modified from Figure 2 by removing both input signals v_in and i_in, as illustrated in Figure 3. Circuit analysis of the configuration shown in Figure 3 leads to the following characteristic equation:

$$s^2+\left[{\displaystyle \frac{\left(g_{mA1}{\eta }_2-g_{mB2}\right){\eta }_1}{C_2}}\right]s+\left({\displaystyle \frac{g_{mA1}{g}_{mB1}}{C_1{C}_2}}\right)=0,$$

(19)

where η₂ = g_mB2/g_mC2.

From Equation (19), the oscillation condition (OC) and the oscillation frequency (ω_osc) of the proposed dual-mode QO can be derived, respectively, as:

$$g_{mA1}=g_{mC2},$$

(20)

and

$${\omega }_{osc}=2\pi f_{osc}=\sqrt{{\displaystyle \frac{g_{mA1}{g}_{mB1}}{C_1{C}_2}}}.$$

(21)

Equation (20) shows that the OC may be electrically modulated via g_mC2 without influencing the ω_osc. It should also be noted that the ω_osc in Equation (21) can be independently adjusted by g_mA1 and/or g_mB1. In other words, both OC and ω_osc parameters can be electronically and separately regulated by the selection of separate transconductances.

In a sinusoidal steady state, two output voltages v_osc1 and v_osc2 of the oscillator have the following relationship:

$${\displaystyle \frac{v_{osc1}}{v_{osc2}}}=\left|{\displaystyle \frac{g_{mB1}}{\omega C_1}}\right|e^{-j90°}.$$

(22)

This implies that the two voltage outputs are phase-shifted by 90°. Consequently, we expect that the output voltages v_osc1 and v_osc2 will be in quadrature form.

In the same way, the output currents i_osc1 and i_osc2 in the sinusoidal steady state exhibit a similar relationship as:

$${\displaystyle \frac{i_{osc1}}{i_{osc2}}}=\left|{\displaystyle \frac{g_{mB1}}{\omega C_2}}\right|e^{-j90°}.$$

(23)

Consequently, the output currents are quadrature signals as well.

5. Finite Tracking Error Analysis

The finite tracking signal errors associated with the VDGA terminals may be taken into account in practical performance. By considering the parasitic transfer gains, we can describe the realistic VDGA using the following relationships:

$$\left[\begin{array}{c}{i}_{z+}\\ i_{z-}\\ i_x\\ v_w\end{array}\right]=\left[\begin{array}{ccc}{\alpha }_A{g}_{mA}& -{\alpha }_A{g}_{mA}& 0\\ -{\alpha }_A{g}_{mA}& {\alpha }_A{g}_{mA}& 0\\ 0& 0& -{\alpha }_B{g}_{mB}\\ 0& 0& \delta \eta \end{array}\right]\left[\begin{array}{c}{v}_p\\ v_n\\ v_{z+}\end{array}\right].$$

(24)

In this case, α_k (α_k = 1 − ε_α) denotes the nonideal transconductance gain, while δ (δ = 1 − ε_δ) indicates the nonideal voltage gain. Both deviate from their optimal values due to the transfer errors ε_α (|ε_α | << 1) and ε_δ (|ε_δ | << 1).

The suggested resistorless mixed-mode universal biquad filter circuit depicted in Figure 2 is examined utilizing the nonideal model (24) of VDGA, resulting in the modified values ω_p and Q as follows:

$${\omega }_p^{\prime }=\sqrt{{\displaystyle \frac{{\alpha }_{A1}{\alpha }_{B1}{g}_{mA1}{g}_{mB1}}{C_1{C}_2}}},$$

(25)

and

$$Q^{\prime }=\left({\displaystyle \frac{g_{mC1}}{{\delta }_1{\alpha }_{B2}{g}_{mB2}}}\right)\sqrt{{\displaystyle \frac{{\alpha }_{A1}{\alpha }_{B1}{g}_{mA1}{C}_2}{g_{mB1}{C}_1}}},$$

(26)

where α_Ai, α_Bi, and δ_i are the nonideal gains α_A, α_B, and δ of the i-th VDGA (i = 1, 2), respectively. From Equations (25) and (26), the various sensitivity coefficients with respect to active and passive elements are determined as:

$$S_{{\alpha }_{A1},{\alpha }_{B1}}^{{\omega }_p^{\prime }}=S_{g_{mA1},g_{mB1}}^{{\omega }_p^{\prime }}={\displaystyle \frac{1}{2}}, S_{C_1,C_2}^{{\omega }_p^{\prime }}=-{\displaystyle \frac{1}{2}},$$

(27)

$$S_{g_{mC1}}^{Q^{\prime }}=-S_{g_{mB2}}^{Q^{\prime }}=1, S_{{\delta }_1}^{Q^{\prime }}=S_{{\alpha }_{B2}}^{Q^{\prime }}=-1,$$

(28)

and

$$S_{{\alpha }_{A1},{\alpha }_{B1}}^{Q^{\prime }}=S_{g_{mA1}}^{Q^{\prime }}=-S_{g_{mB1}}^{Q^{\prime }}={\displaystyle \frac{1}{2}}, S_{C_1}^{Q^{\prime }}=-S_{C_2}^{Q^{\prime }}=-{\displaystyle \frac{1}{2}}.$$

(29)

Further, from Figure 3, the impact of the finite tracking signal errors on the OC and ω_osc can then be obtained as:

$${\alpha }_{A1}{g}_{mA1}={\alpha }_{B2}{g}_{mC2},$$

(30)

and

$${\omega }_{osc}=\sqrt{{\displaystyle \frac{{\alpha }_{A1}{\alpha }_{B1}{g}_{mA1}{g}_{mB1}}{C_1{C}_2}}}.$$

(31)

From Equation (31), we find that the active and passive sensitivities of the ω′_osc for the proposed dual-mode QO circuit depicted in Figure 3 are identical to those expressed in Equation (27).

6. Parasitic Impedance Effect Analysis

The next nonlinear consideration is the effects of the VDGA parasitic impedances on the circuit performance. Figure 4 shows the practical behavior model of the VDGA, including corresponding terminal parasitics [30]. The real VDGA possesses high-impedance parallel parasitic elements (R_p//C_p), (R_n//C_n), (R_z+//C_z+), (R_z−//C_z−), and (R_x//C_x) at the respective ports p, n, z+, z−, and x, together with a small serial parasitic resistance R_w at port w. Taking these parasitics into account, the nonideal values of ω_p and Q for the proposed mixed-mode universal biquad filter depicted in Figure 2 are modified as follows:

$${\omega }_p=\sqrt{\left({\displaystyle \frac{g_{mA1}{g}_{mB1}}{C_1^{\prime }{C}_2^{\prime }}}\right)\left(1+{\displaystyle \frac{g_{mB2}}{g_{mA1}{g}_{mC1}{R}_1^{\prime }}}\right)},$$

(32)

and

$$Q={\displaystyle \frac{g_{mC1}}{\left[g_{mB2}+\left(\frac{g_{mC1}{C}_2^{\prime }}{g_{mB1}{R}_1^{\prime }{C}_1^{\prime }}\right)\right]}}\sqrt{\left({\displaystyle \frac{g_{mA1}{C}_2^{\prime }}{g_{mB1}{C}_1^{\prime }}}\right)\left(1+{\displaystyle \frac{g_{mB2}}{g_{mA1}{g}_{mC1}{R}_1^{\prime }}}\right)}.$$

(33)

where R′₁ = (R_p1//R_x1), C′₁ = C₁ + C_p1 + C_x1, and C′₂ = C₂ + C_z2+ + C_x2. Since it is known that R′₁ >> 1, the values of the external capacitors C₁ and C₂ should be designated as Equation (34) to avoid the parasitic effects shown in Figure 4.

C₁ >> C_p1 + C_x1      and      C₂ >> C_z2+ + C_x2,

(34)

Likewise, if the proposed dual-mode QO circuit in Figure 3 is evaluated in the presence of parasitics, the nonideal OC and ω_osc may be derived as follows:

$$g_{mA1}=g_{mC2}\left[1-\left({\displaystyle \frac{g_{mC1}}{g_{mB1}{g}_{mB2}}}\right)\left({\displaystyle \frac{C_2^{\prime }}{R_1^{\prime }{C}_1^{\prime }}}\right)\right],$$

(35)

and

$${\omega }_{osc}=\sqrt{\left({\displaystyle \frac{g_{mA1}{g}_{mB1}}{C_1^{\prime }{C}_2^{\prime }}}\right)\left[1+\left({\displaystyle \frac{g_{mB2}}{g_{mC1}{R}_1^{\prime }}}\right)\left({\displaystyle \frac{1}{g_{mC2}}}-{\displaystyle \frac{1}{g_{mA1}}}\right)\right]}.$$

(36)

7. Simulation Verification

The practicality of the proposed circuits in Figure 2 and Figure 3 has been evaluated by PSPICE simulation using CMOS VDGA, shown in Figure 1b [30], whereas 0.18 μm CMOS technology from TSMC was employed. In the simulation, the aspect ratios W/L (in μm/μm) of different CMOS transistors are as follows: M_1k − M_2k = 24/0.18, M_3k − M_4k = 30/0.18, M_5k − M_7k = 5/0.18, and M_8k − M_9k = 6/0.18. They were supplied with DC voltages of ±0.9 V. The CMOS VDGA circuit in Figure 1b gives the relationship between the transconductance gain g_mk and the corresponding bias current I_Bk, which can be written as [29]:

$$g_{mk}=\left({\displaystyle \frac{g_{1k}{g}_{2k}}{g_{1k}+g_{2k}}}\right)+\left({\displaystyle \frac{g_{3k}{g}_{4k}}{g_{3k}+g_{4k}}}\right),$$

(37)

where:

$$g_{jk}={\left({\displaystyle \frac{\mu C_{ox}{W}_j{I}_{Bk}}{L_j}}\right)}^{{\displaystyle \frac{1}{2}}}, \mathrm{f}\mathrm{o}\mathrm{r} j=1,2,3, \mathrm{a}\mathrm{n}\mathrm{d} 4,$$

(38)

and μ is the carrier mobility, C_ox is the gate-oxide capacitance per unit area, and W_j/L_j is the aspect ratio of transistor M_jk, respectively.

7.1. Simulation Results of the Proposed Mixed-Mode Universal Biquad Filter in Figure 2

The proposed resistorless mixed-mode universal biquad filter in Figure 2 was designed for the following frequency specifications: f_p = 1.59 MHz and Q = 1. The specified filter parameters yield component values of g_mAi = g_mBi = g_mCi = 1 mA/V (i = 1, 2) and C₁ = C₂ = 100 pF.

Figure 5 and Figure 6, respectively, illustrate the simulation results of the time-domain and frequency-domain responses in VM and CM. A sinusoidal input signal with a peak amplitude of 40 mV at 1.59 MHz was applied to the proposed filter during time-domain response study. Similarly, Figure 7 and Figure 8 present the simulated frequency characteristics for the TIM and TAM filters, respectively. There is significant agreement between the theory and simulation values. Additionally, the total power consumption of the circuit was determined to be 2.84 mW.

To demonstrate the electronic tunability of the proposed universal filter illustrated in Figure 2, the frequency responses of the VM BP filter for various pole frequencies f_p are plotted in Figure 9. To achieve this, the frequency f_p was adjusted for three different values, i.e., f_p = 0.62 MHz, 1.01 MHz, and 1.59 MHz, by changing the g_mki value to 0.39 mA/V, 0.63 mA/V, and 1 mA/V, respectively. The findings indicated that the simulated f_p values were 0.616 MHz, 1.07 MHz, and 1.585 MHz, which correspond to the percentage absolute errors of 0.64%, 5.90%, and 0.31%, respectively. Figure 10 depicts the simulated frequency responses of the VM BP filter for various Q-values.

Table 3. Active component values of the proposed VM BP filter for tuning Q values at f_p = 1.59 MHz (g_mA1 = g_mA2 = g_mB2 = g_mC2 = 1 mA/V).

gmB1 (mA/V)	gmC1 (mA/V)	Q
1	0.59	0.6
1	1.00	1
0.22	0.89	4
0.17	1.73	10

tabulates the values of the active component corresponding to different Q-values based on the designs. The proposed circuit facilitates independent electronic adjustment of the f_p and Q values, as seen in Figure 9 and Figure 10.

Additionally, the sensitivity performance was examined for 100 runs using Monte Carlo statistical analysis, which considers both transconductances (g_mki) and capacitance values (C₁ and C₂) with a 5% variation. Figure 11 shows the generated family histograms of f_p. The mean and standard deviation were 1.63 MHz and 53.74 kHz, respectively, demonstrating that the scheme possesses sufficient sensitivity.

Furthermore, to demonstrate the robustness of the proposed universal filter in Figure 2, the pole frequency f_p is analyzed at different process corner, voltage, and temperature (PVT) variations. Figure 12 presents the simulation results for the f_p of the VM BP filter response under PVT variations. The process corners were selected for the parameters nominal–nominal (NN), slow–slow (SS), fast–fast (FF), slow–fast (SF), and fast–slow (FS). We observe that the f_p increases as the supply voltage increases. As the temperature increases, the operating transistor current decreases, leading to a decrease in f_p. As a result, power dissipation diminishes up to a specific temperature. In both cases, the f_p of the proposed universal filter was varied by variations in temperature and voltage, as it is contingent upon the device current of the transistor.

7.2. Simulation Results of the Proposed Dual-Mode Quadrature Oscillator in Figure 3

The VM quadrature sinusoidal output waveforms of the proposed resistorless dual-mode QO circuit in Figure 3, with g_mki = 1 mA/V and C₁ = C₂ = 100 pF, are shown in Figure 13. The circuit was designed to oscillate at a frequency of f_osc = 1.59 MHz. The simulated frequency of oscillation was recorded at 1.58 MHz, exhibiting a phase difference of 92.85° between the quadrature outputs. Figure 14 displays the corresponding Lissajous plot (x-y mode) between v_osc1 and v_osc2. The total harmonic distortion analysis of v_osc1 is also derived, yielding a value of approximately 1.89%. An additional pertinent concern is the phase noise performance of the oscillator. As the next step, the phase noise of both outputs, v_osc1 and v_osc2, is determined, and the obtained results are plotted in Figure 15.

Table 4. Phase noise performance of the proposed QO circuit evaluated at various frequencies.

Frequency (Hz)	Phase Noise (dBc/Hz)
	vosc1	vosc2
1k	−35.50	−34.80
10k	−55.80	−55.80
100k	−79.10	−78.90
1M	−101.20	−99.80
10M	−123.40	−119.50

provides the phase noise performance data evaluated at various relative frequencies.

Furthermore, Figure 16 illustrates the simulated quadrature output waveforms of i_osc1 and i_osc2 in Figure 3. Note that the waveform appears visibly mismatched in both amplitude and symmetry. These asymmetries could indeed stem from the differences in the VDGA implementation shown in Figure 3 and the biasing between the two signal paths. To address this issue, the layout-level symmetry or tuning mechanisms should consider and potentially incorporate phase and amplitude error metrics. The electronic tunability of both calculated and simulated f_osc is plotted in Figure 17, with changing g_mB1 value while keeping g_mA1 constant at 1 mA/V. According to Figure 17, the useful f_osc ranges from roughly 750 kHz to 1.87 MHz.

8. Experimental Verification

The proposed circuits in Figure 2 and Figure 3 were experimentally confirmed to support the theoretical hypotheses. As conceptually illustrated in Figure 18, the VDGA was performed using practical measurements with commonly utilized IC-type LM13600 dual operational transconductance amplifiers (OTAs) from National Semiconductor company, USA [31]. The power supply voltages were employed as ±5 V.

8.1. Experimental Results of the Proposed Mixed-Mode Universal Biquad Filter in Figure 2

The active and passive component values of Figure 2 were designated as g_mki = 0.8 mA/V (for I_Bki = 42 μA) and C₁ = C₂ = 2 nF, corresponding to the theoretical values of f_p = 63.66 kHz and Q = 1. Figure 19, Figure 20 and Figure 21 show the measured time-domain responses and their corresponding frequency spectrums for the LP, BP, and HP filters in VM. The signal input voltage (v_in) for time-response measurements was set to 50 mV (peak) at a frequency of 63.66 kHz. The recorded f_p in the measured LP and BP voltage response of Figure 19 and Figure 20 was 63.80 kHz, which is a −0.22% deviation from the ideal value. In the HP voltage response of Figure 21, the measured f_p is 63.10 kHz, reflecting a deviation of +0.88% from the predicted value. Figure 22 represents the experimental frequency responses for the LP, BP, and HP voltage responses of Figure 2. The results indeed show that the measured BP and HP responses at low frequencies reach only about −10 dB in their stopbands, which is unusually low and not characteristic of ideal filter behavior. This indicates a significant parasitic effect: a fraction of the LP response term contaminates the BP and HP numerators. Such contamination mainly could occur due to parasitic capacitances within the integrated circuit layout and incomplete pole-zero cancellation in the signal path caused by mismatches. This contamination leads to a partial addition of the low-frequency gain from the LP function into the BP and HP outputs, which should ideally have attenuated these components significantly more deeply—on the order of −40 dB or lower. As also noted in [31], the gain-bandwidth product (GBP) of the IC LM13600 used in experiments is around 2 MHz. As a result, the discrepancies in gain for the measured high-frequency HP and BP responses arise mainly from GBP effects of the IC LM13600 OTAs. Nevertheless, the use of high-speed IC devices extends the useful frequency of the proposed circuit.

8.2. Experimental Results of the Proposed Dual-Mode Quadrature Oscillator in Figure 3

The VDGA-based resistorless dual-mode QO circuit in Figure 3 was designed to achieve an oscillation frequency of f_osc = 63.66 kHz. As per Equation (21), the designed component values for C₁ = C₂ = 2 nF yielded g_mki = 0.8 mA/V. Figure 23 shows the measured transient waveforms for the quadrature voltage outputs v_osc1 and v_osc2. It is observed that the quadrature oscillation outputs exhibit a 92.8° phase difference. The Lissajous figure of the two output voltages is shown in Figure 24 to determine the correlation between the quadrature outputs. Figure 25 further illustrates the corresponding spectrum frequency of v_osc1, revealing that the practical f_osc was around 63 kHz, with a percentage error of 1.04% and a gain of −33.20 dBV.

9. Comparison with the Prior Similar Circuits

This study introduces a simple structure for a biquadratic filter and quadrature oscillator circuit, designed without resistors and using only two grounded capacitors. The proposed filter circuit can operate in four modes: VM, TAM, CM, and TIM, with its important parameters electronically adjustable via the transconductance gain (g_m). Meanwhile, the proposed oscillator circuit can generate two modes of sinusoidal signals: VM and CM.

Based on the comparison in Table 1, it is evident that most of the articles present either a filter or an oscillator circuit. In contrast, the works of [3,8,13,14,19,20,24,25] are capable of filtering the signal and generating a sine wave. While some oscillator circuits in [8,13,19,24] can produce both VM and CM signals, it is noted that, in [8,19], the filter circuit operates in only one mode. Only the filters in [13,24] can function in two modes, VM and CM. Despite the lack of a resistor in [24], the circuit of [13] requires both grounded and floating resistors in [13]. In addition, both articles use computer simulation to verify circuit operations. Neither article conducts experimental circuit testing.

Consequently, the design proposed in this study provides significant features and practical advantages in terms of flexibility, space saving, and ease of integration with commercial ICs.

10. Conclusions

This study proposes a VDGA-based electrically tunable resistorless mixed-mode universal filter, utilizing only two grounded capacitors and eliminating the requirement for external passive resistors. The proposed filter circuit is capable of implementing all general biquadratic filter functions across the four operational modes: VM, TAM, CM, and TIM. The pole frequency and quality factor of the implemented filter can be altered electronically and independently by changing the transconductance gains of the VDGA. The suggested filter circuit can be modified to operate as a dual-mode quadrature oscillator, producing both voltage and current output from a single configuration. An examination of the nonideal circuit performance has been conducted. The practical feasibility of the circuit has been validated using PSPICE computational results and experimental tests.