We performed an analysis of the potential impact of the HVPE process on III-V deposition costs, using NREL’s established bottom-up methodology [8
]. For this analysis, we assumed that the NREL two-chamber HVPE reactor was scaled up to a high-volume, continuous reactor, with one zone for heating the substrate and one deposition zone per layer, as illustrated schematically in Methods Figure A1
in Appendix A
. The deposition zones were isolated, using buffer sections incorporating inert gas curtains. As no such high volume HVPE reactor exists today, we created a basic model of the system to estimate throughput and cost per tool; this model was reviewed by members of the industry and their feedback was incorporated for accuracy. Details of the model appear in Appendix A
and in Reference [12
Cost of the HVPE-Grown III-V Photovoltaic Devices
We focused more specifically on the use of HVPE to produce low-cost, high-efficiency, III-V solar cells, and their potential competitiveness in different markets. If commercialized, D-HVPE could immediately provide value to PV markets that require high efficiency, high specific power, or flexible form factors (including consumer electronics, UAVs, the military, space markets, and automotive roofs [13
]), by reducing the cost of epitaxy, while providing a performance similar to what is available today. The overall benefit depends on the cell type, production volume, and processes used for other aspects of the cell fabrication (e.g., metallization and choice of substrate), for a given manufacturer.
As discussed above, III-V solar cells at one-sun have not previously penetrated the mainstream PV power markets, due to their prohibitively high cost. In this section, we assess the potential for D-HVPE and substrate reuse to enable III-V technology, to compete in some of these markets, by modeling high volume costs for the III-V solar cells fabricated using these processes. We explore their potential balance-of-system (BOS) (e.g., racking materials and installation costs) and levelized the cost of energy (LCOE) (e.g., cost to produce a kWh of electricity) advantages over the incumbent Si flat-plate technology.
Our cell-cost models indicate that, at scale and with significant reductions in substrate cost, dual junction InGaP/GaAs cells deposited via HVPE could potentially reach costs below $
0.50/W, even with US manufacturing. This could allow these solar cells to be competitive in some broader PV markets that would benefit from the high-power density, low operating temperature and temperature coefficient, and the lightweight, flexible form factor, provided by III-V materials. Applications could include, for example, PV tile roofs, PV on electric vehicles (EVs), and certain residential and commercial rooftop installations that are weight- or area-constrained. In fact, at <$
0.50/W, III-V solar cells may even be competitive when dropped into the traditional PV module and system designs due to the ability of efficiency to reduce BOS costs in certain markets. In the remainder of this section, we explore the case of residential rooftop systems, which have higher BOS costs and areal constraints than the typical ground-mount, utility-scale installations, and thus, stand to benefit more significantly from the increased efficiency associated with III-V devices. We compared the total installed system cost and LCOE for the incumbent monocrystalline Si PERC [14
] technology, to that of the HVPE-deposited III-V cells with a substrate reuse. PERC cells were chosen for comparison because they are rapidly gaining traction and are anticipated to become market-dominant over the next few years [15
]. We used the modeled cell and module prices for both technologies that include the overhead costs and a sustainable product margin, rather than using current Si PERC cell prices, for the Si case, in order to obtain a technology-based comparison. The details and assumptions of this model appear in the methods section and Table A1
of Appendix A
. The results are shown in Figure 3
. While the III-V single junction cell costs are higher than that for the PERC cells, the increased efficiency of the III-V single junction cells, compared to Si results in the balance-of-module (BOM) (e.g., glass, encapsulant, busbars) and BOS cost savings, resulting in a comparable, total installed system costs. The savings was higher for the dual junction cells due to their higher efficiency, resulting in total installed system costs that could be comparable to those of the current PERC technology. At comparable installed system costs, III-V cells should provide a lower LCOE than Si, due to the higher energy yield resulting from their lower operating temperature and temperature coefficient. In prior field measurements, single-junction GaAs cells exhibited 8% higher energy yield than the Si cells in Phoenix, AZ in an open-rack configuration, though this varies with location [3
]. Any increases in the energy production translate to decreases in LCOE; thus, III-Vs could have an 8% lower LCOE, compared to the monocrystalline Si in Phoenix. The relative installed cost of the PERC cells compared to the HVPE-deposited III-Vs is similar for commercial rooftop systems, so similar LCOE reductions would also occur in these markets. Finally, the energy yield improvement and, thus, the LCOE benefit would be even greater in applications like solar shingles, where cells are direct-mounted onto the roof because of the lack of a suitable heat sink, for the cells.
The ability to reach costs on the order of $
0.50/W, depends critically on the cost of the substrate. These cost models assume that the cost of the substrate could be reduced, significantly, in the long-term to a value of ~$
1.00 per 6′′ wafer, in this case, via a large number (approximately 100, depending on the future GaAs substrate price) of substrate reuses and avoidance of a chemical-mechanical polishing (CMP) cost. The ability to reuse the substrate with limited or no CMP, through the use of a series of buffer layers has been demonstrated in the literature, but this has not yet been demonstrated at scale or with hundreds of wafer reuses [16
], and this may be challenging to achieve with a high-yield. However, active research is taking place on substrate reuse, including chemical lift-off and mechanical fracture technologies, and lower cost substrates. To reach cell costs on the order of $
1/W to $
5/W, which may be acceptable in some markets (e.g., PV on EVs, other portable power applications), less aggressive substrate cost targets would be sufficient. While there are III-V solar cell companies that currently implement the epitaxial lift-off [18
] and reuse the substrate, it is unclear how many times the substrate is being reused. Additional research and development is required to demonstrate a hundred reuses, at scale with a high-yield and significantly reduced polishing and reclaim costs. The lift-off process itself must also be scaled-up; current production volumes for III-V cells are low. Alternatively, cost reductions could be achieved via the use of a low-cost substrate (e.g., a virtual substrate or template, direct-growth on a low-cost substrate), as long as similar efficiencies can be obtained, or a combination of the two (lower cost substrate that is reused a lower number of times).
The cost model presented here does assume the immediate implementation of the technology presented in this paper. In addition to the time to commercialize and scale-up the D-HVPE process, the substrate advances will require time and investments in research and development. However, because the results in Figure 3
are based on the 2017 module and system cost structures, and include modeled 2017 Si PERC cell costs, these comparisons essentially assume these III-V cell costs were achieved overnight. While this serves to illustrate the benefits of a higher III-V cell efficiency at the module and system level and provides a useful benchmark for understanding whether or not III-V cells might be applicable to general power markets, some additional discussion of the future is warranted. Further BOM and BOS cost reductions are anticipated in the future [19
]. These reductions would benefit both Si and III-Vs, but the marginal value of higher efficiencies, and thus, the advantage of the III-V cells over Si, would be somewhat reduced. Additionally, the efficiencies of Si systems are also anticipated to rise, although they are beginning to hit the practical limits [20
], and Si module costs are expected to decrease, but will similarly asymptote, eventually, as the technology is already quite mature. We were not able to make quantitative comparisons of the installed system costs in these future scenarios due to the lack of PV cost-projections and general uncertainty around the future system cost structures. Finally, Figure 3
includes only the costs associated with single and dual junction III-V cells; HVPE could potentially allow for the addition of even more junctions at a low cost when scaled, increasing efficiencies further and enabling additional BOM and BOS cost savings that are out of reach for Si.