A Simple Method to Build High Power PCSEL Array with Isolation Pattern Design

Abstract

Photonic crystal surface-emitting lasers (PCSELs) hold promising properties of both edge emitting lasers (EELs) and vertical-cavity surface-emitting lasers (VCSELs). They possess high output power while radiating light vertically, being thought of as the next generation laser source. One of the main advantages of PCSELs is their scalability of size and power, which makes them applicable to high power applications or long-distance detection. However, due to problems such as current injection and mode competition, there are limits on their dimensions. To further increase the power, the capability of two-dimensional array integration paves the way. In this work, we demonstrate a new method to fabricate PCSEL arrays by defining an isolation pattern. We also investigate the influence of aperture size and array arrangement on lasing performance.

1. Introduction

The applications of three-dimensional sensing and light detection and ranging (LiDAR) technologies in autonomous vehicles and mobile devices are growing fast these years. To meet the needs, high power and compact laser systems are urgently needed [1,2]. Recently, photonic crystal surface-emitting lasers (PCSELs) have emerged as the most promising laser sources because of their unique properties. PCSELs are a new class of semiconductor lasers that incorporate a two-dimensional photonic crystal layer into the structure. Forming standing waves with zero group velocity at band edges in a photonic band, PCSELs oscillate in a horizontal direction and radiate power in a vertical direction [3,4,5,6,7,8]. Surface emitting means a low cost of testing and packaging, and in-plane oscillation means a high power due to a larger active region and external efficiency. They offer high power single mode emission beams with a narrow divergence angle, and enable on-chip beam steering [9,10,11,12,13,14,15]. It is believed that lens-free and adjustment-free LiDAR systems can be realized in the future [16].

Many efforts have been made to increase the output power of PCSELs. They include buried air hole photonic crystal structures, introducing DBR into a PCSEL structure, filling factor optimization, and nonsymmetric photonic crystal design [17,18,19,20,21,22]. As well as these, PCSELs are especially suitable for power scaling [23,24] because of the in-plane oscillation behavior and the absence of catastrophic damage. As one scales up the device in size, the power also scales up in proportional to its area. The main challenges encountered when scaling devices are the current injection and mode competition [25,26]. When the device size grows too large, the carrier cannot be injected uniformly into the active layer inside the aperture. On the other hand, a larger size means smaller in-plane loss, which also shrinks the gain margin and causes multi-mode operation. To ameliorate these problems, a p-side down structure and double-lattice photonic crystal structure were introduced [27,28,29]. With these efforts, a 10-W peak power has been realized at room temperature on a single emitter until now. In a recent publication, Noda et al. theoretically derived the conditions of a photonic crystal to maintain single mode operation as the device size increases above 3 mm [30]. However, other issues needed consideration in practice, such as nonuniform current distribution, self-heating, and stitching error from e-beam writing, which have not been addressed, and they may put some upper limit on device scaling. To further improve the output power, scaling with an array provides a new route.

An output power larger than 100 W has already been demonstrated with a VCSEL array and received applications in many fields [31]. However, the VCSEL array suffers problems such as a larger divergence angle and donut-shape beam. Unlike VCSELs, which oscillate and radiate in the same direction, PCSELs in an array can easily couple with others with an appropriate connection design. When the array oscillates coherently, it can be viewed as an ultra-large single device. It can possess an output power greater than 100 W and a divergence angle even smaller than the prevailing VCSELs while retaining high beam quality. The future of PCSEL arrays is promising. However, only a few researches have focused on it. In previous researches, the group of Hogg connected PCSELs through bridge waveguides. With current injection into the waveguides, a coherent PCSEL array was realized successfully, and the coherence was demonstrated with the interference of a far-field pattern [32,33]. As an alternative method, we propose here a simple way to build PCSEL arrays. By defining an isolation pattern on our epitaxy structure, we can control the injection region and split them into individual PCSELs with no current injection in-between. PCSEL arrays formed in this way were demonstrated, and we also investigated the influence of aperture size and arrangement.

2. Methods

The structure of our PCSEL is depicted in Figure 1a, which consists of cladding layers, active region, a photonic crystal (PC) layer, and a p-cladding layer on the top. We designed the lasing wavelength at around 940 nm by optimizing the lattice constant of the PC and geometries of the unit cell. The isosceles right triangular-shaped air hole as shown at Figure 1b was applied as the unit cell of photonic crystal for higher out coupled efficiency. We further deposited SiN_x and indium tin oxide (ITO) layers, followed by fabricating metal electrodes, where the SiN_x layer served as passivation layer to define the aperture of PCSELs. The region under passivation was estimated to have nearly zero injection and split those apertures into individual PCSELs. The highly conductive and transparent ITO laying on the top of it assisted current distribution evenly through the emission aperture defined by the SiN_x. Finally, metal was deposited above ITO with the same pattern as SiN_x. The laser emission direction was designed from the top surface due to its ease of fabrication. We demonstrated such a PCSEL device, and the process of output power optimization has been detailed in our previous reports [21,22].

To investigate the influence of aperture size and array arrangement, we designed four patterns with different aperture sizes and arrangements. The optical microscope (OM) images of the four designed patterns are shown in Figure 2. The four arrays had the same size of 1 mm. The aperture sizes we used were 60 μm and 100 μm in diameter. The current injection uniformity of p-side up PCSELs with these aperture sizes was demonstrated to be good enough. The interval of two adjacent apertures was fixed at 40 μm. PCSELs with each aperture size were arranged in square and triangular forms, respectively. Arrays with aperture size 100 μm had about 50 PCSEL emitters in total, while 100 PCSEL emitters for aperture size 60 μm. For convenience, the four fabricated samples were named as S100, T100, S60, T60, where T and S mean triangular and square arrangements, and the later numbers indicate aperture diameters.

3. Results and Discussion

Figure 3a,b represent the light–current-voltage (L-I-V) characteristics. The measurements were conducted at room temperature, with 1 μs pulse duration and 1 kHz repetition rate. The turn-on voltages were about the same for all the arrays; however, obvious differences in serial resistance were observed. The arrays with larger aperture size had higher serial resistance, this magnitude was closely related to the current spreading uniformity in structure. The thermal rollover phenomenon did not appear in the four samples until a 6A injection current, and the pumping current was limited by the diode driver. The threshold current density and slope efficiency of the four samples extracted from Figure 3a,b are shown in Figure 3c. The threshold current density was calculated by dividing the current by the total area of the aperture. The four samples sort by threshold current were T100 < S100 < T60 < S60. We can deduce from the measured results that arrays with a larger aperture size and triangular arrangement have smaller thresholds. The order of the slope efficiency of the four samples was T100 > S100 >T60 > S60. Again, arrays with a larger aperture size and triangular arrangement have better performance. Figure 3d shows the power conversion efficiency (PCE) of the four samples. They reach maximum PCE 2~3.5% at a current injection of about 5A. The relatively low PCE is due to the high internal loss and ohmic loss from the unoptimized design and fabrication process. Methods such as grading the hetero-interface to improve its electrical property, properly designing the doping profile to reduce free carrier absorption, optimizing the barrier or electron-blocking layer to reduce the current carrier leakage, optimizing the unit cell pattern to properly balance the threshold and slope efficiency, or adding DBR layers to reflect the downward propagating light upward can be used to improve the PCE of PCSELs. Array T100 had the highest PCE because of its obviously larger power, while array S100 had the lowest PCE because it had the largest serial resistance. Figure 4a shows the near field pattern of array S100 measured above the threshold. We can observe uniform emissions for the array emitters. Almost all the PCSELs in the array show similar emission near field patterns. However, as shown in Figure 4b, multiple peaks in the spectrum were observed in the array S100. Similar results were obtained from other samples, they all possessed multiple peaks, which imply the low coherence of the array. The measured far-field patterns of the four arrays are shown in Figure 4c. They possess single-lobe distribution with no obvious interference pattern. These results imply low coherence again, in agreement with the measured spectra. The far-field angles (1/e²) of them were obtained and were around 4 degrees, and no obvious differences were observed in the different arrangements or aperture sizes.

From the point of view of coupling, the arrays with square arrangement are easier to couple in both an upper–lower and left–right direction, and are thought to have stronger in-plane feedback. Stronger in-plane feedback implies a lower threshold and higher slope efficiency. However, the experiment shows contrasting results. To understand the underlying mechanism of how aperture size and arrangement influence the electrical and optical properties, we performed numerical simulation to derive the current and carrier distribution in the active layer at a current slightly below the threshold. Figure 5 shows the simulation results of the normalized current density distribution in the active layer. The dashed circles in the figures are positions where current was injected according to the experiment situation. The current density drops rapidly outside the apertures; here we tune the range of color to focus on the current distribution inside the apertures. About 10~15% decay of the current density from the dashed circle to the center of the array is observed. To make the comparison quantitative, we first calculated the averaged current density of each aperture, then normalized them to their own maximum in an array. Finally, we defined the current distribution nonuniformity of an array as the RMS of these values. The calculated nonuniformities of the four samples were 10.1%, 12.3%, 6.1%, and 7.2%, respectively. PCSEL arrays with a smaller aperture size show much better current distribution. Moreover, the calculation results reveal that the uniformity is weakly dependent on the array arrangement. This result is consistent with the measured serial resistance. We suggest that the coverage of p-metal is the key factor. Metal coverage ratios in the unit cell of the four samples were 59.9%, 53.7%, 71.7%, and 67.3%, respectively, which gave a good prediction of the current injection uniformity.

Figure 6 shows the corresponding carrier density in the active layer along the two dashed lines in Figure 5. The carrier density of the areas below the SiN pattern is much smaller than 10¹⁸ cm⁻³, which is the approximate value of the transparency condition of the InGaAs quantum well; so outside the aperture there exists strong band-to-band absorption. This can explain why PCSELs in our samples did not couple with each other. By comparing the carrier distribution along two lines, we observe a lower carrier density in the interval where the aperture spacing is larger. Thus, the triangular arrangement, which has closer packing is thought to have a lower threshold and higher slope efficiency due to the smaller absorption loss. On the other hand, it is possible to fabricate coherent PCSEL arrays as long as the interval of the apertures is narrow enough. It is worth noting that close packing or a narrower metal path result in worse current spreading. To achieve coherent lasing while retaining uniform current spreading, SiN_x and metal patterns need further optimization and design. Similarly, PCSELs with a larger aperture size have smaller in-plane loss, resulting in a lower threshold and higher slope efficiency. These could well explain our experimental results. Further improvements include adding epitaxial mirrors below the n-cladding layer to boost the upward emission efficiency and fine-tuning the aperture size and spacing between apertures to balance requirements between current distribution, in-plane loss, out-coupling efficiency, and thermal accumulation.

4. Conclusions

In this report, we demonstrate PCSEL arrays that are simply formed with a silicon nitride isolation pattern. The aperture size and arrangement of the PCSEL array will directly affect the output power, with a larger aperture size and closer packing result and a smaller optical loss but with poor current spreading. Despite our PCSEL arrays not being coherent, they can still be used in three-dimensional sensing and ToF applications, which have low requirements of coherence. In future work, the emitters will be put closer together to improve the coherence in order to scale up the brightness; that is, we can reduce the width of SiN_x. To maintain good spreading of the current at the same time, we can just reduce the width of SiN_x while keeping the width of the metal the same or increasing the thickness of the metal. On the other hand, we can also reduce the metallization area while increasing the thickness of the p-cladding layer to compensate for the reduced contact area with the metal.