Influence of DC/DC Converter Control on Source Current Ripple of the Switched Reluctance Motor

Abstract

This paper presents a solution to reduce source current ripple in the electrical power supplying a switched reluctance motor (SRM) drive. Source current ripple negatively affects the power source by introducing a variable frequency component and increasing losses in the power source. Reducing the source current ripple is important, especially in battery electric vehicles (BEVs). The solution proposed in this paper for reducing source current ripple is to use a classic DC/DC boost converter connected in series with the SRM power supply system. The key to reducing source current ripple is the DC/DC converter control method proposed and described in this article. This method involves controlling the DC/DC converter synchronized with the speed of the SRM motor DC/DC. To verify the correct operation of the proposed solution, simulation and laboratory tests of an SRM drive were performed, the results of which are shown in this paper.

1. Introduction

Switched reluctance motors (SRMs) are electronically commutated machines characterised by the absence of permanent magnets and windings on the rotor. Thanks to this design, they are highly resistant to damage and can operate in harsh environments [1,2]. In addition, the topology of the power supply system allows an SRM to operate under the condition of partial fault [3]. In practise, SRMs find drive applications that include high-end kitchen robots, concrete drills, aircraft pump drives and more. Unfortunately, SRMs also have disadvantages that limit their wider use. Disadvantages include noisy operation, high torque ripple, and source current ripple [1,2,3,4]. Various design solutions [5] or control algorithms are used to reduce the level of noise generated [6]. Torque ripple is mitigated through appropriate design or, more commonly, through the use of control algorithms [7,8,9,10]. The last disadvantage is the high-ripple source current, which is caused by the demagnetisation process of the windings when the power supply is switched off. The high rms source current values resulting from the source current ripple adversely affect the power source, resulting in higher losses in the source and generating noise [10,11,12,13,14,15,16].

A high level of current ripple negatively affects battery lifespan, as peak current is significantly higher than the average current. This causes an increase in the RMS current. An increase in the battery’s RMS current causes a rise in its temperature. Unfortunately, an excessive increase in current significantly affects battery lifespan [12,13]. According to the study on Li-ion batteries [12], excessive current causes a rapid process of lithium-ion intercalation and deintercalation on the particle surface, which can lead to fatigue and damage to the active material structure. Excessive current can also result in poor uniformity of current distribution within the battery, causing localised lithium plating or inconsistent structural deformation.

To supply electric vehicle drives, DC/DC converters of various configurations are often used [17,18,19]. In work [17], a topology of selected boost converters (isolated and non-isolated) is presented, which may find applications in electric cars. A solution for a multilevel converter is introduced in work [18], where this type of solution is used to power a DC commutator machine. In many cases, this aims to increase the operating voltage of drive motors, thereby improving drive efficiency. For the reduction in current ripple in SRM machines, the level of U_DC voltage variation is relatively small.

Various ways of reducing the source current ripple in the SRM drive current input while reducing the filtering capacitance can be found in the literature [14,15,16,20,21].

A method of reducing the filtering capacitance is presented in [22], which involves separating the supply circuit from the filter circuit, so that the voltage on the filter capacitor is higher than the supply voltage. This reduces the capacitance of the filter capacitor, yet increases its operating voltage. Although this method reduces the capacitance of the filter capacitor, it requires converter circuit components with a higher-rated operating voltage, including the capacitor. A four-phase SRM split-voltage midpoint converter power system was used in [23]. In series with the system, a low-cost active filter was applied that improved the power factor (power factor correction—PFC) and reduced the level of the AC mains’ harmonics.

This system is only suitable for SRM drives with an even number of phases and supplies from AC mains. BEVs and hybrid vehicles use electrochemical batteries to power the traction drive units, which are DC-powered via converters. Reducing the source current ripple from the battery reduces battery losses, limits battery heating and thus contributes to extended battery life. Bidirectional converters were applied in [21] to power a synchronous reluctance motor drive (SyncRM) using a battery and supercapacitor. The purpose of the solution included: stabilising the DC-bus voltage; ensuring the proper use of the power flows between the battery and SC while respecting the SOC (state of charge) limits; preventing the SynRM motor from the harmonics that impact the energy storage systems’ lifetimes; reducing the battery current harmonics induced by the electric drive; and minimising the battery current ripples generated by both the SynRM and PWM inverter.

The objective of this paper is to present a method developed by the authors to minimise source current ripple. The suitability of this solution was assessed by performing simulations and laboratory tests. The method developed for the solution is applicable to a wide range of SRM drive operations.

2. Problem of Source Current Ripple

The classic power supply system for SRMs is a half-bridge system, the diagram for a 4-phase SRM is shown in Figure 1.

The waveforms of the phase currents (i_ph1, …, i_ph4) and the source input current (i_DC) with the current control for an SRM supplied with the circuit in Figure 1, are shown in Figure 2.

The pulsed power supply method for the SRM results in large source current ripples and, thus, ripples in the supply voltage. Large source current ripples increase the ratio of the rms current value to the average current value (I_DCrms/I_DCav). The high I_DCrms value causes increased losses in the power source and supply cables, which, in the case of high-powered SRMs, contributes to increased drive operating costs and, in SRMs applied in BEVs, a reduction in the actual driving range. The electrochemical batteries from which BEVs are powered still have the property that their internal resistance varies with temperature, the battery state of charge (SOC), and the battery state of health (SOH). A high source current ripple and, thus, high peak current values also adversely affect the battery life in BEVs. Calculating the average and rms values of the source current shown in the oscillogram (Figure 2) yielded 29 A and 42 A, respectively. The I_DCrms/I_DCav ratio is 1.45 in this case, meaning there is more than twice the level of loss in the supply circuit with a rippling current than with a constant current supply without ripples.

3. Reduction in Source Current Ripple by the Proposed Method

3.1. Schematic of an SRM Drive with a DC/DC Converter

Figure 3 shows a power supply schematic for an SRM, which uses an additional DC/DC converter to reduce the source current ripple. This is a classic boost converter system. An advantage of this type of converter is the small number of components. Additionally, this converter can conduct high currents, which is important for the tested drive, as the peak phase currents can reach up to 110 A. The converter converts the voltage on the SRM’s DC-link power supply (u_DC) in such a way that the source current has the lowest possible ripple. The solution reduces the source current ripple while reducing the filtering capacitance in the DC-link. This paper presents the results of the simulation and the laboratory tests of the properties of an SRM drive powered by a system with and without a DC/DC converter, while discussing the DC/DC converter control method as an original solution developed by the authors. A DC/DC converter open/close switch (S_{DC/DC_on/off}) was used to switch the operating mode of the SRM drive power system. Diode D₁₀ provided protection for the unidirectional power supply against the energy backfeed from the SRM system.

The test object was a drive with a four-phase SRM, the basic data of which is specified in

Table 1. Basic data of the SRM studied.

Switched Reluctance Motor
Phase number	4
Poles stator/rotor number	8/6
Rated voltage	48 V
Max. mechanical power	3.3 kW
Rated speed	4500 rpm
Stator pole width	20°
Rotor pole width	20.5°
Phase winding resistance	14 mΩ

.

The power supply system shown in Figure 3 was used for simulation and laboratory tests. When the S_{DC/DC_on/off} switch is closed, the SRM is powered by the classic H-type half-bridge system (Figure 1). When the S_{DC/DC_on/off} switch is open, the DC/DC boost converter is switched on in series in the supply path.

3.2. Description of the Proposed Control Method

Example waveforms of the band currents and synchronising pulses for two SRM power supply intervals (θ_dwell = 19° and θ_dwell = 15°) are shown in Figure 4. It can be seen from this figure that the minimum u_DC level in the DC-link is present when the power supply to the windings of the individual bands is de-energised, regardless of the power supply interval. The waveforms in Figure 4 show that when the power supply to the band winding is de-energised (θ_off), the u_DC voltage is approximately equal to the u_source. Taking advantage of this property, a new control method for the DC/DC converter was proposed to minimise the source current ripple, regardless of the operating point of the SRM drive. A schematic of the proposed control structure for the SRM drive with the DC/DC converter is shown in Figure 5.

Two feedback signals are used to achieve the correct operation of the DC/DC inverter. One is the synchronisation signal, or synchronising pulse, (u_sync) supplied when the power supply to the phase windings is de-energised (θ_off). At this time, u_DC is present on the SRM controller and latched until the next synchronising pulse is supplied. This u_DC sensing procedure protects the system from an uncontrolled increase in the DC voltage. The role of the PI regulator is to stabilise the source voltage at u_DC (θ_off). The output signal from the PI regulator is the DC/DC converter output current, i_DCref, from which the offset Δi_DC is calculated. The offset signal is supplied to a high-speed hysteresis current regulator, which in turn manages the DC/DC converter transistor. Figure 6 shows an example of a closed-loop speed control structure for the SRM drive.

Digital differential controllers were used in the phase current feedback loop (i_ph(1…k)). A PI regulator was used in the SRM speed feedback path. The block “θ_on calculate” determined the making angle θ_on. The making angle for a four-phase motor with an 8/6 configuration can be calculated from the signals of drive angular velocity ω, the phase reference current I_SRMref and the DC-link voltage u_DC using the following relationship:

$${\mathsf{\theta }}_{\mathrm{on}}={\displaystyle \frac{\mathsf{\pi }}{6}}-{\displaystyle \frac{{\mathsf{\beta }}_{\mathrm{s}}+{\mathsf{\beta }}_{\mathrm{r}}}{2}}-{\displaystyle \frac{L_{\mathrm{u}}{I}_{\mathrm{SRMref}}}{u_{\mathrm{DC}}}}\mathsf{\omega }$$

(1)

with: L_u—self-inductance of the motor phase winding in the unaligned position of the rotor; β_s and β_r—the stator and rotor poles width, respectively. The switch-off angle (θ_off) is the sum of the switch-on angle (θ_on) and the phase winding power supply interval (θ_dwell):

$${\mathsf{\theta }}_{\mathrm{off}}={\mathsf{\theta }}_{\mathrm{on}}+{\mathsf{\theta }}_{\mathrm{dwell}}$$

(2)

The phase reference current I_SRMref (Figure 6) is determined using a proportional-integral (PI) regulator on the basis of the angular velocity offset (Δω).

Figure 7 shows a schematic of the proposed control algorithm for the DC/DC converter. Upon power-up, the converter current is increased to charge the capacitors in the DC-link circuit so that the voltage U_DC equals the source voltage U_source. After starting the SRM, the rotor position angle (θ) is checked, and then, at the moment of the power-off of any phase, the value U_DC(θ_off) is stored. This value is compared with the voltage U_source, and depending on the sign of the error, the current reference i_DCref is either increased or decreased. This function is executed by the PI controller of the DC/DC converter, operating with a sampling time t_s = 50 μs. The current i_DCref is compared with the source current i_source and using an analogue hysteresis current controller (thus very fast), it switches the transistor T9 of the converter on or off. In our solution, the voltage (PI) and current (hysteresis) controllers operate in independent time regimes.

4. Study of SRM Drive

4.1. Simulation Results

Simulation tests were carried out in the Matlab/Simulink environment for the SRM, the data for which are shown in Table 1. The tests were carried out for the steady-state drive operation and in dynamic states. Figure 8 shows the waveforms of supply voltages (u_source, u_DC), phase currents (i_ph1, …, i_ph4), synchronising pulses (u_sync), supply currents (i_source, i_DC), and SRM electromagnetic torque (T_e) for the tested drive. The waveforms were generated for a speed of 1000 rpm, with an average SRM torque of T_eAV = 12.8 Nm, resulting in a forced reference current of I_SRMref = 80 A. The SRM power supply interval was set to θ_dwell = 20°. Note that a change in speed causes a change in the frequency of the current and voltage pulse rate of the DC-link, which is not a favourable phenomenon as it generates variable frequency interference. In the case shown in Figure 8, the ripple frequency of the voltage and current in the DC-link (f_iDC) is 400 Hz. By observing the source voltage and current waveforms (u_source, i_source), it is clear that the source current ripple was suppressed.

Figure 9 shows the waveforms of supply voltages (u_source, u_DC), phase currents (i_ph1, … i_ph4), supply currents (i_source, i_DC) and the speed simulation-generated for SRM start-up. The SRM speed varied from 0 to 1000 rpm, with a torque load of 2 Nm. Comparing the u_source and u_DC waveforms, very good suppression of source voltage ripple is seen. The u_DC voltage of the DC-link has a variable frequency, which is a function of the SRM speed. When the SRM reaches a steady state speed, there is a noticeable increase in this voltage, which is associated with a reduction in the SRM current draw. This is certainly a disadvantageous phenomenon and requires additional protections for the SRM system. A comparison between i_source and i_DC clearly reveals a reduction in the source current ripple. Some current ripple is noticeable at low SRM speeds of up to 200 rpm, and this is related to the long intervals between synchronising pulses.

4.2. Test Stand

To verify the proposed SRM drive control algorithm, a laboratory test stand was built, an overview of which is shown in Figure 10. The SRM was mechanically coupled to a DC machine that operated as a generator with controllable braking torque. A Yokogawa DL850 oscilloscope recorder (Tokyo, Japan) was used to record the waveforms, and a Yokogawa WT1800 power analyzer was used to measure the SRM drive and DC/DC converter parameters. The SRM converter and DC/DC converter were built as separate power modules. The DC/DC converter, SRM converter, and dynamometer were managed from a PC via a DS1103 interface card. An incremental encoder, also supported by the interface card, was used to sense the rotor position. Using the SRM drive’s simulation tests, the settings of the SRM speed and DC/DC converter voltage controllers were preset. The SRM control structure shown in Figure 6 was entirely implemented using the DS1103 interface card. An SRM drive speed control algorithm was implemented in the interface card, where the phase reference current (I_SRMref) was determined via a PI regulator. Similarly, the dSpace card calculated the reference current of the DC/DC converter (i_DCref). To determine the offset for the converter reference current i_DCref regulator, the DC-link voltage value u_DC was latched and snapped when the angle θ_off was reached. Due to the high dynamics of the current drawn by the SRM inverter, the dSpace card was not able to maintain a stable source current value. Therefore, a very fast analogue hysteresis current controller for the DC/DC converter was designed and built, to which the i_DCref calculated with the dSpace card was sent. This regulator was based on TL072 operational amplifiers, which implement follow-up modulation.

4.3. Laboratory Results

Laboratory tests of the SRM drive were performed on the laboratory test stand shown in Figure 10. The SRM drive was powered by an Agilent 60 V/110 A, stabilised power supply (Santa Clara, CA, USA). To evaluate the effectiveness of the solution proposed in this work, tests were performed without a DC/DC converter (S_{DC/DC_on/off} = on) and with the DC/DC converter (S_{DC/DC_on/off} = off). The tests were performed for the steady-state operation and for the dynamic states of the SRM drive. Figure 11 shows the waveforms of u_DC, i_source, i_DC, current, and i_ph1 recorded at 1000 rpm, the load torque of 7.5 Nm, and the power supply angle of 20°. With a classic SRM power supply (without the DC/DC converter), a very high source current ripple can be seen. Theoretically, in this case, the waveforms of i_source and i_DC should be identical, but according to the diagram shown in Figure 3, with the S_{DC/DC_on/off} switch made, the closed i_DC includes the current of capacitor C2, hence, the ripple of this current was higher. The large range of i_source variations (i.e., between 0 and 90 A) also resulted in source voltage variations (between 35 V and 40 V). The phase current was limited by the controller to 80 A. The I_{source_rms} value in this case was 50 A and the average I_{source_av} = 37.2 A.

When the S_{DC/DC_on/off} switch was open, the DC/DC converter, controlled according to the algorithm proposed in this paper, was activated. Figure 12 shows the u_sync rising edge synchronisation signal, and the u_source with i_source, i_DC, and i_ph1 currents. The waveforms were recorded for the same SRM drive operating point as when the S_{DC/DC_on/off} switch was closed. From the waveforms shown, it is clear that the source current and voltage ripples were virtually eliminated. The power source voltage ripple was also reduced. As a result of the DC/DC converter operation, there was an increase in the average and maximum DC link voltages (U_DCav = 40.1 V and U_DCmax = 41.6 V) with respect to the SRM drive system operation without the DC/DC converter. Reducing the source current ripple reduced the generation of the variable component of the power source voltage, the frequency of which varies with motor speed. In addition, the reduction in the rms source current value resulted in reduced losses in the power source. This is particularly important when the SRM drive is powered by a battery bank, whose internal resistance varies with SOC and temperature.

Figure 13 and Figure 14 show the waveforms of the selected SRM drive quantities recorded at a speed of 4000 rpm, θ_dwell = 19°, and a load torque T_L = 1 Nm. From the observed waveforms, a clear reduction in the ripple of the current and source voltage can be seen. This is due to the change in the operating point of the drive, where the source current ripple decreases because of greater internal inter-phase self-consumption of energy. Nevertheless, it can be observed that when the DC/DC converter is enabled, the current and voltage ripple of the power source are lower.

The efficiency of the DC/DC converter was calculated from measurements with the Yokogawa power analyser, based on the measurement of the power drawn from the source and the power fed back to the DC/DC converter. The efficiency of the DC/DC converter for this operating point was about 97%. The efficiency of the DC/DC converter as a function of rotor speed under a torque load of 5 and 8 Nm is shown in Figure 15.

4.4. Dynamic Operating States of the SRM Drive

To check the behaviour of the SRM drive system with the proposed solution in dynamic states, tests during the SRM start-up and the load torque variation over time were performed. The SRM start-up was conducted for the two cases of the SRM power supply without and with the DC/DC converter, with the power source voltage, U_source = 38.5 V. Oscillograms from the SRM start-up are shown in Figure 16 (S_{DC/DC_on/off} = on) and Figure 17 (S_{DC/DC_on/off} = off). Figure 16 shows the waveforms of the power source voltage and current, as well as the SRM phase current and speed. By observing the source voltage and current waveforms, significant source current ripples and source voltage ripples, as a result of the current flow, can be seen. For comparison, Figure 17 shows the same waveforms for the DC/DC converter online, controlled by the authors’ proposed method. In this figure, the source current and voltage ripples were significantly reduced. There are ripples noticeable only up to the SRM speeds of around 200 rpm.

Figure 18 and Figure 19 show the behaviour of recorded parameters during a step change in load torque: 0 Nm→5 Nm→0 Nm with the speed stabilised at n_ref = 200 rpm in the system without a DC/DC converter (Figure 18) and with a DC/DC converter (Figure 19). The recorded waveforms indicate that using the DC/DC converter controlled by the proposed control algorithm leads to a noticeable reduction in the ripple of the current and voltage of the power source.

Figure 20 and Figure 21 show the oscillograms recorded during a change in motor speed from 1000 rpm to 2000 rpm and back to 1000 rpm with a load torque of T_L = 1 Nm. Comparing the current and voltage waveforms of the power source when the drive operates without the DC/DC converter (Figure 20) and with the DC/DC converter (Figure 21), the effective operation of the DC/DC converter control algorithm can be observed.

5. Conclusions

This work presents a solution to reduce the source current ripple for a switchable reluctance motor (SRM) drive. Source current ripple adversely affects the power source by introducing variable frequency voltage ripples and increasing losses in the power source. The proposed solution consists of a classic DC/DC boost converter connected in series with the SRM power supply. The key to reducing source current ripple was the proposed method of controlling the DC/DC converter. Simulation and laboratory tests of the SRM drive were performed to assess the effectiveness of the proposed solution. From the SRM drive tests, it was found that:

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It is possible to effectively reduce the source current ripple over a wide speed range of the SRM by using a simple DC/DC boost converter integrated in series with the SRM power supply;

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The proposed method of source current ripple reduction has a lower efficiency in the low rotor speed range, which means up to about 200 rpm for the SRM tested, it is possible to significantly reduce the rms source current and, thus, the losses in the power source.

The proposed solution also has drawbacks, which include:

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Higher complexity and cost of the SRM control system,

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Slight deterioration in the efficiency of the SRM power supply system due to the use of a DC/DC converter.