Abstract
This paper presents a discrete-time output feedback controller to regulate the output voltage of a DC-DC buck converter. The proposal’s main feature is the application of a discrete-time equivalent of the robust exact filtering differentiator. First, the document exposes a theoretical analysis of the closed-loop system, where it is considered the problem of implementing a real-time differentiator with a good relationship between exactness and noise filtration performance. Hence, secondly, the controller in a laboratory setup is presented. The first experimental results suggest that the proposed controller exhibits good robustness against noise and maintains the asymptotic accuracy, even with saturated control inputs, as in the case of the DC-DC buck converter. Consequently, aiming to verify the features of the proposed method, the controller is validated through multiple experiments, showing satisfactory voltage tracking accuracy, good suppression of instantaneous load and supply voltage disturbances, and robustness against bounded measurement noise.
1. Introduction
Nowadays, DC-DC switching converters are present in most branches of engineering, and industry [1,2]. It is common to find applications of DC-DC switching converters in aerospace systems [3,4], automotive electronics [5,6,7], uninterruptible power supplies (UPS) [8,9] and especially in renewable energy systems, such as fuel cells [10,11], photovoltaic systems [12,13,14,15] and wind power [16,17] just to mention a few. The main characteristic of a DC-DC switching converter is the ability to ensure a constant output voltage for the entire operating range, even in the presence of variations in the supply voltage and non-constant power demand. Additionally, it is well known that these devices exhibit nonlinear phenomena, and most of them operate in adverse conditions due to commutation noise and other electromagnetic effects [18]. Therefore, the design of closed-loop feedback control strategies that ensure the correct operation of DC-DC switching converters is crucial.
The most common non-linearity in almost every physical system is the saturation of the control input. In the case of the DC-DC switching converters, this restriction is in the duty cycle that modulates the discontinuous activation signal of the switches [19,20].
Over the years, multiple authors have proposed discrete-time and continuous-time control strategies to deal with the nonlinear dynamics and disturbances that the operation of DC-DC switching converters exhibits. In [21], a comparison between a generalized proportional integral (GPI) controller and a proportional integral derivative (PID) controller implemented on a field-programmable gate array (FPGA) is presented. In [22], the authors present a fractional-order PID-type controller designed explicitly for DC-DC boost converter and implemented in discrete-time using a floating-point digital signal processor (DSP). In [23], a discrete global-sliding mode (SM) control of DC-DC switching converters is presented and experimentally validated using a DC-DC buck converter. In [24], a digital control based on fuzzy logic for the DC-DC buck converter with photovoltaic applications is presented and validated through experimentation with low-cost digital platforms. In [25], the authors propose finite-time output feedback control with a current sensorless mode for the DC-DC buck converter, which is validated through experimentation. The discrete-time controllers proposed in [21,22,23,24,25], show satisfactory results. However, a detailed analysis of the control signal restrictions caused by duty cycle saturation is not performed. Due to its complexity, it is common to neglect this phenomenon. However, it should be considered to ensure the stability of the closed-loop control system.
On the other hand, few papers analyze the saturation of the control input in DC-DC switching converters and its effect on the system’s stability. For example, in [26] a Lyapunov-based proportional-integrative (PI) controller with modulator for the DC-DC buck converter with saturated input is presented and experimentally validated. In [27], the authors propose a regional pole placement controller that considers the saturation of the duty cycle for the DC-DC buck converter. In [28], a regulator based on the closed-loop frequency response of the DC-DC buck converter is presented. The controller is designed by considering the effects of system saturation and validated through numerical simulations. In [29], the author presents a class of proportional-integral with anti-windup (PIAW) controllers for the DC-DC buck converter. The controller considers the limitations of the control input together with detailed stability analysis and is validated through experimentation. In [30], a nonlinear PID regulator to avoid the windup effect with a saturation function for the control signal is presented and validated by simulation. The control strategies mentioned in [26,27,28,29,30] show a satisfactory regulation of the switched DC-DC converters dynamics and analyze the effects of the saturation on the stability of the system.
Nevertheless, most are based on continuous-time controllers and do not explore the effects on stability when the algorithm is implemented on discrete-time platforms. Likewise, the adverse effects that measurement noise has on the control loop are not directly addressed, especially in controllers with derivative actions. As previously mentioned, noise in DC-DC switching converters is a common situation and should be treated with special attention.
One option to estimate those states for systems with noisy output and unavailable states is a differentiator. Specifically, the homogeneous differentiator shows remarkable properties, which have been implemented in different areas [31,32]. They are finite-time convergence, accuracy, and robustness to noise [33,34]. These properties are obtained if the n-th derivative of the free-noise signal has a known Lipschitz constant [33] and bounded noise. Despite the asymptotic accuracy of the well-known robust exact differentiator [33], this accuracy was improved by the robust exact filtering differentiator [34]. On the other hand, the robust exact filtering differentiator used to be implemented in digital systems, but it is a continuous-time observer. For this reason, some discrete-time realization [34,35,36], which preserves the continuous-time properties of the differentiator. One strategy to obtain a discrete-time realization is the implicit discretization [37]. Implicit realizations supersede the explicit discrete-time differentiators based on homogeneous differentiators [35,38,39].
This paper proposes and experimentally validates an output feedback discrete-time controller based on the implicit discretization of the robust exact filtering differentiator. The main advantage of this controller lies in the estimation accuracy of the system states in the presence of measurement noise and its finite-time convergence. The contributions of this paper are as follows:
- The presentation of a discrete-time output feedback controller based on the robust exact filtering differentiator for the DC-DC buck converter with saturated input.
- The introduction of a rigorous stability analysis of the discrete-time controller considering the asymmetric saturation of the system.
- An extensive experimental analysis that includes various operating conditions and disturbance scenarios to validate the performance of the controller.
The difference of this paper with respect to previous research is that the proposed discrete-time controller has the properties of finite-time convergence, accuracy, and robustness to noise of the homogeneous differentiator. It demonstrates that this controller allows the states convergence even with instantaneous reference voltage changes, load disturbances and supply voltage variations. Likewise, for the first time, the closed-loop stability of the the implicit realization of the robust exact filtering differentiator and DC-DC buck converter is analyzed considering the saturation of the duty cycle. It is important to remark that the discrete-time implementation of homogeneous differentiators is a relatively new research topic. However, there are not enough experimental results in the literature about its use in a closed-loop controller.
This paper is organized as follows. In Section 2, the robust exact filtering differentiator and its implicit discretization for discrete-time implementations are presented. In Section 3, the topology of the DC-DC buck converter is analyzed, and its mathematical model based on the classical averaged technique is presented. In Section 4, the proposed control strategy based on the robust exact filtering differentiator is presented, as well as its closed-loop stability analysis considering the saturation of the control signal of the DC-DC buck converter. In Section 5, the experimental results of the controller implemented employing a digital platform in a prototype of the DC-DC buck converter are shown. Finally, the conclusions are presented in Section 6.
2. Robust Exact Filtering Differentiator
Let us consider a signal , , which is assumed to be at least differentiable, and has a known Lipschitz constant . Hence, one obtains almost everywhere. Therefore, the differentiation problem is equivalent to estimate the states of the following continuous-time system:
where the state variables are defined as with , , and is given by
For system (1), its noisy output, , is defined as . Concerning the noise , it satisfies the following assumption:
Assumption 1.
The measurement noise can be represented by components, i.e., , where each possibly unbounded component () is a signal of global filtering order j and the jth-order integral magnitude .
Here, it is recalled the definition of a signal of global filtering order j introduced in [34].
Definition 1
([34]). A function , , is a signal of global filtering order , if is a locally integrable Lebesgue-measurable function, and there exists a globally bounded solution of the equation . Any number greater than is called a -order global integral magnitude of .
Assumption 1 was introduced in [40]. This assumption is more general than the consideration that is a Lebesgue-measurable bounded noise. Indeed, this classical assumption corresponds to the case . Considering system (1) and Assumption 1, the states of the systems can be estimated in real time using the robust exact filtering differentiator, which was originally presented in [34]:
where , , are the states of the filtering part, are the robust estimations of the state . The parameters are appropriate positive constants. Note that the solution of system (2) is understood in the Filippov sense [41]. Then after a finite-time, the filtering differentiator (2) satisfies the accuracy:
where . The above was demonstrated in [34]. Furthermore, if there exists a positive integer such that , then the accuracy of (3) can be improved using a differentiator of order (instead of n). On the other hand, if , then the accuracy of (3) becomes the asymptotic accuracy.
Implicit Discretization of the Robust Exact Filtering Differentiator
Some discrete-time realizations have been presented for the filtering differentiator (2) [34,35,39]. In this paper, the implicit discrete-time differentiator presented in [42] are implemented. Moreover, the states, the noise and signals at time are defined as , , , , . For discrete-time measurements, the following condition about the noise is considered:
Assumption 2.
The sampled measurement noise consists of components, , where each possibly unbounded () is a discretely sampled signal of global filtering order j and jth-order integral magnitude .
A discretely sampled signal of global filtering order j, , and its corresponding , are defined as follows:
Definition 2.
A discretely sampled signal is a signal of global filtering order and jth-order integral magnitude if for each admissible sequence there exists a discrete time signal , , which satisfies
The implicit discrete-time differentiator presented in [35] is described by the following equations
Here, is the noisy input signal of the differentiator at time , and is the robust estimations of the j-th derivative of at time . The filtering order is selected to be greater or equal to the greatest filtering order of the noise components. For instance, if the noise is a signal of global filtering order 2, then one can use .
Concerning (5), it is clear that is needed at time . To compute this value, the following support variable is defined as sign(). Following the methodology presented in [38], the following lemma is introduced.
Lemma 1
([38]). Let us define
Then, the pair is defined as follows:
- If , then and , where is the unique positive root of the following polynomial:
- If , then and .
- If , then and , where is the unique positive root of the following polynomial:
From Lemma 1, to implement the discrete-time differentiator (5), is used instead of sign(). The parameters can be computed offline while the parameters have to be computed online. According to Descartes’ rule of signs [43], each polynomial has only one positive root.
Remark 1.
It is worth noting that from Lemma 1, a root-finding method is needed to compute the unique positive root of the polynomials (7) and (8). One can use, for instance, Halley’s method [44], which was demonstrated to converge to the unique positive root of the polynomials [38], or the methodology presented in [45] to reduce the time complexity of the discrete-time differentiator.
Using the implicit discrete-time differentiator (5), one can derive the following result.
Theorem 1
([35]). Under Assumption 2, there exist constants such that after a finite-time transient, the following inequalities are verified:
where and the coefficients only depend on the differentiator parameters .
3. DC-DC Buck Converter Analysis
The DC-DC buck converter topology which considers the parasitic elements of the capacitor and inductor is shown in Figure 1. It consists of a DC input source , a controlled ideal switch , a rectifier diode , a filtering inductor , a filtering capacitor C, a load resistance R, and the equivalent series resistance (ESR) and of the capacitor and the inductor, respectively.
Figure 1.
DC-DC buck converter topology. The ESR of the capacitor C and the inductor are included.
The switched model [18] of the DC-DC buck converter in continuous conduction mode (CCM) shown in the Figure 1 is given by
where is the capacitor voltage, is the inductor current, is a disturbance in the voltage capacitor, is a disturbance in the inductor current, is the control input, and .
For stability analysis and control purposes, this paper uses the large-signal-averaged model that provides a good representation of the system macroscopic behavior and allows to obtain the system response based on a continuous control input [46,47]. The large-signal averaged model based on the set of state Equation (10) is given by
where denotes an average of the states variables over the switching period, and is the duty cycle or continuous control input. Next, for simplicity, the brackets of averaged values are dropped. Thus the average dynamic Equation (11) can be written as
where , , , and . From (12) the following model is obtained:
Let us define the output voltage error as
where is constant and represents the desired output voltage. Therefore, the output tracking error dynamics of the system can be represented as a chain of integrators as
where represents a disturbance, and is the measurement noise.
4. Proposed Control Strategy
In this section, the following system is considered (15), where is considered such that . Furthermore, at time satisfies Assumption 2. On the other hand, is defined as
where is an approximation of . Although a trapezoidal integration is used in (16), it can be changed with other methods. In order to select an adequate gain, , a discrete-time analysis is performed, then the discrete-time version of (15) is given as
The above equation is obtained using Taylor series expansion for and . With the purpose of estimating the states and , one can modify the discrete-time differentiator (5) as follows:
where it is implemented using Lemma 1, , and and are estimations of and . The estimation errors of the discrete-time filtering observer (19) are defined as and . Additionally, without saturation of the control law (16), system (17) can be represented as follows:
where and are defined as follows:
with . Note that each element of matrix is bounded after a finite-time, and their bounds are defined by parameters, which depend on parameters and the methodology used to estimate . Then, is selected such that the magnitude of the eigenvalues of are lower than one and , and . Before presenting the following theorems, the following definitions are presented:
- is the lowest sampling time such that is saturated for any measurement time greater than and previous to the instant of time , i.e., or for any with .
- is the time instant such that is unsaturated and for the previous measurement time was saturated, i.e., at , and or for any with .
- is the continuous-time function analogous to , defined as
- is the time instant after and such that .
Time instants , , and are measurement times but may not be a measurement time. Now, the main results are presented:
Theorem 2.
Let system (15) under the controller be defined as in (16) and using the implicit discrete-time filtering observer (19). is selected such that the magnitude of the eigenvalues of have a modulus lower than one and , , and if the following conditions are satisfied:
or at the time instant , , , and τ are such that
with at time , then at time .
Proof.
Considering the case at time . If , then and are defined as
where , , and are given as:
which depend on the roots and , whose real part is negative. Here, is the Laplace transform. Therefore, and are continuous functions such that
Let , , and such that , , for any . One can rewrite
Since then is increasing. Due to the above fact and the limits (27), will satisfy the condition
at the instant of time . Now, it is considered the value of for the sampling time after , which was defined as . The estimation errors , and sampling time must be small enough to satisfy the following condition:
where is defined at time and . The above condition implies that is unsaturated at the sampling time . Furthermore, the above condition can be satisfied if
are satisfied, where is defined at the sampling time . A similar demonstration can be performed for the case at the sampling time , where and are defined with instead of , with the following condition:
It concludes the proof. □
Theorem 2 shows that after the discrete-time differentiator (5) obtains the asymptotic accuracy and if is saturated at time , then is unsaturated at the sampling time . The following step is to obtain the required conditions to keep unsaturated and the system (17) stable. These conditions are presented in the following theorem:
Theorem 3.
Proof.
A discrete-time Lyapunov function is proposed as
where P is a symmetric definite positive matrix. From the previous function, one obtains:
It implies that is negative if
The above equation allows to define the convergence region of the discrete-time system and therefore, to keep an unsaturated control law. must satisfy at least the following condition:
Alternatively, one can obtain the following inequality:
where is a positive definite matrix and is defined as . Then, one obtains
Then, if there exists positive definite matrices , , with , the following conditions can be presented:
Without saturation, the solution of the discrete-time system (20) is given as
with . The above allows to define as
Then to keep an unsaturated control law , and have to satisfy the following conditions:
This concludes the proof. □
The conditions related to and in Theorem 3 define the convergence region of the discrete-time system, and they are given in Equation (36). Theorems 2 and 3 allow to show the stability of the continuous-time system (15) using the discrete-time law control (16). However, an sufficiently small sampling time is required. It is important to note that there are not values of and such that the discrete-time system is stable for any initial condition , which comes from the conditions in Theorem 2. In order to clarify the use of the above theorems, we present the following numeric example:
Numeric Example
This example show how to calculate the conditions obtained from Theorem 3. Here, the parameters shown in Table 1 are used:
Table 1.
Parameters of the numerical example.
Equation (44) allows to calculate , which is given as
and . Assuming that there exist , , then the is negative if such that
On the other hand, to keep the control unsaturated, should satisfy the following conditions:
where , and the value of was selected as a random value between its maximum and minimum values, which are given as
Therefore, for any such that satisfy the above conditions define the stability area of the system.
5. Experimental Results
This section evaluates the performance of the proposed control strategy through experimentation. The block diagram of the entire system is shown in Figure 2. The system is divided into three sections: the DC-DC buck converter, the digital control device, and the peripheral signal conditioning subsystems (anti-aliasing filter and MOSFET drivers).
Figure 2.
Block diagram representation of the system to evaluate the proposed control for the DC-DC buck converter.
5.1. System Implementation
For the control algorithm validation, a prototype of the DC-DC buck converter with synchronous rectification was designed and built with the parameters shown in the Table 2. The design of the DC-DC buck converter corresponds to an output voltage variation due to a capacitor less than 2% and an inductor current ripple less than 40% [48,49,50]. The converter operates in CCM for the entire range of values specified in Table 2 [51].
Table 2.
Specifications of a synchronous buck converter measured at 10 KHz.
The proposed control law (16) is implemented based on the robust exact filtering differentiator (19) with a differentiation order and a filter order . It is given as
Lemma 1 is used to calculate on the right hand of (49), with the methodology presented in [45] and two iterations of Halley’s method to estimate the polynomials roots given as
where , , and .
The digital platform selected to execute the algorithm is the dSPACE DS1104 R&D Controller Board, with a voltage feedback loop sampled at two different frequencies for comparison purposes. A 16-bit resolution is used for analog-to-digital conversion, and the resolution of the digital pulse-width modulator (DPWM) is 50 ns. Serial communication between the dSPACE platform and ControlDesk software is used to monitor the DC-DC buck converter output voltage , duty cycle and the system error .
In order to avoid frequency distortion in the voltage control loop due to the aliasing effect, a second-order Chebyshev low-pass filter with −20 dB of attenuation gain at the Nyquist frequency is used. The analog filter implementation is performed through a non-inverting Sallen–Key topology with the op-amp OPA4187. Finally, the DC-DC synchronous buck converter switches are ultra-low on-resistance power MOSFET IRF3710 driven via dual low side driver IR4427 to minimize propagation times and a pair of 6N135 high-speed photocoupler to isolate the control signal from the power section.
5.2. Experimental Results
The experiments shown in this section and their corresponding subsections use the control parameters of Table 3, where is selected according to the Theorem 2, hence, eigenvalues of are , and for s and , and for s (calculated using the maximum values of Table 2). Finally, is properly selected according to [52]. Likewise, Figure 3 shows the physical prototype of the system. Experiments are performed with different values of load resistance and supply voltage to ensure that the controller is robust enough to handle these uncertainties.
Table 3.
Control gains and parameters of the observer.
Figure 3.
Experimental hardware setup.
Additionally, the proposed state feedback controller is compared with a saturated discrete-time PID controller with filter in the derivative action given as
with , , and . Here is the inverse transform.
5.2.1. Output Voltage Tracking Performance
This analysis considers that the desired output voltage suddenly changes between V and V. The experiments being shown in this subsection use a fixed supply voltage of V and a constant load of . This operating point is selected because the value of R produces that the current in the inductor decreases almost to zero (discontinuous conduction mode DCM). Figure 4 shows the results of output voltage tracking performance for s and Figure 5 for s. Notice that the proposed controller behaves better during reference changes since the settling time and percent overshoot are small enough. Additionally, it is noted that the proposed controller enters the saturation region of ; however, the voltage tracking is done correctly.
Figure 4.
Output voltage tracking performance of the proposed controller and a saturated discrete−time PID with s. (a) Output voltage and reference; (b) control output; (c) reference tracking error and its estimation; (d) reference tracking error detail.
Figure 5.
Output voltage tracking performance of the proposed controller and a saturated discrete−time PID with s. (a) Output voltage and reference; (b) reference tracking error and its estimation.
5.2.2. Load Variation Performance
This analysis shows the controller’s behavior in response to load disturbances, a typical situation in power electronic converters. The experiments in this subsection are performed with , V, and the load resistance that changes every 2 s between the values and . The result of output voltage regulation under these conditions is shown in Figure 6 for s and Figure 7 for s. It is observed that the controller can suppress these disturbances, while the state estimation does not diverge from the real value during the transient state. Note that the response of the discrete-time PID controller is worse when implemented at a lower frequency.
Figure 6.
Load variation performance of the proposed controller and a saturated discrete−time PID with s. (a) Output voltage and reference; (b) control output; (c) reference tracking error and its estimation; (d) reference tracking error detail.
Figure 7.
Load variation performance of the proposed controller and a saturated discrete−time PID with s. (a) Output voltage and reference; (b) reference tracking error and its estimation.
5.2.3. Input Voltage Variation
In this experiment, the input voltage of the DC-DC buck converter varies instantaneously between two values every second. The parameters of the experiments in this subsection are the supply voltage that changes between the values V and V and . Figure 8 shows the results of the experiment for s and Figure 9 for s. It is possible to see that the estimation of the system error presents a considerably smaller noise amplitude than the system state , even when the robust exact time filtering differentiator is implemented at a lower frequency.
Figure 8.
Input voltage variation performance of the proposed controller and a saturated discrete−time PID with s. (a) Output voltage and reference; (b) control output; (c) reference tracking error and its estimation; (d) reference tracking error detail.
Figure 9.
Input voltage variation performance of the proposed controller and a saturated discrete−time PID with s. (a) Output voltage and reference; (b) reference tracking error and its estimation.
6. Conclusions
This paper presents a new digital controller for a DC-DC buck converter with duty cycle saturation. The proposed structure relies on a robust exact filtering differentiator based on the implicit discretization of the homogeneous differentiator. Additionally, the design considers the physical constraints of the DC-DC buck converter by adding a saturation law. Moreover, the conditions for preserving the asymptotic precision of the robust exact time differentiator are given, and the convergence analysis of the discrete-time system. Likewise, these theorems offer a guide for selecting the control gains .
The main advantage of this control scheme lies in the relationship between the estimation accuracy of the system states and noise filtration performances. This feature is especially useful in systems whose composition is based on switching actuators subject to high-frequency noise, as in the DC-DC buck converter. Likewise, the problem of filtering a noisy signal is often addressed, which is essential for implementing a derivative through discrete time. Real-time experimentation was carried out based on an efficient implementation method of the implicit discrete-time differentiator to ensure the effectiveness of the proposed control law, where the output voltage tracking performance and robustness to load and supply voltage variations were analyzed.
The results show a satisfactory performance and a sufficiently accurate estimation of the error, even in the presence of disturbances and measurement noise for a sampling period of s and s, with a minimum difference in the measurement noise filtering capacity. Likewise, the proposed controller showed a better behavior than a saturated discrete-time PID with a filter in the derivative action, primarily when implemented at a lower frequency. This feature is desirable for practical control applications where hardware resources and digital processing capabilities are limited, and the plant is subject to measurement noise.
Author Contributions
Conceptualization, M.A.A.-C., J.D.S.-T. and G.J.R.-A.; methodology, J.E.C.-R.; software, M.A.A.-C. and J.E.C.-R.; validation, J.D.S.-T., G.J.R.-A. and D.E.C.-P.; formal analysis, J.E.C.-R.; investigation, M.A.A.-C. and J.E.C.-R.; resources, D.E.C.-P.; data curation, M.A.A.-C.; writing—original draft preparation, M.A.A.-C. and J.E.C.-R.; writing—review and editing, J.D.S.-T.; visualization, G.J.R.-A. and D.E.C.-P.; supervision, G.J.R.-A. and D.E.C.-P.; project administration, G.J.R.-A. All authors have read and agreed to the published version of the manuscript.
Funding
This research received no external funding.
Institutional Review Board Statement
Not applicable.
Informed Consent Statement
Not applicable.
Data Availability Statement
Not applicable.
Acknowledgments
The authors appreciate the support of Consejo Nacional de Ciencia y Tecnológia (CONACYT) and Tecnológico Nacional de México (TecNM).
Conflicts of Interest
The authors declare no potential conflict of interest.
Abbreviations
The following abbreviations are used in this manuscript:
| UPS | Uninterruptible power supply |
| GPI | Generalized proportional integral |
| PID | Proportional integral derivative |
| FPGA | Field-programmable gate array |
| DSP | Digital signal processor |
| SM | Sliding mode |
| PIAW | Proportional integral with anti-windup |
| ESR | Equivalent series resistance |
| CCM | Continuous conduction mode |
| DPWM | Digital pulse-width modulator |
| DCM | Discontinuous conduction mode |
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