Implementation of the Digital QS-SVM-Based Beamformer on an FPGA Platform
Abstract
:1. Introduction
- Recent FPGA technology has programmable logic and the capability of algorithm parallelization for further enhancing power consumption, flexibility, and accuracy.
- Recent advances in the FPGA architectures include a higher storage density, a drastic reduction in power consumption and cost, a large number of gates, and a high-performance processor.
- Recent FPGA software and high-level optimizations have to be accompanied by architectural changes in the FPGA board in order to satisfy drastic computations of SVM-based applications. Advances in FPGA technology have rigorously presented high-level software tools to be easily adjusted to the FPGA hardware.
- For the first time, the QS-SVM-based beamformer has been implemented using the hybrid antenna array with bowtie elements on an FPGA board.
- For the first time, this work presents an implementation of the proposed digital beamformer in both the real environment and hardware board.
- The implementation of the QS-SVM optimization method for the DoA estimation on an FPGA board has been rigorously demonstrated for the first time.
- We have achieved a superior performance of the digital QS-SVM-based beamformer in terms of beamforming, nullsteering, and beamsteering.
- A performance evaluation of the QS-SVM-based beamformer has been fulfilled in terms of throughput, latency, and performance efficiency.
2. Literature Review and Related Work
3. Proposed Methodology and Techniques for the Spatial Signal Processing
3.1. Hybrid Antenna Array
3.2. Methodology and Theoretical Framework
4. Methods of Modeling and Producing Data
4.1. The Proposed Beamforming Technique
4.2. The QS-SVM Technique for the DoA Estimation
5. Implementation Setup of the QS-SVM-Based Beamformer on the FPGA Board
5.1. Real Environment and Software Implementation
5.2. Hardware Environment and FPGA Implementation
6. Results of the QS-SVM-Based Beamformer on the FPGA Board
- Null steering for undesired signals by replacing nulls of the radiation pattern of the proposed hybrid antenna array in the detected directions of undesired signals. Hence, we can weaken significantly or eliminate undesired signals.
- Keeping the desired signal unchanged by exerting power with the 0dB level in the detected direction of the desired signal. We should neither strengthen nor weaken the desired signal, due to the following two reasons: (1) since the desired signals may include noise, jamming, interference, and other unwanted signals, any amplification in the desired signal results in magnifying noise and other unwanted signals, and (2) any reduction in the desired signal is not of practical interest.
7. Performance Evaluation of the FPGA-Based Beamformer
7.1. Throughput Evaluation
7.2. Latency Evaluation
7.3. Performance Efficiency
8. Conclusions
Author Contributions
Funding
Institutional Review Board Statement
Informed Consent Statement
Conflicts of Interest
Abbreviations
MDPI | Multidisciplinary Digital Publishing Institute |
DOAJ | Directory of Open Access Journals |
TLA | Three Letter Acronym |
LD | Linear Dichroism |
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Parameters | Definition | Value |
---|---|---|
Number of elements of any circular loop | ||
Number of elements of any cylinder | ||
Total number of cylinders in the proposed array | ||
Number of circular loops in the cylinder | ||
Vertical spacing between two consecutive circular loops | ||
Horizontal spacing between two consecutive circular loops | ||
Maximum scanning angles |
Antenna array with bowtie elements | Antenna array with dipole elements | |
Performance efficiency of the proposed QS-SVM beamformer | 96% | 75% |
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Komeylian, S.; Paolini, C. Implementation of the Digital QS-SVM-Based Beamformer on an FPGA Platform. Sensors 2023, 23, 1742. https://doi.org/10.3390/s23031742
Komeylian S, Paolini C. Implementation of the Digital QS-SVM-Based Beamformer on an FPGA Platform. Sensors. 2023; 23(3):1742. https://doi.org/10.3390/s23031742
Chicago/Turabian StyleKomeylian, Somayeh, and Christopher Paolini. 2023. "Implementation of the Digital QS-SVM-Based Beamformer on an FPGA Platform" Sensors 23, no. 3: 1742. https://doi.org/10.3390/s23031742
APA StyleKomeylian, S., & Paolini, C. (2023). Implementation of the Digital QS-SVM-Based Beamformer on an FPGA Platform. Sensors, 23(3), 1742. https://doi.org/10.3390/s23031742