Search Results (2)

With the advancement of technology, the Single-Edge Nibble Transmission (SENT) protocol has become increasingly prevalent in automotive sensor applications, highlighting the need for a robust SENT signal simulation and acquisition system. This paper presents a real-time SENT signal acquisition system based on NI Field Programmable Gate Array (FPGA) technology. The system supports a range of message and data frame formats specified by the SAE J2716 SENT protocol, operates autonomously within a LabVIEW self-compiled environment, and is compatible with NI hardware-in-the-loop (HIL) systems for virtual electronic control units (ECU) calibration. This innovative, self-developed SENT system accommodates four message formats, seven data frame formats, and three pause pulse modes. Benchmarking tests were conducted by integrating this system with the dSPACE SCALEXIO HIL (located in Paderborn, Germany) system for SENT signal simulation and acquisition. The results confirm that the system effectively simulates and acquires SENT signals in accordance with SAE J2716 standards, establishing it as an invaluable asset in the electronification, intelligentization, informatization, and smart sensing of automotive and agricultural machinery. Full article

In this paper, a low-power and small-area Single Edge Nibble Transmission (SENT) transmitter design is proposed for automotive pressure and temperature complex sensor applications. To reduce the cost and size of the hardware, the pressure and temperature information is processed with a single integrated circuit (IC) and transmitted at the same time to the electronic control unit (ECU) through SENT. Due to its digital nature, it is immune to noise, has reduced sensitivity to electromagnetic interference (EMI), and generates low EMI. It requires only one PAD for its connectivity with ECU, and thus reduces the pin requirements, simplifies the connectivity, and minimizes the printed circuit board (PCB) complexity. The design is fully synthesizable, and independent of technology. The finite state machine-based approach is employed for area efficient implementation, and to translate the proposed architecture into hardware. The IC is fabricated in 1P6M 180 nm CMOS process with an area of (116 μm × 116 μm) and 4.314 K gates. The current consumption is 50 μA from a 1.8 V supply with a total 90 μW power. For compliance with AEC-Q100 for automotive reliability, a reverse and over voltage protection circuit is also implemented with human body model (HBM) electro-static discharge (ESD) of +6 kV, reverse voltage of −16 V to 0 V, over voltage of 8.2 V to 16 V, and fabricated area of 330 μm × 680 μm. The extensive testing, measurement, and simulation results prove that the design is fully compliant with SAE J2716 standard. Full article