MDPI - Publisher of Open Access Journals

17 pages, 417 KB

Open AccessArticle

Karnaugh-Veitch Maps as Minimal Formal Contract between Textual Requirements and Tests: A Use-Case Based Technical Analysis

by Nils Henning Müllner

Electronics 2022, 11(15), 2430; https://doi.org/10.3390/electronics11152430 - 4 Aug 2022

Cited by 1 | Viewed by 2751

Abstract

Checking that requirements written in natural language hold for a formally implemented system is a complex task. Test steps are commonly implemented manually from the requirements. This process is inherently prone to mistakes, as test cases are complex and need to be analyzed sequentially to check which input/output combinations are tested (although tools allow for explicit tracing). Utilizing Karnaugh–Veitch maps as minimal formal contract between informal requirements and implemented test steps improves this process. KV-maps provide the requirements in a computer-editable way, as they correspond to Boolean formulas. KV-maps further allow to define which test steps are relevant. With both requirements and relevance specification at hand, test steps are automatically generated. The approach is applied on a real-world industrial use-case—a train control management system. Although being generally amenable to permutation testing, the selected use-case emphasizes the potential of the method. The method successfully demonstrates its benefits and may help to disclose flaws in the current manually implemented tests. Full article

(This article belongs to the Special Issue Software Reliability: Status and Perspectives)

► Show Figures

Figure 1

18 pages, 1325 KB

Open AccessArticle

A Novel Bottom-Up/Top-Down Hybrid Strategy-Based Fast Sequential Fault Diagnosis Method

by Jingyuan Wang, Zhen Liu, Xiaowu Chen, Bing Long, Chenglin Yang and Xiuyun Zhou

Electronics 2021, 10(12), 1441; https://doi.org/10.3390/electronics10121441 - 15 Jun 2021

Cited by 6 | Viewed by 2347

Abstract

Sequential fault diagnosis is a kind of important fault diagnosis method for large scale complex systems, and generating an excellent fault diagnosis strategy is critical to ensuring the performance of sequential diagnosis. However, with the system complexity increasing, the complexity of fault diagnosis tree increases sharply, which makes it extremely difficult to generate an optimal diagnosis strategy. Especially, because the existing methods need massive redundancy iteration and repeated calculation for the state parameters of nodes, the resulting diagnosis strategy is often inefficient. To address this issue, a novel fast sequential fault diagnosis method is proposed. In this method, we present a new bottom-up search idea based on Karnaugh map, SVM and simulated annealing algorithm. It combines failure sources to generate states and a Karnaugh map is used to judge the logic of every state. Eigenvalues of SVM are obtained quickly through the simulated annealing algorithm, then SVM is used to eliminate the less useful state. At the same time, the bottom-up method and cost heuristic algorithms are combined to generate the optimal decision tree. The experiments show that the calculation time of the method is shorter than the time of previous algorithms, and a smaller test cost can be obtained when the number of samples is sufficient. Full article

(This article belongs to the Special Issue Advancement of Fault Detection/Diagnosis and Fault-Tolerant Control with Applications)

► Show Figures

Figure 1

3 pages, 179 KB

Open AccessProceeding Paper

Minish HAT: A Tool for the Minimization of Here-and-There Logic Programs and Theories in Answer Set Programming

by Rodrigo Martin and Pedro Cabalar

Proceedings 2019, 21(1), 22; https://doi.org/10.3390/proceedings2019021022 - 31 Jul 2019

Viewed by 1501

Abstract

When it comes to the writing of a new logic program or theory, it is of great importance to obtain a concise and minimal representation, for simplicity and ease of interpretation reasons. There are already a few methods and many tools, such as Karnaugh Maps or the Quine-McCluskey method, as well as their numerous software implementations, that solve this minimization problem in Boolean logic. This is not the case for Here-and-There logic, also called three-valued logic. Even though there are theoretical minimization methods for logic theories and programs, there aren’t any published tools that are able to obtain a minimal equivalent logic program. In this paper we present the first version of a tool called that is able to efficiently obtain minimal and equivalent representations for any logic program in Here-and-There. The described tool uses an hybrid method both leveraging a modified version of the Quine-McCluskey algorithm and Answer Set Programming techniques to minimize fairly complex logic programs in a reduced time. Full article

(This article belongs to the Proceedings of The 2nd XoveTIC Conference (XoveTIC 2019))

Search Results (3)

Further Information

Guidelines

MDPI Initiatives

Follow MDPI

Saved Queries

Search Filter Reset All

Years

Feature Papers

Subjects

Journals

Article Types

Countries / Regions

Search Results (3)

Further Information

Guidelines

MDPI Initiatives

Follow MDPI