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Developing a New Storage Format and a Warp-Based SpMV Kernel for Configuration Interaction Sparse Matrices on the GPU

1
Department of Computer Science, University of North Dakota, Grand Forks, ND 58202, USA
2
Department of Chemistry, University of North Dakota, Grand Forks, ND 58202, USA
*
Author to whom correspondence should be addressed.
This paper is an extended version of the conference paper, Mahmoud, M.; Hoffmann, M.; Reza, H.; An Efficient Storage Format for Storing Configuration Interaction Sparse Matrices on CPU/GPU. The 4th Annual Conference on Computational Science & Computational Intelligence (CSCI’17), Las Vegas, NV, USA, 14–16 December 2017.
Computation 2018, 6(3), 45; https://doi.org/10.3390/computation6030045
Received: 28 July 2018 / Revised: 19 August 2018 / Accepted: 20 August 2018 / Published: 24 August 2018
(This article belongs to the Section Computational Chemistry)
Sparse matrix-vector multiplication (SpMV) can be used to solve diverse-scaled linear systems and eigenvalue problems that exist in numerous, and varying scientific applications. One of the scientific applications that SpMV is involved in is known as Configuration Interaction (CI). CI is a linear method for solving the nonrelativistic Schrödinger equation for quantum chemical multi-electron systems, and it can deal with the ground state as well as multiple excited states. In this paper, we have developed a hybrid approach in order to deal with CI sparse matrices. The proposed model includes a newly-developed hybrid format for storing CI sparse matrices on the Graphics Processing Unit (GPU). In addition to the new developed format, the proposed model includes the SpMV kernel for multiplying the CI matrix (proposed format) by a vector using the C language and the Compute Unified Device Architecture (CUDA) platform. The proposed SpMV kernel is a vector kernel that uses the warp approach. We have gauged the newly developed model in terms of two primary factors, memory usage and performance. Our proposed kernel was compared to the cuSPARSE library and the CSR5 (Compressed Sparse Row 5) format and already outperformed both. View Full-Text
Keywords: SpMV; linear system; CI; GPU; kernel; CUDA SpMV; linear system; CI; GPU; kernel; CUDA
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MDPI and ACS Style

Mahmoud, M.; Hoffmann, M.; Reza, H. Developing a New Storage Format and a Warp-Based SpMV Kernel for Configuration Interaction Sparse Matrices on the GPU. Computation 2018, 6, 45. https://doi.org/10.3390/computation6030045

AMA Style

Mahmoud M, Hoffmann M, Reza H. Developing a New Storage Format and a Warp-Based SpMV Kernel for Configuration Interaction Sparse Matrices on the GPU. Computation. 2018; 6(3):45. https://doi.org/10.3390/computation6030045

Chicago/Turabian Style

Mahmoud, Mohammed; Hoffmann, Mark; Reza, Hassan. 2018. "Developing a New Storage Format and a Warp-Based SpMV Kernel for Configuration Interaction Sparse Matrices on the GPU" Computation 6, no. 3: 45. https://doi.org/10.3390/computation6030045

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