Search Results (3)

High-endurance EEPROM is widely used for data storage with a data maintenance requirement when powered off. A major factor in EEPROM design is its lifetime cycle. However, state-of-the-art high-endurance designs are based on an IDM (integrated device manufacturer), which is very expensive and unfeasible for fabless design houses. In this article, we propose an innovative technology-adaptable high-endurance EEPROM design that is suitable for fabless design houses, with a much lower manufacturing cost. The key part of our design is a new charge pump with a precise voltage step increase control to reduce the high voltage damage to memory cells and to increase the EEPROM’s endurance. A temperature-insensitive clamping device is also used to alleviate the voltage fluctuation problem. Our method is adaptable to advanced fabrication processes and, thus, applicable for fabless designs with lower costs. Our test on a 0.13 µm commercial fabrication technology shows 4 million erase/write cycles, which is on a par with the state-of-the-art IDM supplier STMicroelectronics. Full article

Increasing requirements for neural implantation are helping to expand our understanding of nervous systems and generate new developmental approaches. It is thanks to advanced semiconductor technologies that we can achieve the high-density complementary metal-oxide-semiconductor electrode array for the improvement of the quantity and quality of neural recordings. Although the microfabricated neural implantable device holds much promise in the biosensing field, there are some significant technological challenges. The most advanced neural implantable device relies on complex semiconductor manufacturing processes, which are required for the use of expensive masks and specific clean room facilities. In addition, these processes based on a conventional photolithography technique are suitable for mass production, which is not applicable for custom-made manufacturing in response to individual experimental requirements. The microfabricated complexity of the implantable neural device is increasing, as is the associated energy consumption, and corresponding emissions of carbon dioxide and other greenhouse gases, resulting in environmental deterioration. Herein, we developed a fabless fabricated process for a neural electrode array that was simple, fast, sustainable, and customizable. An effective strategy to produce conductive patterns as the redistribution layers (RDLs) includes implementing microelectrodes, traces, and bonding pads onto the polyimide (PI) substrate by laser micromachining techniques combined with the drop coating of the silver glue to stack the laser grooving lines. The process of electroplating platinum on the RDLs was performed to increase corresponding conductivity. Sequentially, Parylene C was deposited onto the PI substrate to form the insulation layer for the protection of inner RDLs. Following the deposition of Parylene C, the via holes over microelectrodes and the corresponding probe shape of the neural electrode array was also etched by laser micromachining. To increase the neural recording capability, three-dimensional microelectrodes with a high surface area were formed by electroplating gold. Our eco-electrode array showed reliable electrical characteristics of impedance under harsh cyclic bending conditions of over 90 degrees. For in vivo application, our flexible neural electrode array demonstrated more stable and higher neural recording quality and better biocompatibility as well during the 2-week implantation compared with those of the silicon-based neural electrode array. In this study, our proposed eco-manufacturing process for fabricating the neural electrode array reduced 63 times of carbon emissions compared to the traditional semiconductor manufacturing process and provided freedom in the customized design of the implantable electronic devices as well. Full article

The semiconductor industry is experiencing a rapid change since new markets and new technologies have emerged to give insights to product innovation. The semiconductor industry is now specializing into the integrated device manufacturer (IDM), fabless, and foundry sectors. We investigated the determinant factors that affect the financial performance of firms in the fabless sector, which is the most technology-intensive and product-oriented sector among the three sectors. The correlation among technological capability, product platform, and financial performance is analyzed by structural equation modeling. The data includes 17,256 patents from 2005 to 2014 and financial data from 2012 to 2016 from 57 firms that run businesses in the fabless sector. Specifically, technological capability includes technological assets, technology breadth, and technology depth. New product development occurs by applying product platform efficiency. Financial performance includes growth and profitability. The results show that advancing product platform efficiency brings positive effects to financial performance. Also, increasing technological depth and technological assets not only improve product platform efficiency, but also bring positive effects to financial performance. In addition, technological depth affected growth positively, and technological breadth affected profitability positively. The results show the direction that new product development strategy needs to take. Full article