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Keywords = digital step attenuator (DSA)

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15 pages, 4820 KiB  
Article
An S–K Band 6-Bit Digital Step Attenuator with Ultra Low Insertion Loss and RMS Amplitude Error in 0.25 μm GaAs p-HEMT Technology
by Quanzhen Liang, Kuisong Wang, Xiao Wang, Yuepeng Yan and Xiaoxin Liang
Appl. Sci. 2024, 14(9), 3887; https://doi.org/10.3390/app14093887 - 1 May 2024
Cited by 2 | Viewed by 3780
Abstract
This paper presents an ultra-wideband, low insertion loss, and high accuracy 6-bit digital step attenuator (DSA). To improve the accuracy of amplitude and phase shift of the attenuator, two innovative compensation structures are proposed in this paper: a series inductive compensation structure (SICS) [...] Read more.
This paper presents an ultra-wideband, low insertion loss, and high accuracy 6-bit digital step attenuator (DSA). To improve the accuracy of amplitude and phase shift of the attenuator, two innovative compensation structures are proposed in this paper: a series inductive compensation structure (SICS) designed to compensate for high frequency attenuation values and a small bit compensation structure (SBCS) intended for large attenuation bits. Additionally, we propose insertion loss reduction techniques (ILRTs) to reduce insertion loss. The fabricated 6-bit DSA core area is only 0.51 mm2, and it exhibits an attenuation range of 31.5 dB in 0.5 dB steps. Measurements reveal that the root-mean-square (RMS) attenuation and phase errors for the 64 attenuation states are within 0.18 dB and 7°, respectively. The insertion loss is better than 2.54 dB; the return loss is better than −17 dB; and the input 1 dB compression point (IP1 dB) is 29 dBm at IF 12 GHz. To the best of our knowledge, this chip presents the highest attenuation accuracy, the lowest insertion loss, the best IP1dB, and a good matching performance in the range of 2–22 GHz using the 0.25 μm GaAs p-HEMT process. Full article
(This article belongs to the Special Issue Trends and Prospects in Applied Electromagnetics)
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16 pages, 9076 KiB  
Article
A C/X/Ku/K-Band Precision Compact 6-Bit Digital Attenuator with Logic Control Circuits
by Jialong Zeng, Jiaxuan Li, Yang Yuan, Cheng Tan and Zhongjun Yu
Electronics 2022, 11(21), 3620; https://doi.org/10.3390/electronics11213620 - 6 Nov 2022
Cited by 2 | Viewed by 2444
Abstract
This paper proposes a C/X/Ku/K band 6-bit digital step attenuator (DSA) which employs a variety of improved attenuation cells to achieve a wide bandwidth, stable amplitude variation, stable phase variation, and small area. In this paper, the improved T-type, π-type, and switched-path type [...] Read more.
This paper proposes a C/X/Ku/K band 6-bit digital step attenuator (DSA) which employs a variety of improved attenuation cells to achieve a wide bandwidth, stable amplitude variation, stable phase variation, and small area. In this paper, the improved T-type, π-type, and switched-path type topologies are analyzed theoretically and applied to different attenuation values to achieve the optimal attenuator performance. In addition, in order to reduce the complexity and to improve the stability of the overall radar system, the logic control circuit is integrated in the DSA chip in this paper. Finally, the proposed attenuator is implemented in 0.15μm GaAs technology, which has a maximum attenuation range of 31.5 dB with 0.5 dB steps. The proposed DSA exhibits a root-mean-square (RMS) attenuation error of less than 0.15 dB and an RMS phase error of less than 3°, at 4–24 GHz. The insertion loss (IL) and the area of the DSA are 4.3–4.5 dB and 1.5 mm × 0.4 mm, respectively. Benefiting from the improvements of the attenuation cells and the characteristic of GaAs technology with strong resistance to radiation and power processing capability, the proposed DSA is suitable for spaceborne radar systems. Full article
(This article belongs to the Special Issue Advanced RF, Microwave, and Millimeter-Wave Circuits and Systems)
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