Special Issue "Resiliency, Robustness, and Reliability (R3) for VLSI Circuits and Systems"
A special issue of Journal of Low Power Electronics and Applications (ISSN 2079-9268).
Deadline for manuscript submissions: closed (28 February 2014)
Dr. Massimo Alioto
1 Department of Information Engineering, University of Siena, Italy
2 University of Michigan, Ann Arbor, USA
Phone: +39 577 234850
Interests: low-power and ultra-low power circuits and systems; subthreshold VLSI circuits; VLSI circuits in emerging technologies; cryptographic circuits robust against side-channel attacks; robust and variability-aware design of ultra-low voltage circuits; logic styles for enhanced yield at ultra low voltages; power management for ultra-low power wireless nodes
Prof. Dr. Paul Ampadu
Department of Electrical and Computer Engineering, School of Engineering and Applied Sciences, University of Rochester, Rochester, USA
Website: http:// http://www.ece.rochester.edu/projects/edison/
Resiliency, robustness and reliability have become a major concern in the design of circuits and systems for computing, storage, and processing. These challenges will become even more critical in future generation VLSI circuits and systems. Simultaneously, the energy/performance/design effort cost of ensuring adequate yield and correctness over the whole chip lifespan is increasing rapidly, possibly offsetting the benefits of technology scaling.
This special issue focuses on circuit, system, and cross-layer techniques to deal with faults and errors introduced by inherent, transient or aging-related failures. Emphasis is given to the following challenges: (i) designing resilient/robust/reliable systems derived from unreliable components, (ii) reducing design margin and cost necessary to detect and correct failures, (iii) defining energy/performance-aware design strategies to handle failures in imperfect systems, (iv) developing low-cost yield-centric techniques that are amenable to further technology scaling, (v) developing approaches to reduce or tolerate device/circuit degradation over time, (vi) enhancing resiliency/robustness/reliability to enable aggressive energy/voltage reduction.
Scientific contributions are invited to address the above challenges. Topics of interest for this issue include, but are not limited to:
- process/voltage/temperature variation-aware techniques for low-energy and/or high-performance applications
- design-time and post-silicon approaches to enhance yield in nanoscale CMOS chips
- adaptive/redundant/reconfigurable circuits, modules and systems to deal with defects and failures
- low-overhead techniques for detection and correction of static/slow/fast errors
- application-aware approaches for less-than perfect/approximate computing
- innovative approaches to prolonging chip lifetime in spite of aging and other reliability issues
- design exploration and automation with emphasis on resiliency, robustness and reliability
- resiliency, robustness and reliability in beyond-CMOS technologies
- issues related to reliable ultra-low voltage VLSI circuits and systems for green computing.
Dr. Massimo Alioto
Prof. Dr. Paul Ampadu
Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. Papers will be published continuously (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.
Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are refereed through a peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Journal of Low Power Electronics and Applications is an international peer-reviewed Open Access quarterly journal published by MDPI.
Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 300 CHF (Swiss Francs). English correction and/or formatting fees of 250 CHF (Swiss Francs) will be charged in certain cases for those articles accepted for publication that require extensive additional formatting and/or English corrections.
Article: Multi-Threshold Dual-Spacer Dual-Rail Delay-Insensitive Logic (MTD3L): A Low Overhead Secure IC Design Methodology
J. Low Power Electron. Appl. 2013, 3(4), 300-336; doi:10.3390/jlpea3040300
Received: 6 August 2013; in revised form: 20 September 2013 / Accepted: 12 October 2013 / Published: 25 October 2013| Download PDF Full-text (648 KB) | Download XML Full-text
Article: Two-Layer Error Control Codes Combining Rectangular and Hamming Product Codes for Cache Error
J. Low Power Electron. Appl. 2014, 4(1), 44-62; doi:10.3390/jlpea4010044
Received: 12 November 2013; in revised form: 20 January 2014 / Accepted: 10 February 2014 / Published: 27 February 2014| Download PDF Full-text (990 KB) | Download XML Full-text
Last update: 4 October 2012