PICs for Optical Interconnects

A special issue of Applied Sciences (ISSN 2076-3417). This special issue belongs to the section "Optics and Lasers".

Deadline for manuscript submissions: closed (10 October 2019) | Viewed by 21880

Special Issue Editors


E-Mail Website
Guest Editor
Department of Informatics, Aristotle University of Thessaloniki, 54453 Thessaloniki, Greece
Interests: optical interconnects; integrated photonics; integrated photonic meshes; optical memories; 5G networks
Special Issues, Collections and Topics in MDPI journals

E-Mail
Guest Editor
Aristotle University of Thessaloniki, Greece
Interests: optical interconnects; integrated photonics; optical memories

Special Issue Information

Dear Colleagues,

At the dawn of the Zettabyte era, the increasing demand for high-bandwidth Internet applications and cloud-based solutions have been driving an immense network traffic explosion, stimulating the rise of hyperscale data centers. Currently, the portion of traffic residing within the data center network exceeds 75% of its overall traffic-load, which in turn is expected to quadruple by 2021, constantly pushing for more efficient interconnect solutions. Towards addressing the vast network scaling, photonic integration has been heralded as the key enabling technology with its growing maturity achieving a doubling of the optical linerate on an annual basis. Currently, the adoption of 400Gb/s is ramping up, while latest worldwide research efforts are unravelling application-specific Photonic Integrated Chips (PICs) with unparalleled performance in terms of bandwidth, power-efficiency and cost-expenses at all levels of the hierarchy, starting from rack-to-rack, board-to-board and chip-to-chip, deploying a wealth of photonic integration platforms, spanning from electro-optic boards, silicon photonics, III-V materials, as well as novel materials.

The main purpose of this Special Issue is to cover all topics of latest research and developments in the field of “PICs for Optical Interconnects”. This will be an open call for papers and we are seeking research contributions in the following areas:

  1. Optical interconnect system architectures
  2. Active optical cables and mid-board optics
  3. On-chip and short-reach optical interconnect technologies
  4. Electrical–optical PCB technologies and pluggable optical connectors
  5. 3D integration, assembly and packaging
  6. Large scale photonic switches and routing technologies
  7. Silicon photonic PICs and III-V/Si laser sources
  8. Optical memories and optically-interconnected memories
  9. Photonic crystals, plasmonic devices and novel materials
  10. Neuromorphic photonics

Dr. Christos Vagionas
Dr. Theoni Alexoudi
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Applied Sciences is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Published Papers (5 papers)

Order results
Result details
Select all
Export citation of selected articles as:

Research

Jump to: Other

11 pages, 5862 KiB  
Article
High-Speed VCSEL-Based Transceiver for 200 GbE Short-Reach Intra-Datacenter Optical Interconnects
by Giannis Kanakis, Nikos Iliadis, Wouter Soenen, Bart Moeneclaey, Nikolaos Argyris, Dimitrios Kalavrouziotis, Silvia Spiga, Paraskevas Bakopoulos and Hercules Avramopoulos
Appl. Sci. 2019, 9(12), 2488; https://doi.org/10.3390/app9122488 - 18 Jun 2019
Cited by 14 | Viewed by 3804
Abstract
The soaring demand for higher speeds in datacenters to address the relentless growth of the global IP traffic places optical interconnects in the spotlight. In this manuscript, we present a high-speed optical transceiver for intra-datacenter connectivity. The transceiver is based on single-mode, single-polarization [...] Read more.
The soaring demand for higher speeds in datacenters to address the relentless growth of the global IP traffic places optical interconnects in the spotlight. In this manuscript, we present a high-speed optical transceiver for intra-datacenter connectivity. The transceiver is based on single-mode, single-polarization high-speed vertical-cavity surface-emitting lasers (VCSELs), a VCSEL driver chip, and a linear receiver. Following a step-by-step approach, we present the architectures, assembly processes, and experimental results from the different modules. More specifically, we demonstrate (1) a data transmission experiment at 80 Gb/s using PAM-4 (four-level Pulse Amplitude Modulation) modulation for a reach of up to 500 m by employing a single-mode VCSEL module, and (2) a full-link experiment proving up to 64 Gb/s per lane capacity using PAM-4 signaling of the VCSEL-based optical transceiver test vehicles in back-to-back configuration and up to 56 Gb/s for 500 m and 2 km transmission distances. The acquired experimental results verify the suitability of the optical transceiver for intra-datacenter interconnects’ applications. Full article
(This article belongs to the Special Issue PICs for Optical Interconnects)
Show Figures

Figure 1

14 pages, 10338 KiB  
Article
Lossless WDM PON Photonic Integrated Receivers Including SOAs
by Pantea Nadimi Goki, Muhammad Imran, Claudio Porzi, Veronica Toccafondo, Francesco Fresi, Fabio Cavaliere and Luca Potì
Appl. Sci. 2019, 9(12), 2457; https://doi.org/10.3390/app9122457 - 15 Jun 2019
Cited by 7 | Viewed by 3161
Abstract
The role of a semiconductor optical amplifier (SOA) for amplifying downstream traffic at optical network terminals (ONT) within a silicon-photonics integrated receiver in a high capacity passive optical network (PON) is investigated. The nearly traveling wave SOA effects are evaluated by considering fabrication [...] Read more.
The role of a semiconductor optical amplifier (SOA) for amplifying downstream traffic at optical network terminals (ONT) within a silicon-photonics integrated receiver in a high capacity passive optical network (PON) is investigated. The nearly traveling wave SOA effects are evaluated by considering fabrication and link loss constraints through numerical analysis and experimental validation. The impact of hybrid integration of a SOA chip on a silicon on insulator (SOI) photonic chip using the flip chip bonding technique on SOA design is evaluated through numerical analysis of a multi section cavity model. The performance of the proposed ONT receiver design employing twin parallel SOAs is evaluated experimentally on a 32 × 25 Gb/s OOK WDM transmission system considering cross gain modulation (XGM) and amplified spontaneous emission (ASE) constraints. The XGM impact is evaluated through 32 channel wavelength division multiplexing (WDM) transmission and a likely PON worst case scenario of high channel power difference (~10 dB) between adjacent channels. The impact of ASE is evaluated through the worst-case polarization condition, i.e., when all of the signal is coupled to only one. Successful transmission was achieved in both worst-case conditions with limited impact on performance. SOA results indicate that a maximum residual facet reflectivity of 4 × 10−4 for the chip-bonded device can lead to a power penalty below 2 dB in a polarization-diversity twin SOAs receiver. Full article
(This article belongs to the Special Issue PICs for Optical Interconnects)
Show Figures

Figure 1

18 pages, 4135 KiB  
Article
Automatic Initialization Methods for Photonic Components on a Silicon-Based Optical Switch
by Stefano Tondini, Claudio Castellan, Manuel Alessandro Medina and Lorenzo Pavesi
Appl. Sci. 2019, 9(9), 1843; https://doi.org/10.3390/app9091843 - 05 May 2019
Cited by 9 | Viewed by 3308
Abstract
In this work we showed the optimization of the spectral response of several optical elements in a silicon-based optical switch. Integrated thermal resistors induced a local heating of the components. The temperature increase, in turn, caused a thermal shift of the optical response [...] Read more.
In this work we showed the optimization of the spectral response of several optical elements in a silicon-based optical switch. Integrated thermal resistors induced a local heating of the components. The temperature increase, in turn, caused a thermal shift of the optical response of the component. In this manner, we aligned interleavers and micro-ring resonators to the International Telecommunication Union (ITU) channels, by using a stochastic method named Globalized Bounded Nelder-Mead (GBNM) to determine the proper temperatures. The optimization engine relied on the optical feedback from on-chip monitor photodiodes to drive these photonic elements into the wanted functioning condition. This method is suited for restoring the spectral response of optical elements impaired by fabrication inaccuracies. In the same way, it can be applied to tune in resonance active components, whose transfer function has one or more local optima. We proved the reliability of the GBNM method for the optimization of an integrated optical switch, with more than thousand optical components, each one interfaced with a thermal resistor driven by a dedicated electronic circuit. On the one hand, the GBNM guaranteed the automatic alignment of all active components on the chip, over multiple instances. On the other hand, the method allowed for the proper working of such a complex device. Full article
(This article belongs to the Special Issue PICs for Optical Interconnects)
Show Figures

Figure 1

16 pages, 4062 KiB  
Article
InP-Based Foundry PICs for Optical Interconnects
by Francisco M. Soares, Moritz Baier, Tom Gaertner, Norbert Grote, Martin Moehrle, Tobias Beckerwerth, Patrick Runge and Martin Schell
Appl. Sci. 2019, 9(8), 1588; https://doi.org/10.3390/app9081588 - 17 Apr 2019
Cited by 30 | Viewed by 7846
Abstract
This paper describes a fabrication process for realizing Indium-Phosphide-based photonic-integrated circuits (PICs) with a high level of integration to target a wide variety of optical applications. To show the diversity in PICs achievable with our open-access foundry process, we illustrate two examples: a [...] Read more.
This paper describes a fabrication process for realizing Indium-Phosphide-based photonic-integrated circuits (PICs) with a high level of integration to target a wide variety of optical applications. To show the diversity in PICs achievable with our open-access foundry process, we illustrate two examples: a fully-integrated 20 Gb/s dual-polarization electro-absorption-modulated laser, and a balanced detector composed of avalanche photodiodes for detection of 28 Gb/s optical signals. On another note, datacenters are increasingly relying on hybrid integration of PICs from different technology platforms to increase transmission capacity, while simultaneously lowering cost, size, and power consumption. Several technology platforms require surface coupling rather than the traditional edge coupling to couple the light from one PIC to another. To accommodate the surface-coupling approach in our integration platform, we have developed a strategy to transfer the following optical Input/Output devices into our fabrication process: grating couplers, and vertical mirrors. In addition, we introduced etched facets into the process to improve the usability of our edge-coupling elements. We believe that the additional flexibility in Input/Output interfacing combined with the integration of multiple devices onto one PIC to reduce the number of PIC-to-PIC alignments can contribute significantly to the development of compact, low-cost, and high-performance datacenter modules. Full article
(This article belongs to the Special Issue PICs for Optical Interconnects)
Show Figures

Figure 1

Other

Jump to: Research

9 pages, 738 KiB  
Letter
Generalization of an Optical ASA Switch
by Bey-Chi Lin
Appl. Sci. 2019, 9(6), 1096; https://doi.org/10.3390/app9061096 - 15 Mar 2019
Cited by 3 | Viewed by 2470
Abstract
An arrayed waveguide grating (AWG) is a kind of passive wavelength router, and it is the most promising technology for developing large optical switches. However, AWGs have poor scalability, and using small AWGs to construct a large switch has been done in many [...] Read more.
An arrayed waveguide grating (AWG) is a kind of passive wavelength router, and it is the most promising technology for developing large optical switches. However, AWGs have poor scalability, and using small AWGs to construct a large switch has been done in many prior works. A novel AWG-based switch called ASA (AWG, Space switching, AWG) that does not use wavelength converters has been proposed. It can expand the switch size from N to N2 by using N × N AWGs. In this paper, we generalize the ASA switch by using only N × N AWGs, N × N space switches, and N wavelengths such that the switch size is expanded to Nt for any positive integer t. Since each port of an N × N AWG can transmit up to N wavelengths simultaneously, the total capacity of the generalized ASA switch is extended to be close to Nt+1 × the bandwidth of a wavelength channel, provided that the inputs which are located in the same port position of each input AWG are destined to distinct outputs. Full article
(This article belongs to the Special Issue PICs for Optical Interconnects)
Show Figures

Figure 1

Back to TopTop