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Hardware in the Loop, Real-Time Simulation and Digital Control of...
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Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, Volume II

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Power Electronics".

Deadline for manuscript submissions: 31 May 2024 | Viewed by 18919

Special Issue Editors

Prof. Dr. Miro Milanovic

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Guest Editor
Faculty of Electrical Engineering and Computer Science, University of Maribor, Koroska Cesta 46, SI-2000 Maribor, Slovenia
Interests: control of power electronics converters; unity power factor correction; switching matrix converters; FPGA-based real time simulation
Special Issues, Collections and Topics in MDPI journals
Prof. Dr. Eric Monmasson

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Guest Editor
Systèmes et Applications des Technologies de l’Information et de l’Energie Laboratory, UMR CNRS 8029, CY Cergy Paris University, Paris, France
Interests: control of power electronics; electrical motors and generators; SoC-based and FPGA-based industrial control systems
Special Issues, Collections and Topics in MDPI journals
Dr. Franc Mihalič

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Guest Editor
Faculty of Electrical Engineering and Computer Science, University of Maribor, Koroska Cesta 46, SI-2000 Maribor, Slovenia
Interests: power electronics converters (modelling, control ...); modulation strategies for EMI reduction and power factor correction circuits
Dr. Lahoucine Idkhajine

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Guest Editor
SATIE Laboratory, CY Cergy-Paris University, 95031 Cergy-Pontoise, France
Interests: controllers; observers; embedded real-time simulators and real-time digital twins of power electronics and electrical drive systems, and their SoC-FPGA digital implementation

Special Issue Information

Dear Colleagues,

The main objective of this Special Issue is to provide experts in the field of power electronics and drives the opportunity to present their research and development efforts in the field of hardware-in-the-loop, real-time simulations, digital control, and functional safety of power electronics and drives, with an emphasis on practical applications. Therefore, researchers who are involved in the above mentioned research topics are invited to submit their manuscripts and to contribute their expertise to this Special Issue.

Prof. Dr. Miro Milanovic
Prof. Dr. Eric Monmasson
Dr. Franc Mihalič
Dr. Lahoucine Idkhajine
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • power converters
  • motor drives
  • digital controllers
  • microcontroller-based applications
  • FPGA-based controllers
  • system-on-chip-based controllers
  • software-in-the-loop
  • hardware-in-the-loop
  • functional safety of the power electronics
  • fault-tolerant techniques
  • microcomputer-based real-time simulations
  • FPGA-based real-time simulations

Published Papers (7 papers)

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Research

Jump to: Review

29 pages, 3615 KiB  
Article
Enhancing the Coupling of Real-Virtual Prototypes: A Method for Latency Compensation
by Peter Baumann, Oliver Kotte, Lars Mikelsons and Dieter Schramm
Electronics 2024, 13(6), 1077; https://doi.org/10.3390/electronics13061077 - 14 Mar 2024
Viewed by 457
Abstract
Currently, innovations in mechatronic products often occur at the system level, requiring consideration of component interactions throughout the entire development process. In the earlier phases of development, this is accomplished by coupling virtual prototypes such as simulation models. As the development progresses and [...] Read more.
Currently, innovations in mechatronic products often occur at the system level, requiring consideration of component interactions throughout the entire development process. In the earlier phases of development, this is accomplished by coupling virtual prototypes such as simulation models. As the development progresses and real prototypes of certain system components become available, real-virtual prototypes (RVPs) are established with the help of network communication. However, network effects—all of which can be interpreted as latencies in simplified terms—distort the system behavior of RVPs. To reduce these distortions, we propose a coupling method for RVPs that compensates for latencies. We present an easily applicable approach by introducing a generic coupling algorithm based on error space extrapolation. Furthermore, we enable online learning by transforming coupling algorithms into feedforward neural networks. Additionally, we conduct a frequency domain analysis to assess the impact of coupling faults and algorithms on the system behavior of RVPs and derive a method for optimally designing coupling algorithms. To demonstrate the effectiveness of the coupling method, we apply it to a hybrid vehicle that is productively used as an RVP in the industry. We show that the optimally designed and trained coupling algorithm significantly improves the credibility of the RVP. Full article
(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, Volume II)
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16 pages, 3406 KiB  
Article
Indirect Matrix Converter Hardware-in-the-Loop Semi-Physical Simulation Based on Latency-Free Decoupling
by Zhongqing Sang, Shaojie Li, Yuanyuan Huang, Xin Gao and Rui Qiao
Electronics 2023, 12(23), 4802; https://doi.org/10.3390/electronics12234802 - 27 Nov 2023
Cited by 1 | Viewed by 737
Abstract
In the process of hardware-in-the-loop simulations (HILs) of indirect matrix converters (IMCs), solving the mathematical models of complex multiswitching converter topologies has become a major problem. The conventional approach is to split the complex mathematical model into multiple serial subsystems; however, this inevitably [...] Read more.
In the process of hardware-in-the-loop simulations (HILs) of indirect matrix converters (IMCs), solving the mathematical models of complex multiswitching converter topologies has become a major problem. The conventional approach is to split the complex mathematical model into multiple serial subsystems; however, this inevitably produces delays in the simulation steps between different subsystems, leading to numerical oscillations. In this paper, the method of latency-free decoupling is adopted, which has no time-step delay between different subsystems, making each subsystem a parallel operation. This can improve the numerical stability of the simulations and can effectively reduce the step size of the real-time simulation and alleviate the problem of real-time simulation resource consumption. In this paper, we discuss in detail the modeling process of IMC hardware-in-the-loop simulations with Finite Control Set Model Predictive Control (FCS-MPC), and experimentally validate our method using the Speedgoat test platform, resulting in a simulation step size of less than 200 ns. The simulation results are compared with the results of Matlab’s Simpower power system, which allows us to evaluate the accuracy of our model. Full article
(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, Volume II)
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13 pages, 936 KiB  
Article
Automatic Word Length Selection with Boundary Conditions for HIL of Power Converters
by Mariano Alberto García-Vellisca, Carlos Quiterio Gómez Muñoz, María Sofía Martínez-García and Angel de Castro
Electronics 2023, 12(16), 3488; https://doi.org/10.3390/electronics12163488 - 17 Aug 2023
Viewed by 705
Abstract
Hardware-in-the-loop (HIL) is a common technique used for testing in power electronics. It draws upon FPGAs (field-programmable gate arrays) because they allow for reaching real-time simulation for mid-high switching frequencies. FPGA area and delay are keys to reaching a compromise between performance and [...] Read more.
Hardware-in-the-loop (HIL) is a common technique used for testing in power electronics. It draws upon FPGAs (field-programmable gate arrays) because they allow for reaching real-time simulation for mid-high switching frequencies. FPGA area and delay are keys to reaching a compromise between performance and accuracy. To minimize area and delay, signal word length (WL) is critical. Furthermore, the input and output’s WL should be carefully chosen because these signals come from ADCs (analog-to-digital converters) or go to DACs (digital-to-analog converters). In other words, the role of ADCs and DACs is the boundary condition when assigning all the signal WLs in an HIL model. This research presents an automatic method for computing the signal WLs in the corresponding model by considering input/output boundary conditions. This automatic method needs a single simulation to decide both the integer and fractional width of every signal. Our method accelerates the process, showing an advantage over manual methods and those requiring multiple simulations. The proposed method is applied to create all the WL assignments to the signals involved in a fixed-point coded buck converter model, which shows its feasibility. Full article
(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, Volume II)
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18 pages, 429 KiB  
Article
Efficient Hardware-in-the-Loop Models Using Automatic Code Generation with MATLAB/Simulink
by Roberto Saralegui, Alberto Sanchez and Angel de Castro
Electronics 2023, 12(13), 2786; https://doi.org/10.3390/electronics12132786 - 23 Jun 2023
Cited by 2 | Viewed by 1108
Abstract
Hardware-in-the-loop testing is usually a part of the design cycle of control systems. Efficient and fast models can be created in a Hardware Description Language (HDL), which is implemented in a Field-Programmable Gate Array (FPGA). Control engineers are more skilled in higher-level approaches. [...] Read more.
Hardware-in-the-loop testing is usually a part of the design cycle of control systems. Efficient and fast models can be created in a Hardware Description Language (HDL), which is implemented in a Field-Programmable Gate Array (FPGA). Control engineers are more skilled in higher-level approaches. HDL models derived automatically from schematics have noticeably lower performance, while HDL models derived from their equations are faster and smaller. However, even models translated automatically into HDL using the equations might be worse than manually coded models. A design workflow is proposed to achieve manual-like performance with automatic tools. It consists of the identification of similar operations, forcing signal signedness, and adjusting to multiplier input sizes. A detailed comparison was performed between three workflows: (1) translation of high-level MATLAB code, (2) translation of a Simulink model, and (3) working directly in the HDL. Sources of inefficiency were shown in a buck converter, and the process was validated in a full-bridge with electrical losses using a Runge–Kutta method. The results showed that the proposed approach delivered code that performed very close to a reference VHDL implementation, even for complex designs. Finally, the model was implemented in an off-the-shelf FPGA board suitable for a hardware-in-the-loop test setup. Full article
(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, Volume II)
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18 pages, 4312 KiB  
Article
Hardware Emulation of Step-Down Converter Power Stages for Digital Control Design
by Botond Sandor Kirei, Calin-Adrian Farcas, Cosmin Chira, Ionut-Alin Ilie and Marius Neag
Electronics 2023, 12(6), 1328; https://doi.org/10.3390/electronics12061328 - 10 Mar 2023
Cited by 1 | Viewed by 1513
Abstract
This paper proposes a methodology of delivering the emulation hardware of several step-down converter power stages. The generalized emulator design methodology follows these steps: first, the power stage is described using an ordinary differential equation system; second, the ordinary differential equation system is [...] Read more.
This paper proposes a methodology of delivering the emulation hardware of several step-down converter power stages. The generalized emulator design methodology follows these steps: first, the power stage is described using an ordinary differential equation system; second, the ordinary differential equation system is solved using Euler’s method, and thus an accurate time-domain model is obtained; next, this time-domain model can be described using either general-purpose programming language (MATLAB, C, etc.) or hardware description language (VHDL, Verilog, etc.). As a result, the emulator has been created; validation of the emulator may be carried out by comparing it to SPICE transient simulations. Finally, the validated emulator can be implemented on the preferred target technology, either in a general-purpose processor or a field programmable gate array. As the emulator relies on the ordinary differential equation system of the power stage, it has better behavioral accuracy than the emulators based on average state space models. Moreover, this paper also presents the design methodology of a manually tuned proportional–integrative–derivative controller deployed on a field programmable gate array. Full article
(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, Volume II)
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Review

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15 pages, 13208 KiB  
Review
System Identification–Based Adaptive Real-Time Simulators for Power Electronic Converters—Application to Three-Phase and NPC Inverters
by Lahoucine Idkhajine, Mohamed Aarab and Eric Monmasson
Electronics 2023, 12(5), 1094; https://doi.org/10.3390/electronics12051094 - 22 Feb 2023
Viewed by 1163
Abstract
This paper deals with the real-time simulation of power electronic converters. It discusses a new approach for designing embedded real-time simulators (eRTSs) that approximate the static and dynamic behavior of a power converter at the switching scale. The main concept is to approximate [...] Read more.
This paper deals with the real-time simulation of power electronic converters. It discusses a new approach for designing embedded real-time simulators (eRTSs) that approximate the static and dynamic behavior of a power converter at the switching scale. The main concept is to approximate the voltage/current experimental characteristics of each switch using dedicated transfer functions obtained after a system identification process. The adaptive feature of such eRTS consists of developing varying and online reconfigurable coefficients transfer functions. The main potential of doing so is the possibility of reconfiguring the model according to the actual electrical/thermal environment where the power converter is used. Then, the latter is subdivided into independent switching cells, represented by dedicated RT models that are fully parallelized. Furthermore, using FPGA devices makes it possible to achieve very low latencies and, consequently, a short simulation time step. Previous work was published in this context, where this approach was deeply described and tested with half-bridge DC–DC, full-bridge DC–AC, and multi-level cascaded H-bridge (five-level and nine-level) power converters. This paper recalls the main basics and, more importantly, discusses additional case studies, namely a three-phase voltage source inverter, a half-bridge NPC (neutral-point clamped) inverter, and a three-phase NPC inverter. Full article
(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, Volume II)
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34 pages, 11532 KiB  
Review
Hardware-in-the-Loop Simulations: A Historical Overview of Engineering Challenges
by Franc Mihalič, Mitja Truntič and Alenka Hren
Electronics 2022, 11(15), 2462; https://doi.org/10.3390/electronics11152462 - 08 Aug 2022
Cited by 38 | Viewed by 11978
Abstract
The design of modern industrial products is further improved through the hardware-in-the-loop (HIL) simulation. Realistic simulation is enabled by the closed loop between the hardware under test (HUT) and real-time simulation. Such a system involves a field programmable gate array (FPGA) and digital [...] Read more.
The design of modern industrial products is further improved through the hardware-in-the-loop (HIL) simulation. Realistic simulation is enabled by the closed loop between the hardware under test (HUT) and real-time simulation. Such a system involves a field programmable gate array (FPGA) and digital signal processor (DSP). An HIL model can bypass serious damage to the real object, reduce debugging cost, and, finally, reduce the comprehensive effort during the testing. This paper provides a historical overview of HIL simulations through different engineering challenges, i.e., within automotive, power electronics systems, and different industrial drives. Various platforms, such as National Instruments, dSPACE, Typhoon HIL, or MATLAB Simulink Real-Time toolboxes and Speedgoat hardware systems, offer a powerful tool for efficient and successful investigations in different fields. Therefore, HIL simulation practice must begin already during the university’s education process to prepare the students for professional engagements in the industry, which was also verified experimentally at the end of the paper. Full article
(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, Volume II)
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