J. Low Power Electron. Appl. 2011, 1(2), 277-302; doi:10.3390/jlpea1020277
Article

Design and Analysis of Double-Gate MOSFETs for Ultra-Low Power Radio Frequency Identification (RFID): Device and Circuit Co-Design

1 VIRTUS, School of Electrical and Electronic Engineering, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798, Singapore 2 Shobhit University, Meerut 250110, Uttarpradesh, India 3 Micro Electronics and VLSI Group, Department of Electronics and Computer Engineering Indian Institute of Technology Roorkee, Roorkee 247667, Uttarakhand, India
* Author to whom correspondence should be addressed.
Received: 16 May 2011; in revised form: 29 June 2011 / Accepted: 30 June 2011 / Published: 8 July 2011
(This article belongs to the Special Issue Low Power Design Methodologies and Applications)
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Abstract: Recently, double-gate MOSFETs (DGMOSFETs) have been shown to be more optimal for ultra-low power circuit design due to the improved subthreshold slope and the reduced leakage current compared to bulk CMOS. However, DGMOSFETs for subthreshold circuit design have not been much explored in comparison to those for strong inversion-based design. In this paper, various configurations of DGMOSFETs, such as tied/independent gates and symmetric/asymmetric gate oxide thickness are explored for ultra-low power and high efficient radio frequency identification (RFID) design. Comparison of bulk CMOS with DGMOSFETs has been conducted in ultra-low power subthreshold digital logic design and rectifier design, emphasizing the scope of the nano-scale DGMOSFET technology for future ultra-low power systems. The DGMOSFET-based subthreshold logic improves energy efficiency by more than 40% compared to the bulk CMOS-based logic at 32 nm. Among the various DGMOSFET configurations for RFID rectifiers, symmetric tied-gate DGMOSFET has the best power conversion efficiency and the lowest power consumption.
Keywords: device/circuit co-design; subthreshold logic; ultra low power; asymmetric DGMOSFET; independent gate DGMOSFET; high efficient rectifier for RFID

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MDPI and ACS Style

Vaddi, R.; Agarwal, R.P.; Dasgupta, S.; Kim, T.T. Design and Analysis of Double-Gate MOSFETs for Ultra-Low Power Radio Frequency Identification (RFID): Device and Circuit Co-Design. J. Low Power Electron. Appl. 2011, 1, 277-302.

AMA Style

Vaddi R, Agarwal RP, Dasgupta S, Kim TT. Design and Analysis of Double-Gate MOSFETs for Ultra-Low Power Radio Frequency Identification (RFID): Device and Circuit Co-Design. Journal of Low Power Electronics and Applications. 2011; 1(2):277-302.

Chicago/Turabian Style

Vaddi, Ramesh; Agarwal, Rajendra P.; Dasgupta, Sudeb; Kim, Tony T. 2011. "Design and Analysis of Double-Gate MOSFETs for Ultra-Low Power Radio Frequency Identification (RFID): Device and Circuit Co-Design." J. Low Power Electron. Appl. 1, no. 2: 277-302.

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