J. Low Power Electron. Appl. 2011, 1(2), 303-326; doi:10.3390/jlpea1020303
Article

Using a Voltage Domain Programmable Technique for Low-Power Management Cell-Based Design

Received: 16 May 2011; in revised form: 22 August 2011 / Accepted: 5 September 2011 / Published: 14 September 2011
(This article belongs to the Special Issue Low Power Design Methodologies and Applications)
This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
Abstract: The Multi-voltage technique is an effective way to reduce power consumption. In the proposed cell-based voltage domain programmable (VDP) technique, the high and low voltages applied to logic gates are programmable. The flexible voltage domain reassignment allows the chip performance and power consumption to be dynamically adjusted. In the proposed technique, the power switches possess the feature of flexible programming after chip manufacturing. This VDP method does not use an external voltage regulator to regulate the supply voltage level from outside of the chip but can be easily integrated within the design. This novel technique is proven by use of a video decoder test chip, which shows 55% and 61% power reductions compared to conventional single-Vdd and low-voltage designs, respectively. This power-aware performance adjusting mechanism shows great power reduction with a good power-performance management mechanism.
Keywords: power management; voltage domain programmable; multiple-voltage; low-voltage
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MDPI and ACS Style

Cheng, C.-H. Using a Voltage Domain Programmable Technique for Low-Power Management Cell-Based Design. J. Low Power Electron. Appl. 2011, 1, 303-326.

AMA Style

Cheng C-H. Using a Voltage Domain Programmable Technique for Low-Power Management Cell-Based Design. Journal of Low Power Electronics and Applications. 2011; 1(2):303-326.

Chicago/Turabian Style

Cheng, Ching-Hwa. 2011. "Using a Voltage Domain Programmable Technique for Low-Power Management Cell-Based Design." J. Low Power Electron. Appl. 1, no. 2: 303-326.

J. Low Power Electron. Appl. EISSN 2079-9268 Published by MDPI AG, Basel, Switzerland RSS E-Mail Table of Contents Alert