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Performance Limits of Nanoelectromechanical Switches (NEMS)-Based Adiabatic Logic Circuits
CEA-LETI, Minatec Campus, 17 Rue des Martyrs, Grenoble 38054, France
* Author to whom correspondence should be addressed.
Received: 30 September 2013; in revised form: 29 November 2013 / Accepted: 6 December 2013 / Published: 16 December 2013
Abstract: This paper qualitatively explores the performance limits, i.e., energy vs. frequency, of adiabatic logic circuits based on nanoelectromechanical (NEM) switches. It is shown that the contact resistance and the electro-mechanical switching behavior of the NEM switches dictate the performance of such circuits. Simplified analytical expressions are derived based on a 1-dimensional reduced order model (ROM) of the switch; the results given by this simplified model are compared to classical CMOS-based, and sub-threshold CMOS-based adiabatic logic circuits. NEMS-based circuits and CMOS-based circuits show different optimum operating conditions, depending on the device parameters and circuit operating frequency.
Keywords: nanoelectromechanical switches (NEMS); adiabatic logic circuits
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MDPI and ACS Style
Houri, S.; Poulain, C.; Valentian, A.; Fanet, H. Performance Limits of Nanoelectromechanical Switches (NEMS)-Based Adiabatic Logic Circuits. J. Low Power Electron. Appl. 2013, 3, 368-384.
Houri S, Poulain C, Valentian A, Fanet H. Performance Limits of Nanoelectromechanical Switches (NEMS)-Based Adiabatic Logic Circuits. Journal of Low Power Electronics and Applications. 2013; 3(4):368-384.
Houri, Samer; Poulain, Christophe; Valentian, Alexandre; Fanet, Hervé. 2013. "Performance Limits of Nanoelectromechanical Switches (NEMS)-Based Adiabatic Logic Circuits." J. Low Power Electron. Appl. 3, no. 4: 368-384.