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J. Low Power Electron. Appl. 2013, 3(4), 368-384; doi:10.3390/jlpea3040368

Performance Limits of Nanoelectromechanical Switches (NEMS)-Based Adiabatic Logic Circuits

CEA-LETI, Minatec Campus, 17 Rue des Martyrs, Grenoble 38054, France
Author to whom correspondence should be addressed.
Received: 30 September 2013 / Revised: 29 November 2013 / Accepted: 6 December 2013 / Published: 16 December 2013
(This article belongs to the Special Issue Selected Papers from FTFC 2013 Conference)
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This paper qualitatively explores the performance limits, i.e., energy vs. frequency, of adiabatic logic circuits based on nanoelectromechanical (NEM) switches. It is shown that the contact resistance and the electro-mechanical switching behavior of the NEM switches dictate the performance of such circuits. Simplified analytical expressions are derived based on a 1-dimensional reduced order model (ROM) of the switch; the results given by this simplified model are compared to classical CMOS-based, and sub-threshold CMOS-based adiabatic logic circuits. NEMS-based circuits and CMOS-based circuits show different optimum operating conditions, depending on the device parameters and circuit operating frequency. View Full-Text
Keywords: nanoelectromechanical switches (NEMS); adiabatic logic circuits nanoelectromechanical switches (NEMS); adiabatic logic circuits

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This is an open access article distributed under the Creative Commons Attribution License (CC BY 3.0).

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MDPI and ACS Style

Houri, S.; Poulain, C.; Valentian, A.; Fanet, H. Performance Limits of Nanoelectromechanical Switches (NEMS)-Based Adiabatic Logic Circuits. J. Low Power Electron. Appl. 2013, 3, 368-384.

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J. Low Power Electron. Appl. EISSN 2079-9268 Published by MDPI AG, Basel, Switzerland RSS E-Mail Table of Contents Alert
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