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J. Low Power Electron. Appl. 2013, 3(2), 174-193; doi:10.3390/jlpea3020174
Article

Reconfigurable Threshold Logic Gates using Memristive Devices

, , * , *  and *
Department of Electrical and Computer Engineering, Boise State University, 1910 University Drive, Boise, ID 83725, USA
* Authors to whom correspondence should be addressed.
Received: 4 February 2013 / Revised: 4 April 2013 / Accepted: 25 April 2013 / Published: 24 May 2013
(This article belongs to the Special Issue Selected Papers from SubVt 2012 Conference)
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Abstract

We present our design exploration of reconfigurable Threshold Logic Gates (TLG) implemented using silver–chalcogenide memristive devices combined with CMOS circuits. Results from simulations and physical circuits are shown. A variety of linearly separable logic functions including AND, OR, NAND, NOR have been realized in discrete hardware using a single-layer TLG. The functionality can be changed between these operations by reprogramming the resistance of the memristive devices.
Keywords: memristors; threshold logic gates; reconfigurable circuits memristors; threshold logic gates; reconfigurable circuits
This is an open access article distributed under the Creative Commons Attribution License (CC BY 3.0).
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Rothenbuhler, A.; Tran, T.; Smith, E.H.B.; Saxena, V.; Campbell, K.A. Reconfigurable Threshold Logic Gates using Memristive Devices. J. Low Power Electron. Appl. 2013, 3, 174-193.

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J. Low Power Electron. Appl. EISSN 2079-9268 Published by MDPI AG, Basel, Switzerland RSS E-Mail Table of Contents Alert