Design Principles, Methodologies, and Tools for Processing-in-Memory Architectures

Dear Colleagues,

In the big-data era, the traditional von Neumann computer architecture is suffering from the memory wall bottleneck, which is caused by the huge gap between the performances of memories and computing units. The processing-in-memory (PIM) computing paradigm, by integrating computing resources in or close to the memory to offer a higher memory bandwidth and shorter memory latency, provides a potential solution with which to overcome the memory wall bottleneck. In recent years, researchers have proposed various PIM architectures, as well as some prototype chips, for accelerating some specific applications, especially for deep neural network algorithms, with a higher performance and/or energy efficiency than traditional computer architectures such as CPUs and GPUs.

Although the performance and energy efficiency benefits of PIM have been verified, there remain challenges in designing PIM architectures. Currently, there is a lack of systematic design principles, methodologies, and tools for PIM architectures. This Special Issue aims to address the development of models, principles, methodologies, design automation tools, and software stacks for PIM architectures (including computing-in-memory and near-memory architectures). Topics of interest include (but are not limited to) the following:

• PIM architectures and circuits for new applications;
• General-purpose PIM architectures and circuits;
• New computing models for PIM;
• Software–hardware and cross-layer co-design for PIM;
• Instruction set architecture (ISA) and compiler designs for PIM;
• Design automation tools for PIM, including architecture-level, circuit-level, and physical-level tools, etc;
• Simulation and verification tools for PIM;
• Reliability analysis and enhancement for PIM;
• Task mapping and scheduling for PIM.

Dr. Xiaoming Chen
Guest Editor

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• processing in memory
• architecture
• design methodologies
• design automation tools