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J. Low Power Electron. Appl. 2016, 6(4), 20; doi:10.3390/jlpea6040020

Low Power Design for Future Wearable and Implantable Devices

Department of Engineering, Aarhus University, Aarhus 8000, Denmark
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Author to whom correspondence should be addressed.
Academic Editors: Ka Lok Man, M. L. Dennis Wong and Chao Lu
Received: 25 July 2016 / Revised: 27 September 2016 / Accepted: 12 October 2016 / Published: 20 October 2016
(This article belongs to the Special Issue Recent Advances in Emerging Low Power Circuits and Systems)
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Abstract

With the fast progress in miniaturization of sensors and advances in micromachinery systems, a gate has been opened to the researchers to develop extremely small wearable/implantable microsystems for different applications. However, these devices are reaching not to a physical limit but a power limit, which is a critical limit for further miniaturization to develop smaller and smarter wearable/implantable devices (WIDs), especially for multi-task continuous computing purposes. Developing smaller and smarter devices with more functionality requires larger batteries, which are currently the main power provider for such devices. However, batteries have a fixed energy density, limited lifetime and chemical side effect plus the fact that the total size of the WID is dominated by the battery size. These issues make the design very challenging or even impossible. A promising solution is to design batteryless WIDs scavenging energy from human or environment including but not limited to temperature variations through thermoelectric generator (TEG) devices, body movement through Piezoelectric devices, solar energy through miniature solar cells, radio-frequency (RF) harvesting through antenna etc. However, the energy provided by each of these harvesting mechanisms is very limited and thus cannot be used for complex tasks. Therefore, a more comprehensive solution is the use of different harvesting mechanisms on a single platform providing enough energy for more complex tasks without the need of batteries. In addition to this, complex tasks can be done by designing Integrated Circuits (ICs), as the main core and the most power consuming component of any WID, in an extremely low power mode by lowering the supply voltage utilizing low-voltage design techniques. Having the ICs operational at very low voltages, will enable designing battery-less WIDs for complex tasks, which will be discussed in details throughout this paper. In this paper, a path towards battery-less computing is drawn by looking at device circuit co-design for future system-on-chips (SoCs). View Full-Text
Keywords: low power circuit design; FinFET; sub-threshold region; SRAM; STT-RAM; OpAmp; LNA; energy harvesting; solar energy; ultrasonic harvesting low power circuit design; FinFET; sub-threshold region; SRAM; STT-RAM; OpAmp; LNA; energy harvesting; solar energy; ultrasonic harvesting
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MDPI and ACS Style

Lundager, K.; Zeinali, B.; Tohidi, M.; Madsen, J.K.; Moradi, F. Low Power Design for Future Wearable and Implantable Devices. J. Low Power Electron. Appl. 2016, 6, 20.

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