Special Issue "Reconfigurable Computing Technologies and Applications"

A special issue of Computers (ISSN 2073-431X).

Deadline for manuscript submissions: closed (1 July 2018)

Special Issue Editors

Guest Editor
Professor Neil Bergmann

School of Information Technology and Electrical Engineering, University of Queensland, Brisbane, Australia
Website | E-Mail
Interests: reconfigurable computing; wireless sensor networks; Internet-of-Things; embedded systems; sensor data analytics
Guest Editor
Associate Professor Paul Beckett

School of Electrical and Biomedical Engineering, RMIT University, Melbourne, Australia
Website | E-Mail
Interests: emerging technologies – nanoscale computer architecture; high performance digital logic design; embedded computer architecture; programmable logic synthesis; hardware description languages; VLSI design

Special Issue Information

Dear Colleagues,

Reconfigurable computing bridges the gap between general purpose computers, in which function is determined by software, and Application Specific Integrated Circuits (ASICs), in which single specific functions are built using custom hardware. Reconfigurable computers are built around a set of programmable hardware primitives and a set of programmable interconnection networks. For fine-grained reconfigurable computers, such as FPGAs, the processing elements are logic gates and interconnection networks are switches and wires. For coarse-grained reconfigurable computers, the processing elements are software-configurable processors, and the interconnections use a programmable network-on-chip. Heterogeneous reconfigurable computers combine elements, such as conventional general purpose processors, ASIC elements, such as memories and DSP blocks, and fine-grained programmable logic elements.


This Special Issue is interested in compelling new research results that extend knowledge in all of these areas of reconfigurable computing. Topics include:

  • Devices and Technologies for Reconfigurable Computing
  • Architectures for Reconfigurable Computing
  • Tools and Design Techniques for Reconfigurable Computing
  • Novel Applications of Reconfigurable Computing
  • Surveys and Tutorials of Reconfigurable Computing
  • Education for Reconfigurable Computing

Note that simply implementing a particular application on a reconfigurable computing platform may be good engineering, but is seldom novel research. Applications-based papers especially must emphasize the research contribution of the work.


This Special Issue also specifically invites extended versions of conference papers presented at the "2017 International Conference on Field-Programmable Technology".


Professor Neil Bergmann
Associate Professor Paul Beckett
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All papers will be peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Computers is an international peer-reviewed open access quarterly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 350 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.


  • reconfigurable computing
  • field programmable technologies
  • field programmable gate arrays
  • FPGAs
  • design automation

Published Papers (1 paper)

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Open AccessArticle Comparing the Cost of Protecting Selected Lightweight Block Ciphers against Differential Power Analysis in Low-Cost FPGAs
Received: 1 March 2018 / Revised: 4 April 2018 / Accepted: 9 April 2018 / Published: 23 April 2018
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Lightweight block ciphers are an important topic in the Internet of Things (IoT) since they provide moderate security while requiring fewer resources than the Advanced Encryption Standard (AES). Ongoing cryptographic contests and standardization efforts evaluate lightweight block ciphers on their resistance to power
[...] Read more.
Lightweight block ciphers are an important topic in the Internet of Things (IoT) since they provide moderate security while requiring fewer resources than the Advanced Encryption Standard (AES). Ongoing cryptographic contests and standardization efforts evaluate lightweight block ciphers on their resistance to power analysis side channel attack (SCA), and the ability to apply countermeasures. While some ciphers have been individually evaluated, a large-scale comparison of resistance to side channel attack and the formulation of absolute and relative costs of implementing countermeasures is difficult, since researchers typically use varied architectures, optimization strategies, technologies, and evaluation techniques. In this research, we leverage the Test Vector Leakage Assessment (TVLA) methodology and the FOBOS SCA framework to compare FPGA implementations of AES, SIMON, SPECK, PRESENT, LED, and TWINE, using a choice of architecture targeted to optimize throughput-to-area (TP/A) ratio and suitable for introducing countermeasures to Differential Power Analysis (DPA). We then apply an equivalent level of protection to the above ciphers using 3-share threshold implementations (TI) and verify the improved resistance to DPA. We find that SIMON has the highest absolute TP/A ratio of protected versions, as well as the lowest relative cost of protection in terms of TP/A ratio. Additionally, PRESENT uses the least energy per bit (E/bit) of all protected implementations, while AES has the lowest relative cost of protection in terms of increased E/bit. Full article
(This article belongs to the Special Issue Reconfigurable Computing Technologies and Applications)

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