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J. Low Power Electron. Appl. 2017, 7(3), 19; doi:10.3390/jlpea7030019

Characterization of an ISFET with Built-in Calibration Registers through Segmented Eight-Bit Binary Search in Three-Point Algorithm Using FPGA

1
School of Electrical, Electronics, and Computer Engineering, Mapúa University, Muralla St., Intramuros, Manila 1002, Philippines
2
Department of Electrical Engineering, Chung Yuan Christian University, Chungli 32023, Taiwan
This paper is an extended version of the paper entitled: ISFET with built-in calibration registers through segmented eight-bit binary search in three-point algorithm using FPGA. Proceedings of the 2016 International IEEE SoC Design Conference (ISOCC), Jeju, Korea, 23–26 October 2016.
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Author to whom correspondence should be addressed.
Received: 31 May 2017 / Revised: 10 July 2017 / Accepted: 11 July 2017 / Published: 13 July 2017
(This article belongs to the Special Issue Selected Papers from IEEE ISOCC Conference 2016)
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Abstract

Sensors play the most important role in observing changes in an environment they are a part. They detect even the smallest changes and send the information to other electronic devices. Making sure that these sensors provide an accurate output is equally crucial, as the data it measures and collects are used for analysis. Until now, calibrating sensors has been done manually by following a sequence of procedures, and is usually performed on-site or in a laboratory prior to deployment. To eliminate the manual procedure in the calibration (at the very least), an ion-sensitive field-effect transistor (ISFET) with a built-in calibration registers circuit was created through segmented eight-bit binary search in a three-point algorithm using a field-programmable gate array (FPGA). The circuit was created using a three-point calibration algorithm and three standard buffers (pH 4, pH 7, and pH 10). The block diagram, schematic diagram, and the number of logic gates were derived after synthesizing the Verilog program in Xilinx/FPGA. An average of 0.30% error was computed to prove the reliability of the created circuit using FPGA. Having an ISFET with built-in calibration registers will alleviate the work of experts in performing calibrations. This would follow the plug and play standard, hence its being a calibration-ready ISFET device. With this feature, it could be used as a pH level meter or a remote sensor node in several applications. View Full-Text
Keywords: ISFET; ion sensitive field-effect transistor; calibration; segmented; binary search; pH level; FPGA; three-point algorithm; Verilog ISFET; ion sensitive field-effect transistor; calibration; segmented; binary search; pH level; FPGA; three-point algorithm; Verilog
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This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. (CC BY 4.0).

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MDPI and ACS Style

Manlises, C.O.; Cruz, F.R.; Chung, W.-Y.; Paglinawan, A. Characterization of an ISFET with Built-in Calibration Registers through Segmented Eight-Bit Binary Search in Three-Point Algorithm Using FPGA. J. Low Power Electron. Appl. 2017, 7, 19.

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