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J. Low Power Electron. Appl. 2017, 7(3), 18; doi:10.3390/jlpea7030018

A Summary of the Special Issue “Emerging Network-on-Chip Architectures for Low Power Embedded Systems”

DIEEI, University of Catania, v.le A. Doria 6, Catania, Italy
Received: 20 June 2017 / Revised: 26 June 2017 / Accepted: 26 June 2017 / Published: 29 June 2017
(This article belongs to the Special Issue Emerging Network-on-Chip Architectures for Low Power Embedded Systems)
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The International Technology Roadmap for Semiconductors [1] foresees that the number of processing elements that will be integrated into a system-on-chip will be on the order of thousands by 2020.[...] View Full-Text
This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. (CC BY 4.0).

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Patti, D. A Summary of the Special Issue “Emerging Network-on-Chip Architectures for Low Power Embedded Systems”. J. Low Power Electron. Appl. 2017, 7, 18.

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J. Low Power Electron. Appl. EISSN 2079-9268 Published by MDPI AG, Basel, Switzerland RSS E-Mail Table of Contents Alert
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