Completing the Complete ECC Formulae with Countermeasures
AbstractThis work implements and evaluates the recent complete addition formulae for the prime order elliptic curves of Renes, Costello and Batina on an FPGA platform. We implement three different versions:(1) an unprotected architecture; (2) an architecture protected through coordinate randomization; and (3) an architecture with both coordinate randomization and scalar splitting in place. The evaluation is done through timing analysis and test vector leakage assessment (TVLA). The results show that applying an increasing level of countermeasures leads to an increasing resistance against side-channel attacks. This is the ﬁrst work looking into side-channel security issues of hardware implementations of the complete formulae. View Full-Text
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Chmielewski, Ł.; Massolino, P.M.C.; Vliegen, J.; Batina, L.; Mentens, N. Completing the Complete ECC Formulae with Countermeasures. J. Low Power Electron. Appl. 2017, 7, 3.
Chmielewski Ł, Massolino PMC, Vliegen J, Batina L, Mentens N. Completing the Complete ECC Formulae with Countermeasures. Journal of Low Power Electronics and Applications. 2017; 7(1):3.Chicago/Turabian Style
Chmielewski, Łukasz; Massolino, Pedro M.C.; Vliegen, Jo; Batina, Lejla; Mentens, Nele. 2017. "Completing the Complete ECC Formulae with Countermeasures." J. Low Power Electron. Appl. 7, no. 1: 3.
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