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Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices
Department of Materials Science and Engineering, Stanford University, Stanford, CA 94305, USA
* Author to whom correspondence should be addressed.
Received: 12 May 2012; in revised form: 10 July 2012 / Accepted: 16 July 2012 / Published: 24 July 2012
Abstract: The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.
Keywords: GaN, growth; oxides; high-κ, surfaces; treatments; interface; ALD
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Cite This Article
MDPI and ACS Style
Long, R.D.; McIntyre, P.C. Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices. Materials 2012, 5, 1297-1335.
Long RD, McIntyre PC. Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices. Materials. 2012; 5(7):1297-1335.
Long, Rathnait D.; McIntyre, Paul C. 2012. "Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices." Materials 5, no. 7: 1297-1335.