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Article

Synchronization and Control of a Single-Phase Grid-Tied Inverter under Harmonic Distortion

School of Mechatronic Systems Engineering, Simon Fraser University, Surrey, BC V3T 0A3, Canada
*
Author to whom correspondence should be addressed.
These authors contributed equally to this work.
Electronics 2023, 12(4), 860; https://doi.org/10.3390/electronics12040860
Submission received: 23 December 2022 / Revised: 2 February 2023 / Accepted: 7 February 2023 / Published: 8 February 2023
(This article belongs to the Special Issue Digital Control of Power Electronics)

Abstract

:
Grid-connected inverters in renewable energy systems must provide high-quality power to the grid according to regulatory standards such as the IEEE 1547. To provide high-quality current control when the inverter is connected to a distorted grid, the frequency and phase information of the fundamental harmonic of the grid should be accurately obtained. This paper examines controller design for a single-phase inverter when there is distortion in the grid voltage. The control structure is designed to enhance the quality of the injected current into the grid. To this end, a frequency-locked loop (FLL) sinusoidal tracking controller which is able to reject the grid harmonics is proposed. Thus, the contribution of this paper is a new frequency-locked loop structure with adaptive notch filters that can provide accurate estimation of grid phase and frequency and improve the performance of single-phase inverters working under harmonic distortion. We also present an explanation of how the proposed adaptive nonlinear scheme can be discretized for digital implementation on a microcontroller. Experimental and simulation results are presented to demonstrate the performance of the proposed controller in eliminating distortion and enhancing the quality of the produced power.

1. Introduction

Renewable energy systems are changing traditional methods of power generation by enforcing the distribution and interconnection of the electric power landscape. The natural requirement for this local power generation system, often called the micro-grid, is to be able to react to various conditions of the grid and sustain its stability. Modern power electronics and digital technology enable the development of distributed smart grids which can operate in grid-connected and islanding modes.
To ensure the stability and quality of the power injected into the grid, regulatory policies and standards have been established and dictated to local power generation tiers connected to the grid. For instance, IEEE 1547 [1] requires that the Total Harmonic Distortion (THD) of the injected current to the grid must be below a pre-determined level. However, distortions in grid voltage due to factors such as nonlinear loads can negatively affect conventional synchronization and control methods by reducing the quality of generated power [2,3]. A typical control scheme for a single-phase inverter is shown in Figure 1. The synchronization controller provides grid information (phase and frequency) to a Proportional Resonant (PR) current controller. Frequency information is used to make the PR controller follow the grid frequency changes. In the synchronization task, the voltage harmonics affect the phase/frequency estimation of the grid [4,5]. Therefore, the output current may contain unwanted harmonic distortion. Synchronization methods such as Second Order Generalized Integrator PLL (SOGI-PLL), Inverse Park Transform PLL (IPT-PLL), Synchronous Reference Frame PLL (SRF-PLL), and Double Synchronous Reference PLL (DSRF-PLL) provide partial immunity to high-frequency grid distortions due to their frequency-selective structures (see e.g., [6,7,8,9,10]). One way to attenuate the low-order grid harmonics is to limit the bandwidth of the synchronization controller [7,11]. However, a relatively narrow bandwidth controller (that attenuates the harmonics) slows the speed of synchronization [4,7]. Synchronization speed is of prime importance because grid-tied standards require the micro-grids to cease powering the grid under abnormal conditions such as severe frequency variations.
Synchronization structures such as Enhanced PLL (EPLL) or T/4 Delay PLL do not respond well to high harmonic distortions [10]. The harmonic rejection method presented in [12] was claimed to eliminate the harmonics, but operation under grid frequency variations was not studied. The NTD-PLL introduced in [13] is only immune to distortion at the nominal grid frequency. As stated in [13], ETD-PLL can adapt to grid frequency variations. However, according to [6], this method does not entirely eliminate harmonics. In [14,15] adaptive filtering and prefiltering for SOGI-FLL are used to eliminate harmonics. Nevertheless, in all of the aforementioned cases, the important factor for synchronization is the ability to adhere to the interconnected standards. Aside from grid synchronization, current controllers operating in a polluted grid are affected by the harmonics in the grid voltage. Harmonic Compensation (HC) Controllers were proposed to address this issue [16,17,18].
In this paper, we study the effect of grid distortion on synchronization controllers and propose a new synchronization controller with low distortion and fast dynamics that can adapt to frequency changes of the grid. To this end, we present a new Frequency-Locked Loop (FLL) structure with adaptive notch filters which can withstand grid distortions and provide accurate estimation of the grid frequency and phase. This FLL structure is based on the ES-FLL already proposed in the literature [19]. It is shown that a distorted grid adds unwanted components to the estimated frequency of the FLL if adaptive notch filters are not used. The proposed system with adaptive filters can provide fast synchronization and frequency estimation. The estimated frequency of the grid, which is obtained by the proposed FLL, is used to tune the resonant frequency of the current controller. Because the grid frequency is more stable than its phase [20], determining grid frequency with the proposed FLL would improve the performance of the overall controller. As reported in [21], the maximum frequency deviation in the grid under normal conditions is usually within ± 0.1 Hz, and this is achieved using the proposed method.
The rest of this paper is organized as follows: Section 2 introduces the proposed FLL used as a synchronization block. Section 3 analyzes the FLL’s response to grid distortion. In Section 4, the structure of FLL is modified for utilization in a polluted grid. Section 5 demonstrates a digital implementation of the proposed FLL using the real-time Runge–Kutta solver. Simulation studies are presented in Section 6, followed by experimental results in Section 7. Conclusions are presented in Section 8.

2. Synchronization Using Extremum-Seeking Frequency-Locked Loop (ES-FLL)

In this section, a brief review of the ES-FLL proposed in [19] is presented. For synchronizing the power converter, an adaptive second order filter based on the Internal Model Principle [22] with the following transfer function is proposed (indicated by GI filter in Figure 2):
v v = K f s s 2 + K f s + w ^ 2
where v is the grid voltage, v is the output phase of FLL, K f is the gain of the filter and w ^ is its center frequency, which should be set to the nominal value of the grid frequency.
To provide effective performance during frequency fluctuation of the grid, the center-frequency of the filter should converge to the grid frequency. This is achieved through an extremum-seeking control algorithm, as follows [19].
Considering the input in (1) to be the grid voltage given by
v ( t ) = A g s i n ( w g t )
then the transfer function of the closed-loop error in Figure 2 with respect to the input signal v is given by
e v = s 2 + w ^ 2 s 2 + K f s + w ^ 2 .
Thus, the error signal of the closed-loop GI filter can be obtained as follows
e ( t ) = A e s i n ( w g t + θ )
where
A e = | w ^ 2 w g 2 | ( w ^ 2 w g 2 ) 2 + ( K i w g ) 2 A g .
Now let us define the adaptive law of the ES-FLL as follows
w ^ ˙ = K e s f ( w ^ ) w ^
where
f ( w ^ ) = A e 2 ( w ^ 2 w g 2 ) 2 .
Equation (6) represents an extremum-seeking algorithm [23,24] which moves the variable of interest (i.e., w ^ ) toward the minimum value of objective function f ( w ^ ) .
By considering (5), it can be demonstrated that the objective function in (7) has a minimum value of zero at the grid frequency w g . To implement (7), the error signal in (4) is first squared and then filtered by an notch filter as follows
e 2 | n o t c h 1 2 A e 2 .
Next, to implement (6), this signal is passed through a perturbation extremum-seeking algorithm as shown in Figure 2. The perturbation extremum-seeking scheme operates by adding a sinusoidal perturbation signal to w ^ and then finding the gradient of f ( w ^ ) by multiplying the objective function by the similar perturbation signal. Further details of this method can be found in [23,24].

3. Effect of Grid Distortion on ES-FLL Algorithm

To determine how grid harmonic distortions can affect the proposed extremum-seeking frequency estimation, let us suppose that the grid voltage v g is given by
v g ( t ) = A g s i n ( w g t ) + v h 2 ( t ) + v h 3 ( t )
where
v h 2 ( t ) = A h 2 s i n ( 2 w g t ) , v h 3 ( t ) = A h 3 s i n ( 3 w g t )
are the second and third harmonic components of the grid voltage, respectively. Thus, the closed-loop error of the GI filter in Figure 2 can be expressed as
e ( t ) = A e s i n ( w g t ) + e h 2 ( t ) + e h 3 ( t )
where A e is the error amplitude of the fundamental component and e h 2 and e h 3 are error components due to harmonic distortions as follows:
e h 2 ( t ) = λ h 2 s i n ( 2 w g t ) e h 3 ( t ) = λ h 3 s i n ( 3 w g t ) λ h 2 = | w 0 2 ( 2 w g ) 2 | ( w 0 2 ( 2 w g ) 2 ) 2 + ( 2 K i w g ) 2 A h 2 λ h 3 = | w 0 2 ( 3 w g ) 2 | ( w 0 2 ( 3 w g ) 2 ) 2 + ( 3 K i w g ) 2 A h 3 .
As discussed in Section 2, to calculate f ( w ^ ) the error signal is squared and passed through a notch filter. In the case of harmonic distortion, the error signal is expressed by (11). The result of squaring this signal and passing it through a notch filter is given as follows:
e 2 ( t ) | n o t c h = f ( w 0 ) + 1 2 λ h 2 2 + 1 2 λ h 3 2 + Γ ( w g , 3 w g , 4 w g , 6 w g )
where Γ is the sum of the generated high frequency sinusoidals.
In (12), because the difference between the resonant frequency and harmonic frequencies ( 2 w g and 3 w g ) is large, the following approximations can be made:
λ h 2 A h 1 λ h 3 A h 2 .
Considering (14), (13) can be rewritten as follows:
e 2 ( t ) | n o t c h f ( w 0 ) + 1 2 A h 2 2 + 1 2 A h 3 2 + Γ ( w g , 3 w g , 4 w g , 6 w g ) .
As can be seen from (15), the calculated f ( w ^ ) has some other additional components if the grid voltage contains additional harmonics.
In the proposed adaptive law of (6), the gradient of the f ( w 0 ) should be calculated. In perturbation extremum seeking, this is done by multiplying f ( w ^ ) with the perturbation signal as shown in Figure 2. In the case of a harmonic distorted grid, the calculated f ( w ^ ) and its additional components in (15) are multiplied by the perturbation signal in order to calculate the gradient as follows:
w 0 ˙ ( t ) = d f ( w 0 ) d w 0 + ( 1 2 A h 2 2 + 1 2 A h 3 2 ) A e s c s i n ( w e s c t ) + Γ ( w g , 3 w g , 4 w g , 6 w g ) A e s c s i n ( w e s c t ) .
As can be seen, Equation (16) is different from the proposed adaptive law in (6). Equation (16) contains additional terms due to harmonics presented in the grid. It should be noted that only the first component is contributing to the grid frequency estimation. The other components are generated by harmonic distortions. Because these components are not functions of the resonant frequency, they do not contribute to frequency estimation and actually create a perturbation term, δ p e r t u r b a t i o n , on top of the estimated frequency given by the following expression
δ p e r t u r b a t i o n = w 0 ( t ) + t ( 1 2 A h 2 2 + 1 2 A h 3 2 ) A e s c s i n ( w e s c t ) d t + t Γ ( w g , 3 w g , 4 w g , 6 w g ) A e s c s i n ( w e s c t ) d t .

4. Notch Filters in Synchronization Loop

To remove unwanted distortion from the estimated frequency in (17), notch filters that act at the harmonic distortion frequencies in the synchronization loop, as shown in Figure 3, are proposed. To remove multiple harmonics from the grid, cascaded notch filters can be used as follows.
N ( s ) = n = 2 , 3 , . . s 2 + ( n w ^ ) 2 s 2 + ζ n ( n w ^ ) s + ( n w ^ ) 2
where ζ n is the damping factor of a specific notch filter. Each filter is tuned at a specific grid harmonic frequency.
In (18), the center frequencies of notch filters are tuned to grid frequency variations by using the estimated frequency of the FLL. The frequency response of the proposed FLL in Figure 3 is demonstrated in Figure 4. As can be seen, the estimated phase of the grid effectively attenuates the grid harmonics.
By adding cascaded notch filters, the FLL algorithm uses the error signal after it is passed through the notch filters as shown in Figure 3. The transfer function of this new error signal with respect to the input is defined as follows:
e v = N ( s ) N ( s ) G ( s ) + 1
where e is the output of the cascaded notch filters as shown in Figure 3. Note also that G ( s ) is the open-loop GI filter expressed as
G ( s ) = K f s s 2 + w ^ 2
in which K f is the gain of the GI filter.
In (19), the harmonics of the input are eliminated, and thus the frequency estimation in (17) is eliminated in this new structure. According to [4], most PCC distortions contain only a couple of harmonic frequencies. Thus, by using cascading notch filters, the disturbances analyzed in (17) can be effectively eliminated.

Parameter Tuning

The GI filter gain K f in (1) tunes the harmonic selectivity and bandwidth of the GI filter. To reduce the harmonic distortion, this value can be small; however, it slows down the system’s transient response.
The FLL dynamics in (7) are dependent on the objective function by the GI feedback loop. Therefore, FLL is always slower than the GI feedback loop. For this reason, the gain of the extremum seeking, K e s , is chosen based on the gain of the GI loop. For a fixed value of K f , increasing K e s will make the frequency estimation faster. More information on the parameter tuning of the ES-FLL (trade-offs and limits) is given in [19].
Adding cascaded notch filters will add phase delay to the GI filter loop and change the stability margins of the system. Thus, for the system to be stable, either the gains of the GI and FLL should be reduced, or the damping factor and bandwidth of the notch filters should be small enough to increase the stability margins. On the other hand, damping factors cannot be too small, because the dynamics of harmonics rejection are dependent on them. Such trade-offs have to be considered when designing the system.

5. Digital Implementation

The proposed synchronization block with harmonic damping notch filters is a nonlinear dynamic system which can be described by ten state-space equations as follows:
x 1 ˙ = x 2 x 2 ˙ = ( u x 2 x 10 x 8 ) K x 1 [ 2 π x 3 + A e s c s i n ( x 6 ) ] 2 x 3 ˙ = 2 ( u x 2 x 10 x 8 ) 2 x 5 s i n ( x 6 ) K e c s x 4 ˙ = x 5 x 5 ˙ = 2 ξ w n ( u x 2 x 10 x 8 ) 2 w n 2 x 4 2 ξ w n x 5 x 6 ˙ = 1000 π x 7 ˙ = x 8 x 8 ˙ = γ 2 w 2 ( u x 2 x 10 ) w 2 γ 2 x 8 w 2 2 x 7 x 9 ˙ = x 10 x 10 ˙ = γ 1 w 1 ( u x 2 ) w 1 γ 1 x 10 w 1 2 x 9
where ξ and w n are the damping factor and resonant frequency of the notch filter used inside the extremum-seeking loop; γ 1 , γ 2 are the damping factors of the harmonic damping notch filters used in the resonant filter feedback loop; w 1 and w 2 are resonant frequencies of the harmonic damping notch filters tuned at second and third harmonic frequencies, which are adapted via the estimated frequency of FLL as follows:
w 1 = 2 π ( 2 x 3 ) w 2 = 2 π ( 3 x 3 )
in which x 3 is the third state in (21) and represents the estimated frequency of FLL.
Equation (21) presents a nonlinear system that cannot be discretized by linear z-domain techniques. For implementing this algorithm on an embedded microcontroller, a real time Runge–Kutta fourth order algorithm was used, as follows:
x n + 1 = x n + h 6 ( V 1 + 2 V 2 + 2 V 3 + V 4 )
where h is the discretization time-step and other terms are given by
V 1 = f x ( t n ) , u ( t ) w h e n t = t n V 2 = f x ( t n ) + h 2 V 1 , u ( t ) w h e n t = t n + h 2 V 3 = f ( x ( t n ) + h 2 V 2 , u ( t ) ) w h e n t = t n + h 2 V 4 = f ( x ( t n ) + h V 3 , u ( t ) ) w h e n t = t n + h .

Implementation of Real-Time Runge–Kutta Solver

The critical point in implementing the real-time Runge–Kutta fourth order (RK4) ordinary differential equation solver is to consider the time that each of the four parameters in (24) should be calculated. Thus, calculations are divided into three tasks based on their time constraints, as follows:
( 1 ) Calculate V 1 if t = 0 ( 2 ) Calculate V 2 , V 3 if t = t n + ( n ) h 2 ( 3 ) Calculate V 4 Update States Calculate V 1 if t = t n + ( n ) h
where n is an integer, demonstrating the discretized time-step.
The flow of the program, based on the task numbers in (25), is expressed as follows:
( 1 ) Initialization ( 2 ) middle point ( 3 ) state update ( 2 ) middle point . . .
As can be seen in (25) and (26), task 1 is only called once, at the initialization of the program, where there is no previous state to be updated. After that, the flow of the program is switched between tasks 2 and 3 as time progresses.
This algorithm is implemented in real time using an embedded microcontroller. The control algorithm is executed each time a CPU timer interrupt happens.
To manage which task is to be executed along with the rest of the program, the RK4 real-time solver can be modeled as a state machine as shown in Figure 5. As can be seen, there are three states associated with three tasks. Each time a timer interrupt happens, the state of the solver is changed based on the sequence of tasks associated with the solver in (26).

6. Simulation Studies

Simulation studies were conducted to analyze the performance of the proposed FLL as demonstrated in Figure 3. The system was working in a simulated polluted grid with unwanted harmonics. The control systems were modeled using Matlab/Simulink.
The response of the proposed ES-FLL-ED to grid distortions is demonstrated in Figure 6. Three cascaded notch filters are used in the ES-FLL filter loop, tuned at the second, third and fourth harmonic frequencies. At 0.25 s, the grid was distorted by 10 % second harmonic, 7 % third, and 6 % fourth harmonic. As can be seen in Figure 6, by adding distortion, the feedback error signal e(t) is distorted.
However, as shown in Figure 3, when the error signal is passed through the cascaded notch filters, it becomes distortion-free. The output of the notch filters is defined as e’(t), which is the error signal without distortions. By comparing e(t) and e’(t) in the simulation results of Figure 6, it can be seen that the distortion is eliminated by notch filters (e’(t) does not contain any distortion). This signal, e’(t), is then used to accurately calculate the frequency of the grid as demonstrated in Figure 3.
The time it takes for e’(t) (the error passed through the notch filters) to eliminate harmonics depends on the damping factor selected for the notch filters. The parameters for the proposed FLL were selected according to the tuning trade-off described in Section 4, as shown in Table 1. At 0.35 s, a 45-degree phase jump is added; at 0.5 s, the response of the FLL to 20 % voltage sag is demonstrated.
At 0.65 s, the frequency of the grid was changed to 55 Hz, and the system was able to follow the grid frequency accuracy. Because the notch filters were adaptive, their output signal e’(t) did not have distortions, and thus the estimated frequency was ripple-free.
At 0.85 s, 5 % inner harmonic at a frequency of 330 Hz and 5 % subharmonic at the frequency of 10 Hz were added to the grid. When subharmonic and inner harmonic distortions are added, notch filters are not able to completely eliminate them and therefore the error signal at the output of the notch filters, e’(t), contains subharmonic and inner harmonic distortion. However, e’(t) still has lower distortion compared with the error signal before passing through the notch filters which is denoted by e(t).
Because the GI filter is a second order frequency-selective filter, the harmonics at the input signal, denoted by v(t), did not add significant distortion to the estimated phase by the FLL, denoted by v’(t), as shown in the Bode diagram in Figure 4. At the subharmonic and inner harmonic frequencies, the output signal v’(t) provides more than 30 dB attenuation with the chosen gain for the GI filter (Table 1). These simulations demonstrate the effectiveness of the proposed method in removing the unwanted components from the calculated phase/frequency of the grid.
Considering the same harmonic distortions in the grid, the frequency estimation response of the proposed FLL with harmonic damping filters is compared to the response of SOGI-FLL as shown in Figure 7. As shown, if the grid contains harmonics, SOGI-FLL’s frequency tracking accuracy is significantly reduced. In addition, the output phase of the SOGI filter has 5 % THD. As can be seen, ES-FLL (which does not use notch filters) contains distortions on top of the estimated frequency as analyzed in (17). The effect of harmonic distortions on the overall current control scheme of Figure 1 was tested using the Simulink PowerSim library. A PR current controller and a couple of Harmonic Compensation (HC) filters were developed as suggested in the literature, and the proposed FLL was used to synchronize the inverter with a polluted grid containing the same harmonic distortions as mentioned above. As mentioned in [16,17,18], the PR controller cannot compensate the grid harmonics due to its limited bandwidth; thus, additional HC filters are crucial to eliminate the harmonics in the output current. The THD of the output current with the proposed FLL (when using HC filters in the current control loop) was below 1 % , while the THD of the grid was 13.6 % .

7. Implementation and Experimental Results

The experimental setup is shown in Figure 8. A two-leg full-bridge inverter was implemented using a TI DRV8305 board. To emulate the grid voltage and its distortions, three AC programmable sources (GW INSTEK), one for the fundamental component and the other two for emulating distortions, were connected together via an adder circuit. A linear power operational amplifier (Power Amp Design’s PAD127 OPAMP) was used to emulate 4-quadrant high power grid voltage. Grid voltage and output current were fed to the controller using sensor boards which provide accurate sinusoidal readings and isolate their input and output. The digital controller was implemented in Matlab Embedded Coder using a C2000 Delfino TMS320F28335 MCU inside the floating-point TMS320F28335 experimenter kit with a clock speed of 150 MHz.
To experimentally validate the results, 5 % 2nd harmonic and 13 % 3rd harmonic (overall grid voltage THD of 14 % ) were added to the grid voltage to emulate distortion. The calculated frequency was monitored at the output of the synchronization block in steady state by SCI communication of the embedded controller with a Matlab Host on a PC. As expected, FLL without cascaded notch filters produced ripples on the calculated frequency as shown in Figure 9a. Adding two notch filters at the second and third harmonics in the synchronization loop effectively attenuated the ripples, as shown in Figure 9b. These results confirm the analysis in Section 3 and the simulation results in Figure 6.
To ensure the quality of the injected power into the grid, Harmonic Compensation (HC) blocks were added to the PR controller. Thus, the grid voltage harmonics do not affect the grid current harmonics. For this particular controller, the second, third, and fifth frequencies were compensated. The response of the control system is shown in Figure 10. The harmonic spectrum of grid voltage and output current, measured via a PA1000 Tektronix power analyzer, is demonstrated in Figure 10a,b. The voltage and current waveform is shown in Figure 10c. As can be seen, although the emulated grid voltage is distorted, the THD of the output current is 3 % which indicates a good quality output current. Without using harmonic compensations in the current controller and notch filters in the FLL synchronization block, the THD of the output current was increased to 8.7 % , which is above the THD requirement of IEEE 1547 for output current (below 5 % THD).
The parameters of the adaptive scheme should be tuned by making a trade-off between the stability of the system and the transient response in estimating the phase/frequency of the grid. To this end, the parameters must be selected such that the resonant feedback loop of the FLL is much faster than the extremum-seeking loop. Thus, the gain of the resonant filter should be set as sufficiently large, although high values of this gain can make the frequency estimation loop sensitive to phase jumps in the grid voltage.

8. Conclusions

In this paper, the design of a new frequency-locked loop (FLL) scheme using adaptive notch filters and extremum-seeking control, able to achieve accurate estimation of the grid frequency, was presented. The effects of grid distortions on the synchronization FLL and on the quality of injected current were studied through simulation and experimental studies. The proposed control scheme can perform in an emulated polluted grid by reducing distortions in the output current. The performance of the proposed scheme was studied under distorted grid conditions, and adaptive filters were added to its structure for removing the unwanted components from the estimated frequency and phase of the grid. Due to its adaptive nature, the FLL estimation scheme can work effectively in the face of frequency variations of the grid. The experimental and simulation results demonstrate the effectiveness of the proposed synchronization method in providing grid frequency and phase information to create high-quality current at the output of the inverter when the grid voltage contains harmonic distortions. Suggested future research would include extension of the adaptive scheme to the case of three-phase FLLs and utilization of other methods such as fuzzy, neural, and neurofuzzy algorithms. Furthermore, this work considered the design of adaptive notch filters to handle only the second and third harmonics. In many applications, the amplitudes of harmonic voltages drop significantly beyond the third harmonic. As such, one may neglect their effects depending on the parameters of the grid and regulations related to total harmonic distortion. However, if required, the same adaptive scheme can be extended in order to build notch filters to further reduce higher harmonics. The above issues are worthy of investigation in future research.

Author Contributions

Conceptualization, K.S. and M.M.; methodology, M.M.; software, K.S.; validation, K.S., M.M.; formal analysis, K.S.; investigation, K.S.; resources, M.M.; data curation, K.S.; writing original draft preparation, K.S.; writing review and editing, K.S., M.M.; visualization, K.S.; supervision, M.M.; project administration, M.M.; funding acquisition, M.M. All authors have read and agreed to the published version of the manuscript.

Funding

This research was supported by the Natural Sciences and Engineering Research Council of Canada under the Discovery Grants Program.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Control system blocks of a single-phase inverter connected to a polluted grid (PCC: Point of Common Coupling).
Figure 1. Control system blocks of a single-phase inverter connected to a polluted grid (PCC: Point of Common Coupling).
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Figure 2. Extremum-seeking FLL.
Figure 2. Extremum-seeking FLL.
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Figure 3. Block diagram of the proposed ES-FLL with harmonic damping notch filters in the loop.
Figure 3. Block diagram of the proposed ES-FLL with harmonic damping notch filters in the loop.
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Figure 4. Frequency response of the ES-FLL with harmonic damping (ES-FLL-HD).
Figure 4. Frequency response of the ES-FLL with harmonic damping (ES-FLL-HD).
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Figure 5. Timing diagram related to the real-time implementation of the Runge-Kutta fourth order solver.
Figure 5. Timing diagram related to the real-time implementation of the Runge-Kutta fourth order solver.
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Figure 6. Simulation results showing the response of ES-FLL-HD subject to harmonic distortion, phase jump, voltage sag, frequency change, and inner and sub-harmonics.
Figure 6. Simulation results showing the response of ES-FLL-HD subject to harmonic distortion, phase jump, voltage sag, frequency change, and inner and sub-harmonics.
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Figure 7. Comparison of simulation results for the proposed FLL and SOGI-FLL during grid harmonic distortion.
Figure 7. Comparison of simulation results for the proposed FLL and SOGI-FLL during grid harmonic distortion.
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Figure 8. Experimental setup: (a) Block diagram of hardware components, (b) Picture of the hardware, (c) Power OPAMP circuit.
Figure 8. Experimental setup: (a) Block diagram of hardware components, (b) Picture of the hardware, (c) Power OPAMP circuit.
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Figure 9. FLL frequency estimation of a distorted grid monitored by real-time SCI communication: (a) Proposed control scheme without harmonic damping and regulation, (b) Proposed system with harmonic damping and regulation.
Figure 9. FLL frequency estimation of a distorted grid monitored by real-time SCI communication: (a) Proposed control scheme without harmonic damping and regulation, (b) Proposed system with harmonic damping and regulation.
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Figure 10. (a) Harmonic spectrum of emulated grid voltage, (b) Harmonic spectrum of output current, (c) Voltage and current waveforms (time: 5 ms/unit, voltage: 10 volts/unit, current: 2 amps/unit).
Figure 10. (a) Harmonic spectrum of emulated grid voltage, (b) Harmonic spectrum of output current, (c) Voltage and current waveforms (time: 5 ms/unit, voltage: 10 volts/unit, current: 2 amps/unit).
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Table 1. Parameters of proposed FLL.
Table 1. Parameters of proposed FLL.
Control System Parameters
GI filter gain K f 200
Notch filters damping factors ζ n 0.1
Extremum-seeking gain K e s −152,000
Extremum-seeking perturbation frequency500 Hz
Extremum-seeking perturbation amplitude2
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Seifi, K.; Moallem, M. Synchronization and Control of a Single-Phase Grid-Tied Inverter under Harmonic Distortion. Electronics 2023, 12, 860. https://doi.org/10.3390/electronics12040860

AMA Style

Seifi K, Moallem M. Synchronization and Control of a Single-Phase Grid-Tied Inverter under Harmonic Distortion. Electronics. 2023; 12(4):860. https://doi.org/10.3390/electronics12040860

Chicago/Turabian Style

Seifi, Kamyar, and Mehrdad Moallem. 2023. "Synchronization and Control of a Single-Phase Grid-Tied Inverter under Harmonic Distortion" Electronics 12, no. 4: 860. https://doi.org/10.3390/electronics12040860

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