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Electronics 2012, 1(1), 23-31; doi:10.3390/electronics1010023

Article
Radiation Effects in Carbon Nanoelectronics
Cory D. Cress 1,*, Julian J. McMorrow 2, Jeremy T. Robinson 1, Brian J. Landi 3, Seth M. Hubbard 4 and Scott R. Messenger 1
1
Electronics Science & Technology Division, U.S. Naval Research Laboratory, Washington, DC 20375, USA
2
Global Strategies Group (North America) Inc., Crofton, MD 21114, USA
3
Chemical & Biomedical Engineering Department, Rochester Institute of Technology, Rochester, NY 14623, USA; Email: bjlsps@rit.edu
4
Physics Department, Rochester Institute of Technology, Rochester, NY 14623, USA; Email: smhsps@rit.edu
*
Author to whom correspondence should be addressed; Email: carbon.nanoelectronics@nrl.navy.mil; Tel.: +1-202-767-3462; Fax: +1-202-404-7194.
Received: 27 April 2012; in revised form: 15 June 2012 / Accepted: 19 June 2012 /
Published: 3 July 2012

Abstract

: We experimentally investigate the effects of Co-60 irradiation on the electrical properties of single-walled carbon nanotube and graphene field-effect transistors. We observe significant differences in the radiation response of devices depending on their irradiation environment, and confirm that, under controlled conditions, standard dielectric hardening approaches are applicable to carbon nanoelectronics devices.
Keywords:
single walled carbon nanotubes; graphene; total ionizing dose; TID; radiation hardening; FET; SWCNT; carbon nanoelectronics

1. Introduction

The unique properties of carbon nanomaterials, in particular single-walled carbon nanotubes (SWCNTs) and graphene, have garnered much attention due to their potential incorporation into high-performance devices. Recent laboratory-demonstrated threshold frequencies of 80 GHz (SWCNT based) and 100 GHz (graphene based) field-effect transistors (FETs) establish their position among extremely high-mobility materials. Their high mobility and unique ambipolar transport behavior may also prove useful in other analog devices such as power amplifiers, high-frequency mixers, and radio receivers [1]. It is clear that carbon nanoelectronics will enable, in the near future, leap-ahead technologies to address the needs of terrestrial and space-bound systems. Therefore, it is imperative that the radiation response and methods for radiation hardening be considered in parallel with device development to ensure reliability in harsh environments.

Many theoretical and experimental studies of SWCNTs, and to a lesser extent graphene, have investigated the effects of ionizing radiation on the crystalline structure of these materials [2,3,4]. The results indicate that ionizing radiation can damage the crystalline lattice by creating defects, although the defect formation probability strongly depends on the energy, mass, and angle of the incident ionizing radiation. Recent studies which monitor the electronic transport properties of carbon-based FETs support these conclusions, that is, a high tolerance to proton irradiation (e.g., SWCNT-FETs [5,6], graphene-FETs [7]) or high-energy photon irradiation (e.g., SWCNT [8,9,10,11], graphene-FETs [12,13,14]), where the transport properties of the carbon nanostructures are maintained. However, the overall device response to irradiation is mixed. Some studies show enhanced drain currents (e.g., [7,10]), or insignificant performance changes [5], while others report dramatic changes in device behavior including large shifts in threshold voltage [9]. These assorted results motivate the need for utilizing standardized test structures and controlling the experimental conditions to allow for a systematic evaluation of the radiation response of the materials and devices independent of extrinsic effects.

In the current study, we illustrate the sensitivities of carbon nanoelectronic devices to total ionizing dose (TID) effects caused by both intrinsic and extrinsic factors. We begin by comparing the effects of TID on a back-gated graphene FET irradiated in vacuum and in air. We then highlight an approach to increasing the performance and radiation tolerance of SWCNT thin-film-transistors (TFTs) using thinned, high-κ gate dielectrics.

2. Experimental Section

We employ various device structures to achieve the goals listed above, all of which are processed utilizing the NRL NanoScience Institute cleanroom facilities. The preparation of SWCNT thin films (98% semiconducting-enriched, NanoIntegris, Inc.) and subsequent SWCNT-TFT photolithographic processing closely follow our previously reported procedure found in ref. [8,11]. For our back-gated graphene FETs, we grow and transfer graphene films following methods described by Li et al. [15] and use similar photolithographic processing as in Reference [8]. Briefly, graphene is grown using chemical vapor deposition (CVD) on Cu foils at 1000 °C in a horizontal tube furnace in flowing H2 and CH4. Following growth, graphene is transferred using the following steps: (i) spin-on a protective poly(methyl methacrylate) (PMMA) film; (ii) etch the Cu foil; (iii) transfer the floating PMMA-coated graphene to a substrate of choice; and (iv) remove the PMMA by submersion in an acetone bath. The use of transferred films in the preparation of devices allows us to change the substrate material and structure independently from the carbon nanomaterials. We perform Raman spectroscopy (laser wavelength of 532 nm) of the graphene channel material pre- and post Co-60 irradiation to assess changes in defect concentration in graphene.

2.1. Back-Gated Device Structures

The standard back-gated structure depicted in Figure 1a is commonly used to study the electrical transport properties of SWCNTs and graphene. The structure allows for rapid fabrication of devices with variable dimensions. Furthermore, any semiconductor or metal substrate with an insulating dielectric layer may serve as the global back-gate electrode to modulate the Fermi level of the carbon active layer. The devices studied here use thermally grown SiO2 on p+-Si as the starting substrate.

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Figure 1. (a) Schematic depicting a standard back-gated graphene field-effect transistor (FET) and (b) a locally etched back-gated FET structure with a deposited dielectric layer. For the single-walled carbon nanotube (SWCNT)-thin-film-transistors (TFTs), a thin mesh of SWCNTs replaces the graphene film depicted here.

Click here to enlarge figure

Figure 1. (a) Schematic depicting a standard back-gated graphene field-effect transistor (FET) and (b) a locally etched back-gated FET structure with a deposited dielectric layer. For the single-walled carbon nanotube (SWCNT)-thin-film-transistors (TFTs), a thin mesh of SWCNTs replaces the graphene film depicted here.
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Though versatile, these back-gated structures are not optimized for high performance since they typically have thick dielectric layers (>1000 Å) resulting in low gate capacitance, and thus, require biases of tens-of-volts to fully saturate or pinch-off the drain current. Furthermore, thick dielectric layers are highly susceptible to radiation induced charge build-up, which is known to cause threshold voltage shifts and increased leakage in metal oxide semiconductor (MOS) devices [16]. To mitigate these effects, we locally etch the dielectric layer in the active region of the back-gated FET, which is depicted in Figure 1b. We then deposit a gate dielectric material (e.g., Al2O3 or Si3N4; depicted in red in Figure 1b) over the entire substrate with a thickness controlled by growth. This design feature is important since high quality dielectric layers deposited directly onto SWCNTs or graphene for use as a top gate electrode are still under development. Using the locally etched back-gated (LEBG) structure allows us to maintain the properties of the transferred carbon nanomaterial channel, and have flexibility in the choice and processing performed on the dielectric layer prior to transferring the channel material and fabricating devices.

2.2. SiO2 Local Etching

We pattern the channel regions of the LEBG devices using standard photolithographic procedures. These substrates are etched for 1–3 min in buffered oxide etch (BOE) (7:1 NH4F:HF), followed by a short ~1 min rinse in flowing deionized water. This etchant produces smooth hydrogen-terminated Si terraces [17,18], thereby providing a controlled surface for subsequent dielectric layer deposition.

2.3. Si3N4 Plasma Enhanced Chemical Vapor Deposition (PECVD)

We deposit Si3N4 films on LEBG substrates and BOE etched control wafers for optical and electrical characterization using an Oxford Instruments PlasmaPro™ System 100. Freshly prepared substrates are loaded, pumped to 5 × 10−6 Torr and preheated to 350 °C for 10 min. Si3N4 deposition proceeds at a pressure of 2 Torr with an N2 carrier gas, and SiH4 and NH4 as the Si and N precursors, respectively. We obtain an index of refraction of 1.97 at 633 nm based on fitted reflectance measurements indicating nearly stoichiometric Si3N4. Following SWCNT thin-film deposition, annealing the structures in air at 300 °C for 16 h introduces oxygen into the nitride layer transforming it into silicon oxynitride (SiON) with an index of refraction of 1.75 at 633 [11]. On control samples, we deposit Ti/Au contact pads to perform capacitance and electrical breakdown measurements. For a 23 nm SiON film we obtained an average dielectric constant of εr = 5.5 at 1 MHz and dc-breakdown fields in excess of 8 MV/cm [11].

2.4. Al2O3 Atomic Layer Deposition (ALD)

We deposit Al2O3 films on LEBG substrates and BOE etched control wafers for optical and electrical characterization using an Oxford Instruments FlexAL® system. In a similar fashion as the Si3N4 we deposit Al2O3 on freshly prepared substrates, which are loaded, pumped, and preheated to 300 °C. The growth proceeds at this temperature as trimethyl aluminum (TMA) the Al precursor and oxygen plasma are alternatingly pulsed into the growth chamber. We deposited Ti/Au contact pads to perform capacitance and electrical breakdown measurements. For a 32 nm Al2O3 film we obtained an average dielectric constant of εr = 8.3 at 1 MHz and dc-breakdown fields in excess of 10 MV/cm.

3. Results and Discussion

3.1. Characterizing Air Sensitivity of Carbon Electronics

We recently observed that the response of SWCNT-TFTs to Co-60 exposure is highly dependent on the local environment of the device during irradiation [8]. We report here a similar experiment on a standard back-gated graphene FET with a 250 nm SiO2 gate oxide, channel length of 15 µm, channel width of 60 µm, and a positive gate bias of 5 V during irradiation. Figure 2a illustrates the TID dependent transfer characteristics of the wire bonded standard back-gated graphene FET measured in static vacuum. We measured the pre-irradiation transfer characteristics (black trace labeled 0 krad(Si)) immediately before the first TID exposure (1 krad = 10 Gy). We performed control measurements which yielded constant transfer characteristics for the device held in the sample chamber under static vacuum prior to irradiation. We observe a large shift in the transfer characteristics (towards negative Vg) following a TID of 20 krad(Si), which proceeds with further dosing. Following a TID of 40 krad(Si), the Dirac point becomes apparent at Vg = 73 V along with the onset of the electron transport for Vg > 73 V. These results are consistent with hole trapping in the SiO2, which increases the Fermi level closer to mid-gap. Following the initial Co-60 irradiation up to 5 Mrad(Si), we exposed the device to air for 15 m then repeated the experiment with the same device in an air ambient as shown in Figure 2b. During the 15 m repose, the transfer characteristics shift towards positive gate voltage, resulting from room temperature annealing of the radiation-induced trapped charges and due to adsorption of molecular species from the air. Additional irradiation in an air ambient causes the transfer characteristics to shift further towards positive gate bias, the opposite of what we observed when irradiated under vacuum. This indicates that molecular species from the air, namely oxygen and water, overpower the effects of SiO2 trapped holes and decrease the Fermi level promoting hole doping in the channel [14].

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Figure 2. (a) Transfer characteristics of a back-gated graphene-FET with incremental total ionizing dose; (b) Transfer characteristics of the same device following 15 min of air exposure (black curve) and with additional total ionizing dose (TID).

Click here to enlarge figure

Figure 2. (a) Transfer characteristics of a back-gated graphene-FET with incremental total ionizing dose; (b) Transfer characteristics of the same device following 15 min of air exposure (black curve) and with additional total ionizing dose (TID).
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Using the standard long-channel field effect mobility equation: Electronics 01 00023 i001, where Electronics 01 00023 i002 is the channel length, Electronics 01 00023 i003 is the width, Electronics 01 00023 i004 is the oxide capacitance, Electronics 01 00023 i005 is the drain current, and Electronics 01 00023 i006 is the gate voltage, we calculate the peak Electronics 01 00023 i007 from the transfer curves as plotted verses TID in Figure 3a for the graphene FET irradiated in vacuum and air. When irradiated in vacuum, the hole Electronics 01 00023 i007 initially degrades from 1090 cm2/Vs to 980 cm2/Vs following a TID of 200 krad(Si), recovers slightly then degrades again reaching a minimum mobility of 896 cm2/Vs after a TID of 5 Mrad(Si). During the 15 m repose, the mobility recovers considerably from the low of 896 cm2/Vs increasing to 1126 cm2/Vs exceeding the pre-irradiation mobility. With increasing TID exposure in air, the mobility decreases to 907 cm2/Vs after a TID of 100 krad(Si), then after a brief plateau, degrades to 663 cm2/Vs following a total (additional) TID of 5 Mrad(Si) in air.

We also plot the variation in Electronics 01 00023 i008 with TID for the transfer curves measured in vacuum in Figure 3a (lower right y-axis). In this figure, Electronics 01 00023 i008 displays non-monotonic behavior that approximately follows that of the mobility (measured in vacuum). The Electronics 01 00023 i008, for devices of these dimensions, provides a relative measure of the charge inhomogeneity at the graphene-substrate interface resulting from trapped charges in SiO2 [19] and adsorbed impurities including oxygen, moisture, and photoresist residues [20]. The initial decrease in Electronics 01 00023 i008 with TID reflects the increasing trapped charge density and magnitude of charge potential fluctuations (i.e., electron-hole puddles) within the graphene channel. These fluctuations restrict current flow in the graphene channel, which favors transport through regions of unperturbed potential, and is expected to reduce the mobility as we observe. Following a TID of 200–500 krad(Si), the Electronics 01 00023 i008 and Electronics 01 00023 i007 begin to recover. We attribute this behavior to a reorganization of the potential fluctuations in the graphene, potentially resulting in a correlated charge distribution in the SiO2 [21] or rearrangement of mobile surface adsorbates, though additional work is needed to confirm this mechanism.

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Figure 3. (a) Field effect mobility as a function of TID for a graphene-FET irradiated in vacuum (blue, open circles) and in air (red, open squares), along with the minimum conductivity (i.e., the conductivity at the Dirac point) for the transfer characteristics measured in vacuum; (b) Representative Raman spectra of the graphene FET both pre- and post 10 Mrad(Si) irradiation.

Click here to enlarge figure

Figure 3. (a) Field effect mobility as a function of TID for a graphene-FET irradiated in vacuum (blue, open circles) and in air (red, open squares), along with the minimum conductivity (i.e., the conductivity at the Dirac point) for the transfer characteristics measured in vacuum; (b) Representative Raman spectra of the graphene FET both pre- and post 10 Mrad(Si) irradiation.
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In Figure 3b we provide characteristic pre- and post 10 Mrad(Si) Co-60 irradiation Raman spectra of the graphene device measured in Figure 2. We measure a 2D-band (2670 cm−1) to G-band (1580 cm−1) peak intensity ratio of 1.5, which is characteristic of single layer graphene on SiO2 [22]. The D-band mode (~1345 cm−1) results from disorder in the graphene, potentially arising from defects, edges, wrinkles, or residual PMMA resist, but the relatively low intensity indicates the disorder is minimal. Furthermore, we observe no significant difference in the D-band intensity following irradiation indicating that the changes observed in the graphene FETs due to Co-60 irradiation result from trapped charges in the SiO2 gate oxide and not due to changes in lattice defect concentration. These results are consistent with our recent study on SWCNTs-TFTs and emphasize the need to control the environmental conditions of carbon electronics, especially when investigating the basic radiation response mechanisms [8]. Furthermore, the controlled environment results (vacuum data) confirm that, like Si MOS-FETs, carbon electronics are susceptible to the oxide trapped charge effects necessitating the development of radiation-hardened gate dielectrics.

3.2. SiON and Al2O3 Gate Dielectrics with the Locally Etched Back-Gated Structure (SWCNT-TFTs)

In Figure 4a we compare the transfer characteristics of two LEBG SWCNT-TFTs with either a 32 nm SiON or a 32 nm Al2O3 gate dielectric layer, 2 µm channel lengths, and 32 µm channel widths. Both devices are representative of the devices with drain current Id,on/Id,off greater than 104 (about 20 devices for each gate dielectric). For both dielectric layers, we see a maximum drain current of 1 × 10−7 A and a consistently lower minimum drain current for the SiON (about 10× lower). The larger off-current may result from the onset of electron transport in the Al2O3 device reflecting the ambipolar transport properties of SWCNTs [23]. A different level of adsorbed water due to the different surface energies of Al2O3 and Si3N4 may cause this, which is supported by the fact that similar ambipolar behavior is observed in LEBG SWCNT-TFTs with a SiON gate dielectric following vacuum annealing at 125 °C and 1 × 10−5 Torr (see Figure 4b).

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Figure 4. (a) Transfer characteristics of SWCNT-TFTs with 32 nm Al2O3 (red) and with 32 nm SiON (green) gate dielectric layers; (b) The radiation response of SWCNT-TFT with a 23 nm SiON gate dielectric layer.

Click here to enlarge figure

Figure 4. (a) Transfer characteristics of SWCNT-TFTs with 32 nm Al2O3 (red) and with 32 nm SiON (green) gate dielectric layers; (b) The radiation response of SWCNT-TFT with a 23 nm SiON gate dielectric layer.
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In Figure 4b we investigate the effects of Co-60 irradiation for a LEBG SWCNT-FET with a 23 nm SiON gate oxide and channel length and width of 2 µm and 16 µm, respectively, biased with a 0.25 MV/cm gate field during irradiation. By scaling the gate dielectric material to 23 nm we observe essentially no effect of Co-60 irradiation on the transfer characteristics up to a TID of 2 Mrad(Si). We observe a maximum shift in the threshold voltage of −0.25 V at a TID of 100 krad(Si) after which the transfer characteristics begin to shift back towards positive Vg values. The stability in Vg results from lower trapped charge accumulation in the thin SiON layer—the thinner layer allows more carriers to escape by tunneling or through field assisted transport [24]. Furthermore, the trapping characteristics of SiON are distinct from SiO2 and favor electron trapping over hole trapping [16]. Therefore, we attribute the positive shift in threshold voltage to electron traps in the SiON [11], although it is not possible to completely rule out some molecular doping during irradiation in static vacuum conditions.

The data we have presented here is promising evidence towards hardening carbon nanoelectronics against TID exposure. Therefore, our future investigations are aimed at maintaining the radiation tolerance levels while simultaneously improving device performance and reducing the susceptibility to atmospheric doping effects.

4. Conclusions

We have demonstrated the sensitivities of graphene FETs, including shifting Dirac point and mobility degradation, due to TID exposure as well as the compounded effects caused by doping from molecular adsorbates. We observe a correlation between the minimum conductivity, Electronics 01 00023 i008, and hole mobility, Electronics 01 00023 i007, both of which vary non-monotonically with increasing TID. We attribute this behavior to an evolving electron-hole puddle distribution, controlled by SiO2 trapped charges and mobile surface impurities. Using a locally etched back-gate region, we have created a device structure that can leverage standard hardening approaches including the use of alternative dielectric materials and thinner gate dielectric layers. This has led to the demonstration of a SWCNT-TFT which is nearly unaffected by ionizing radiation up to a total dose of 2 Mrad(Si).

Acknowledgments

We acknowledge financial support of this research from the Defense Threat Reduction Agency. We would like to thank H. Hughes, P. McMarr, D. McMorrow for helpful discussions, and A. Friedman for wire bonding.

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