JLPEA 2013, 3(1), 1-8; doi:10.3390/jlpea3010001

New Book Received
Designing Control Loops for Linear and Switching Power Supplies: A Tutorial Guide. By Christophe Basso, Artech House, 2012; 593 Pages. Price £99.00, ISBN 978-1-60807-557-7
Shu-Kun Lin
MDPI AG, Kandererstrasse 25, CH-4057 Basel, Switzerland; E-Mail: lin@mdpi.com
Received: 10 January 2013 / Accepted: 10 January 2013 / Published: 24 January 2013

The following paragraphs are reproduced from the website of the publisher [1]:

Loop control is an essential area of electronics engineering that today’s professionals need to master. Rather than delving into extensive theory, this practical book focuses on what you really need to know for compensating or stabilizing a given control system. You can turn instantly to practical sections with numerous design examples and ready-made formulas to help you with your projects in the field. You also find coverage of the underpinnings and principles of control loops so you can gain a more complete understanding of the material. This authoritative volume explains how to conduct analysis of control systems and provides extensive details on practical compensators. It helps you measure your system, showing how to verify if a prototype is stable and features enough design margin. Moreover, you learn how to secure high-volume production by bench-verified safety margins.

Table of Contents

  • Foreword xiii

  • Preface xv

  • Acknowledgments xvii

  • Chapter 1 Basics of Loop Control 1

    • 1.1 Open-Loop Systems 1

      • 1.1.1 Perturbations 3

    • 1.2 The Necessity of Control-Closed-Loop Systems 4

    • 1.3 Notions of Time Constants 6

      • 1.3.1 Working with Time Constants 7

      • 1.3.2 The Proportional Term 9

      • 1.3.3 The Derivative Term 10

      • 1.3.4 The Integral Term 11

      • 1.3.5 Combining the Factors 12

    • 1.4 Performance of a Feedback Control System 12

      • 1.4.1 Transient or Steady State? 13

      • 1.4.2 The Step 15

      • 1.4.3 The Sinusoidal Sweep 16

      • 1.4.4 The Bode Plot 17

    • 1.5 Transfer Functions 19

      • 1.5.1 The Laplace Transform 20

      • 1.5.2 Excitation and Response Signals 22

      • 1.5.3 A Quick Example 23

      • 1.5.4 Combining Transfer Functions with Bode Plots 25

    • 1.6 Conclusion 27

    • Selected Bibliography 27

  • Chapter 2 Transfer Functions 29

    • 2.1 Expressing Transfer Functions 29

      • 2.1.1 Writing Transfer Functions the Right Way 31

      • 2.1.2 The 0-db Crossover Pole 32

    • 2.2 Solving for the Roots 32

      • 2.2.1 Poles and Zeros Found by Inspection 35

      • 2.2.2 Poles, Zeros, and Time Constants 36

    • 2.3 Transient Response and Roots 39

      • 2.3.1 When the Roots Are Moving 43

    • 2.4 S-Plane and Transient Response 49

      • 2.4.1 Roots Trajectories in the Complex Plane 54

    • 2.5 Zeros in the Right Half Plane 56

      • 2.5.1 A Two-Step Conversion Process 56

      • 2.5.2 The Inductor Current Slew-Rate Is the Limit 58

      • 2.5.3 An Average Model to Visualize RHP Zero Effects 60

      • 2.5.4 The Right Half Plane Zero in the Boost Converter 62

    • 2.6 Conclusion 66

    • References 66

    • Appendix 2A Determining a Bridge Input Impedance 67

    • Reference 69

    • Appendix 2B Plotting Evans Loci with Mathcad 70

    • Appendix 2C Heaviside Expansion Formulas 71

    • Reference 74

    • Appendix 2D Plotting a Right Half Plane Zero with SPICE 74

  • Chapter 3 Stability Criteria of a Control System 77

    • 3.1 Building An Oscillator 77

      • 3.1.1 Theory at Work 79

    • 3.2 Stability Criteria 82

      • 3.2.1 Gain Margin and Conditional Stability 84

      • 3.2.2 Minimum Versus Nonminimum-Phase Functions 87

      • 3.2.3 Nyquist Plots 89

      • 3.2.4 Extracting the Basic Information from the Nyquist Plot 91

      • 3.2.5 Modulus Margin 93

    • 3.3 Transient Response, Quality Factor, and Phase Margin 97

      • 3.3.1 A Second-Order System, the RLC Circuit 97

      • 3.3.2 Transient Response of a Second-Order System 101

      • 3.3.3 Phase Margin and Quality Factor 110

      • 3.3.4 Opening the Loop to Measure the Phase Margin 117

      • 3.3.5 The Phase Margin of a Switching Converter 120

      • 3.3.6 Considering a Delay in the Conversion Process 122

      • 3.3.7 The Delay in the Laplace Domain 127

      • 3.3.8 Delay Margin versus Phase Margin 130

    • 3.4 Selecting the Crossover Frequency 133

      • 3.4.1 A Simplified Buck Converter 135

      • 3.4.2 The Output Impedance in Closed-Loop Conditions 138

      • 3.4.3 The Closed-Loop Output Impedance at Crossover 142

      • 3.4.4 Scaling the Reference to Obtain the Desired Output 143

      • 3.4.5 Increasing the Crossover Frequency Further 149

    • 3.5 Conclusion 150

    • References 151

  • Chapter 4 Compensation 153

    • 4.1 The PID Compensator 153

      • 4.1.1 The Pip Expressions in the Laplace Domain 155

      • 4.1.2 Practical Implementation of a PID Compensator 157

      • 4.1.3 Practical Implementation of a PI Compensator 161

      • 4.1.4 The PID at Work in a Buck Convener 163

      • 4.1.5 The Buck Converter Transient Response with the PID Compensation 170

      • 4.1.6 The Setpoint Is Fixed: We Have a Regulator! 171

      • 4.1.7 A Peaky Output Impedance Plot 174

    • 4.2 Stabilizing the Converter with Poles-Zeros Placement 176

      • 4.2.1 A Simple Step-by-Step Technique 177

      • 4.2.2 The Plant Transfer Function 178

      • 4.2.3 Canceling the Static Error with an Integrator 179

      • 4.2.4 Adjusting the Gain with the Integrator: The Type 1 182

      • 4.2.5 Locally Boosting the Phase at Crossover 183

      • 4.2.6 Placing Poles and Zeros to Create Phase Boost 185

      • 4.2.7 Create Phase Boost up to 90° with a Single Pole/Zero Pair 189

      • 4.2.8 Mid-Band Gain Adjustment with the Single Pole/Zero Pair: The Type 2 191

      • 4.2.9 Design Example with a Type 2 192

      • 4.2.10 Create Phase Boost up to 180° with a Double Pole/Zero Pair 194

      • 4.2.11 Mid-Band Gain Adjustment with the Double Pole/Zero Pair: The Type 3 197

      • 4.2.12 Design Example with a Type 3 199

      • 4.2.13 Selecting the Right Compensator Type 200

      • 4.2.14 The Type 3 at Work with a Buck Converter 201

    • 4.3 Output Impedance Shaping 210

      • 4.3.1 Making the Output Impedance Resistive 212

    • 4.4 Conclusion 221

    • References 222

    • Appendix 4A The Buck Output Impedance with Fast Analytical Techniques 222

    • Reference 227

    • Appendix 4B The Quality Factor from a Bode Plot with Group Delay 227

    • Appendix 4C The Phase Display in Simulators or Mathematical Solvers 230

    • Calculating the Tangent 232

    • Accounting for the Quadrant 234

    • Improving the Arctangent Function 236

    • Phase Display in a SPICE Simulator 237

    • Conclusion 242

    • Reference 243

    • Appendix 4D Impact of Open-Loop Gain and Origin Pole on Op Amp-Based Transfer Functions 243

    • The Integrator Case 248

    • Appendix 4E Summary of Compensator Configurations 252

  • Chapter 5 Operational Amplifiers-Based Compensators 253

    • 5.1 Type 1: An Origin Pole 253

      • 5.1.1 A Design Example 255

    • 5.2 Type 2: An Origin Pole, plus a Pole/Zero Pair 257

      • 5.2.1 A Design Example 260

    • 5.3 Type 2a: An Origin Pole plus a Zero 262

      • 5.3.1 A Design Example 263

    • 5.4 Type 2b: Some Static Gain plus a Pole 264

      • 5.4.1 A Design Example 266

    • 5.5 Type 2: Isolation with an Optocoupler 267

      • 5.5.1 Optocoupler and Op Amp: the Direct Connection, Common Emitter 269

      • 5.5.2 A Design Example 271

      • 5.5.3 Optocoupler and Op Amp: The Direct Connection, Common Collector 273

      • 5.5.4 Optocoupler and Op Amp: The Direct Connection Common Emitter and UC384X 275

      • 5.5.5 Optocoupler and Op Amp: Pull Down with Fast Lane 276

      • 5.5.6 A Design Example 279

      • 5.5.7 Optocoupler and Op Amp: Pull-Down with Fast Lane, Common Emitter, and UC384X 280

      • 5.5.8 Optocoupler and Op Amp: Pull Down Without Fast Lane 283

      • 5.5.9 A Design Example 285

      • 5.5.10 Optocoupler and Op Amp: A Dual-Loop Approach in CC-CV Applications 288

      • 5.5.11 A Design Example 293

    • 5.6 The Type 2: Pole and Zero are Coincident to Create an Isolated Type 1 299

      • 5.6.1 A Design Example 301

    • 5.7 The Type 2: A Slightly Different Arrangement 303

    • 5.8 The Type 3: An Origin Pole, a Pole/Zero Pair 308

      • 5.8.1 A Design Example 313

    • 5.9 The Type 3: Isolation with an Optocoupler 315

      • 5.9.1 Optocoupler and Op Amp: The Direct Connection, Common Collector 315

      • 5.9.2 A Design Example 317

      • 5.9.3 Optocoupler and Op Amp: The Direct Connection, Common Emitter 319

      • 5.9.4 Optocoupler and Op Amp: The Direct Connection, Common Emitter, and UC384X 321

      • 5.9.5 Optocoupler and Op Amp: Pull-Down with Fast Lane 322

      • 5.9.6 A Design Example 326

      • 5.9.7 Optocoupler and Op Amp: Pull Down without Fast Lane 328

      • 5.9.8 A Design Example 332

    • 5.10 Conclusion 335

    • References 335

    • Appendix 5A Summary Pictures 335

    • Appendix 5B Automating Components Calculations with k Factor 340

    • Type 1 340

    • Type 2 341

    • Type 3 342

    • Reference 344

    • Appendix 5C The Optocoupler 346

    • Transmitting Light 346

    • Current Transfer Ratio 347

    • The Optocoupler Pole 348

    • Extracting the Optocoupler Pole 350

    • Watch for the LED Dynamic Resistance 351

    • Good Design Practices 354

    • References 355

  • Chapter 6 Operational Transconductance Amplifier-Based Compensators 357

    • 6.1 The Type 1: An Origin Pole 358

      • 6.1.1 A Design Example 359

    • 6.2 The Type 2: An Origin Pole plus a Pole/Zero Pair 360

      • 6.2.1 A Design Example 364

    • 6.3 Optocoupler and OTA: A Buffered Connection 365

      • 6.3.1 A Design Example 368

    • 6.4 The Type 3: An Origin Pole and a Pole/Zero Pair 370

      • 6.4.1 A Design Example 377

    • 6.5 Conclusion 380

    • Appendix 6A Summary Pictures 380

    • References 381

  • Chapter 7 TL431-Based Compensators 383

    • 7.1 A Bandgap-Based Component 383

      • 7.1.1 The Reference Voltage 385

      • 7.1.2 The Need for Bias Current 387

    • 7.2 Biasing the TL431: The Impact on the Gain 390

    • 7.3 Biasing the TL431: A Different Arrangement 392

    • 7.4 Biasing the TL431: Component Limits 395

    • 7.5 The Fast Lane Is the Problem 396

    • 7.6 Disabling the Fast Lane 397

    • 7.7 The Type 1: An Origin Pole, Common-Emitter Configuration 399

      • 7.7.1 A Design Example 402

    • 7.8 The Type 1: Common-Collector Configuration 403

    • 7.9 The Type 2: An Origin Pole plus a Pole/Zero Pair 403

      • 7.9.1 A Design Example 407

    • 7.10 The Type 2: Common-Emitter Configuration and UC384X 408

    • 7.11 The Type 2: Common-Collector Configuration and UC384X 411

    • 7.12 The Type 2: Disabling the Fast Lane 411

      • 7.12.1 A Design Example 413

    • 7.13 The Type 3: An Origin Pole plus a Double Pole/Zero Pair 415

      • 7.13.1 A Design Example 423

    • 7.14 The Type 3: An Origin Pole plus a Double Pole/Zero Pair-No Fast Lane 424

      • 7.14.1 A Design Example 429

    • 7.15 Testing the Ac Responses on a Bench 431

    • 7.16 Isolated Zener-Based Compensator 434

      • 7.16.1 A Design Example 436

    • 7.17 Nonisolated Zener-Based Compensator 441

    • 7.18 Nonisolated Zener-Based Compensator: A Lower Cost Version 443

    • 7.19 Conclusion 445

    • References 445

    • Appendix 7A Summary Pictures 445

    • Appendix 7B Second Stage LC Filter 448

    • A Simplified Approach 449

    • Simulation at Work 450

    • References 454

  • Chapter 8 Shunt Regulator-Based Compensators 455

    • 8.1 The Type 2: An Origin Pole plus a Pole/Zero Pair 456

      • 8.1.1 A Design Example 460

    • 8.2 The Type 3: An Origin Pole plus a Double Pole/Zero Pair 466

      • 8.2.1 A Design Example 468

    • 8.3 The Type 3: An Origin Pole plus a Double Pole/Zero Pair-No Fast Lane 471

      • 8.3.1 A Design Example 474

    • 8.4 Isolated Zener-Based Compensator 476

      • 8.4.1 A Design Example 480

    • 8.5 Conclusion 483

    • References 483

    • Appendix 8A Summary Pictures 484

  • Chapter 9 Measurements and Design Examples 487

    • 9.1 Measuring the Control System Transfer Function 487

      • 9.1.1 Opening the Loop with Bias Point Loss 488

      • 9.1.2 Power Stage Transfer Function without Bias Point Loss 492

      • 9.1.3 Opening the Loop in ac Only 493

      • 9.1.4 Voltage Variations at the Injection Points 496

      • 9.1.5 Impedances at the Injection Points 504

      • 9.1.6 Buffering the Data 505

    • 9.2 Design Example 1: A Forward dc-dc Converter 509

      • 9.2.1 Moving Parameters 509

      • 9.2.2 The Electrical Schematic 511

      • 9.2.3 Extracting the Power Stage Transfer Response 514

      • 9.2.4 Compensating the Converter 515

    • 9.3 Design Example 2: A Linear Regulator 519

      • 9.3.1 Extracting the Power Stage Transfer Function 520

      • 9.3.2 Crossover Frequency Selection and Compensation 521

      • 9.3.3 Testing the Transient Response 527

    • 9.4 Design Example 3: A CCM Voltage-Mode Boost Converter 528

      • 9.4.1 The Power Stage Transfer Function 529

      • 9.4.2 Compensating the Converter 533

      • Strategy 1 535

      • Strategy 2 535

      • 9.4.3 Plotting the Loop Gain 537

    • 9.5 Design Example 4: A Primary-Regulated Flyback Converter 539

      • 9.5.1 Deriving the Transfer Function 540

      • 9.5.2 Verifying the Equations 544

      • 9.5.3 Stabilizing the Converter 545

    • 9.6 Design Example 5: Input Filter Compensation 552

      • 9.6.1 A Negative Incremental Resistance 553

      • 9.6.2 Building an Oscillator 554

      • 9.6.3 Taming the Oscillations 556

    • 9.7 Conclusion 562

    • References 562

    • Conclusion 565

    • Appendix 567

  • About the Author 571

* Editor’s Note: The brief summary and the contents of the books are reported as provided by the authors or the publishers. Authors and publishers are encouraged to send review copies of their recent books of potential interest to readers of JLPEA to the Publisher (Dr. Shu-Kun Lin, Multidisciplinary Digital Publishing Institute (MDPI), Kandererstrasse 25, CH-4057 Basel, Switzerland; Tel.: +41-61-683-77-34; Fax: +41-61-302-89-18; E-Mail: lin@mdpi.com). Some books will be offered to the scholarly community for the purpose of preparing full-length reviews.

Note

  1. The website for this book is: http://www.artechhouse.com/International/Books/Designing-Control-Loops-for-Linear-and-Switching-P-1990.aspx
J. Low Power Electron. Appl. EISSN 2079-9268 Published by MDPI AG, Basel, Switzerland RSS E-Mail Table of Contents Alert