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Crystals 2017, 7(6), 177; doi:10.3390/cryst7060177

The Role of III-V Substrate Roughness and Deoxidation Induced by Digital Etch in Achieving Low Resistance Metal Contacts

Department of Mechanical & Materials Science and Electrical Engineering & Computer Science, Masdar Institute of Science and Technology, A part of Khalifa University of Science and Technology, P.O. Box 54224, Abu Dhabi 54224, UAE
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Academic Editor: Shujun Zhang
Received: 2 May 2017 / Revised: 2 June 2017 / Accepted: 13 June 2017 / Published: 19 June 2017
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Abstract

To achieve low contact resistance between metal and III-V material, transmission-line-model (TLM) structures of molybdenum (Mo) were fabricated on indium phosphide (InP) substrate on the top of an indium gallium arsenide (InGaAs) layer grown by molecular beam epitaxy. The contact layer was prepared using a digital etch procedure before metal deposition. The contact resistivity was found to decrease significantly with the cleaning process. High Resolution Transmission & Scanning Electron Microscopy (HRTEM & HRSTEM) investigations revealed that the surface roughness of treated samples was increased. Further analysis of the metal-semiconductor interface using Energy Electron Loss Spectroscopy (EELS) showed that the amount of oxides (InxOy, GaxOy or AsxOy) was significantly decreased for the etched samples. These results suggest that the low contact resistance obtained after digital etching is attributed to the combined effects of the induced surface roughness and oxides removal during the digital etch process. View Full-Text
Keywords: III-V materials; digital etch; low contact resistance; HRTEM; EELS III-V materials; digital etch; low contact resistance; HRTEM; EELS
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Ravaux, F.; Saadat, I.; Jouiad, M. The Role of III-V Substrate Roughness and Deoxidation Induced by Digital Etch in Achieving Low Resistance Metal Contacts. Crystals 2017, 7, 177.

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