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Micromachines 2017, 8(11), 330; doi:10.3390/mi8110330

Asymmetric Drain Extension Dual-kk Trigate Underlap FinFET Based on RF/Analog Circuit

1
School of Electronic Engineering, Beijing University of Posts and Telecommunications, Haidian District, Beijing 100876, China
2
School of Engineering, University of Edinburgh, Edinburgh EH9 3FF, UK
*
Author to whom correspondence should be addressed.
Received: 24 July 2017 / Revised: 25 October 2017 / Accepted: 1 November 2017 / Published: 9 November 2017
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Abstract

Among multi-gate field effect transistor (FET) structures, FinFET has better short channel control and ease of manufacturability when compared to other conventional bulk devices. The radio frequency (RF) performance of FinFET is affected by gate-controlled parameters such as transconductance, output conductance, and total gate capacitance. In recent years, high-k spacer dielectric materials for manufacturing nanoscale devices are being widely explored because of their better electrostatic control and being less affected by short channel effects (SCEs). In this paper, we aim to explore the potential benefits of using different Dual-k spacers on source and drain, respectively: (AsymD-kk) trigate FinFET structure to improve the analog/RF figure of merit (FOM) for low-power operation at 14 nm gate length. It has been observed from the results that the AsymD-kk FinFET structure improves the coupling of the gate fringe field to the underlap region towards the source and drain side, improving the transconductance (gm) and output conductance (gds) at the cost of an increase in Miller capacitance. Furthermore, to reduce the drain field influence on the channel region, we also studied the effect of asymmetric drain extension length on a Dual-kk FinFET structure. It can be observed that the new asymmetric drain extension structures significantly improve the cutoff frequency (fT) and maximum oscillation frequency (fmax) given the significant reduction of inner fringe capacitance towards drain side due to the shifting of the drain extension’s doping concentration away from the gate edge. Therefore, the asymmetric drain extension Dual-kk trigate FinFET (AsymD-kkDE) is a new structure that combines different Dual-k spacers on the source and drain and asymmetric drain extension on a single silicon on insulator (SOI) platform to enhance the almost all analog/RF FOM. The proposed structure is verified by technology computer-aided design (TCAD) simulations with varying device physical parameters such as fin height, fin width, aspect ratio, spacer width, spacer material, etc. From comprehensive 3D device simulation, we have demonstrated that the proposed device is superior in performance to a conventional trigate FinFET and can be used to design low-power digital circuits. View Full-Text
Keywords: underlap FinFET; asymmetric Dual-kk spacers; drain extension; short channel effects (SCEs); radio frequency (RF)/analog performance underlap FinFET; asymmetric Dual-kk spacers; drain extension; short channel effects (SCEs); radio frequency (RF)/analog performance
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This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. (CC BY 4.0).

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MDPI and ACS Style

Han, K.; Qiao, G.; Deng, Z.; Zhang, Y. Asymmetric Drain Extension Dual-kk Trigate Underlap FinFET Based on RF/Analog Circuit. Micromachines 2017, 8, 330.

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