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Sensors 2016, 16(10), 1710; doi:10.3390/s16101710

A Low-Power All-Digital on-Chip CMOS Oscillator for a Wireless Sensor Node

Department of Electrical Engineering, Fu Jen Catholic University, Taipei 24205, Taiwan
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Author to whom correspondence should be addressed.
Academic Editor: Vittorio M. N. Passaro
Received: 13 August 2016 / Revised: 11 October 2016 / Accepted: 12 October 2016 / Published: 14 October 2016
(This article belongs to the Section Physical Sensors)
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Abstract

This paper presents an all-digital low-power oscillator for reference clocks in wireless body area network (WBAN) applications. The proposed on-chip complementary metal-oxide-semiconductor (CMOS) oscillator provides low-frequency clock signals with low power consumption, high delay resolution, and low circuit complexity. The cascade-stage structure of the proposed design simultaneously achieves high resolution and a wide frequency range. The proposed hysteresis delay cell further reduces the power consumption and hardware costs by 92.4% and 70.4%, respectively, relative to conventional designs. The proposed design is implemented in a standard performance 0.18 μm CMOS process. The measured operational frequency ranged from 7 to 155 MHz, and the power consumption was improved to 79.6 μW (@7 MHz) with a 4.6 ps resolution. The proposed design can be implemented in an all-digital manner, which is highly desirable for system-level integration. View Full-Text
Keywords: on-chip reference clock generator; wireless sensor node; wireless body area network (WBAN); all digital; low power on-chip reference clock generator; wireless sensor node; wireless body area network (WBAN); all digital; low power
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This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. (CC BY 4.0).

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Sheng, D.; Hong, M.-R. A Low-Power All-Digital on-Chip CMOS Oscillator for a Wireless Sensor Node. Sensors 2016, 16, 1710.

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