A Low-Power All-Digital on-Chip CMOS Oscillator for a Wireless Sensor Node
AbstractThis paper presents an all-digital low-power oscillator for reference clocks in wireless body area network (WBAN) applications. The proposed on-chip complementary metal-oxide-semiconductor (CMOS) oscillator provides low-frequency clock signals with low power consumption, high delay resolution, and low circuit complexity. The cascade-stage structure of the proposed design simultaneously achieves high resolution and a wide frequency range. The proposed hysteresis delay cell further reduces the power consumption and hardware costs by 92.4% and 70.4%, respectively, relative to conventional designs. The proposed design is implemented in a standard performance 0.18 μm CMOS process. The measured operational frequency ranged from 7 to 155 MHz, and the power consumption was improved to 79.6 μW (@7 MHz) with a 4.6 ps resolution. The proposed design can be implemented in an all-digital manner, which is highly desirable for system-level integration. View Full-Text
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Sheng, D.; Hong, M.-R. A Low-Power All-Digital on-Chip CMOS Oscillator for a Wireless Sensor Node. Sensors 2016, 16, 1710.
Sheng D, Hong M-R. A Low-Power All-Digital on-Chip CMOS Oscillator for a Wireless Sensor Node. Sensors. 2016; 16(10):1710.Chicago/Turabian Style
Sheng, Duo; Hong, Min-Rong. 2016. "A Low-Power All-Digital on-Chip CMOS Oscillator for a Wireless Sensor Node." Sensors 16, no. 10: 1710.
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