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Electronics 2017, 6(4), 79; doi:10.3390/electronics6040079

Analysis of the Effect of Channel Leakage on Design, Characterization and Modelling of a High Voltage Pseudo-Floating Gate Sensor-Front-End

†,‡,* ,
Department of Microsystems, University College of Southeast Norway, 3184 Raveien, Norway
Current address: Raveien 215, 3184 Borre, Norway.
These authors contributed equally to this work.
Author to whom correspondence should be addressed.
Received: 4 August 2017 / Revised: 11 September 2017 / Accepted: 4 October 2017 / Published: 10 October 2017


In this paper, we analyze the effects of channel leakage on the design, modelling and characterization of a high voltage pseudo-floating gate amplifier (PFGA) used as sensor front-end. Leakages are known as a major challenge in new modern CMOS technologies, which are used to bias the PFGA, and consequently affect the behavior of the amplifier. As high voltages are desired for actuation of many types of resonating sensors, especially in ultrasound applications, PFGA implemented in high voltage and low leakage technologies, such as older CMOS fabrication processes or power MOSFET can be the only option. The challenge with these technologies used to implement the PFGA is that the leakages are very low, which affect the biasing of the floating gate. However, the numerous advantages of this type of amplifier, implemented with modern fabrication processes, such as high flexibility, compactness, low power consumption , etc. encouraged the authors to research about this topic. This work provides analysis of the working principle and the design rules for this amplifier, emphasizing the major differences between PFGA implemented in low leakage and high leakage technologies. Static and dynamic analysis, input offset and non-linearity of the PFGA are the main topics of this article. Three different design approaches are presented in this paper, in order to provide a more general design procedure and offset compensation for any low leakage PFGA. The amplifier has been simulated in AMS- 0 . 35 μ m CMOS models for supply voltages of 5 V and 10 V. Two prototypes have been realized to verify the validity of the modelling and the simulation results. Both devices have been realized by using discrete components and mounted on a printed circuit board. In this work, MOSFETs are realized by using commercial IC CD4007UB and 2N7000. Measurement results of the first prototype proved that the implementation of a low leakage PFGA is possible after that the input offset of the amplifier has been compensated. Measurement results of the second prototype have been used to characterize the low leakage PFGA, extracting the best performances from this amplifier, realized with less components and providing a more compact device. Finally, design rules have been summarized in order to implement this amplifier, which enjoys compactness and a relative low power dissipation. View Full-Text
Keywords: pseudo floating-gate amplifier; channel leakage analysis; modelling; characterization pseudo floating-gate amplifier; channel leakage analysis; modelling; characterization

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This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. (CC BY 4.0).

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Marchetti, L.; Berg, Y.; Azadmehr, M. Analysis of the Effect of Channel Leakage on Design, Characterization and Modelling of a High Voltage Pseudo-Floating Gate Sensor-Front-End. Electronics 2017, 6, 79.

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