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Electronics 2016, 5(3), 50; doi:10.3390/electronics5030050

Design and Prototyping Flow of Flexible and Efficient NISC-Based Architectures for MIMO Turbo Equalization and Demapping

1
School of Engineering, Lebanese International University, Beirut 1105, Lebanon
2
Department of Electronics, UMR CNRS 6285 Lab-STICC, Telecom Bretagne, Brest 29238, France
3
Department of Physics and Electronics, Lebanese University, Hadath 1003, Lebanon
This paper is an extended version of our paper published in IEEE International Symposium on Rapid System Prototyping (RSP), 16–17 October 2014, as M. Rizk, A. Baghdadi, M. Jezequel, Y. Mohanna and Y. Atat. “Design and prototyping flow of NISC-based flexible MIMO turbo-equalizer”.
*
Author to whom correspondence should be addressed.
Academic Editor: Mostafa Bassiouni
Received: 31 March 2016 / Revised: 25 July 2016 / Accepted: 22 August 2016 / Published: 30 August 2016
View Full-Text   |   Download PDF [4693 KB, uploaded 30 August 2016]   |  

Abstract

In the domain of digital wireless communication, flexible design implementations are increasingly explored for different applications in order to cope with diverse system configurations imposed by the emerging wireless communication standards. In fact, shrinking the design time to meet market pressure, on the one hand, and adding the emerging flexibility requirement and, hence, increasing system complexity, on the other hand, require a productive design approach that also ensures final design quality. The no instruction set computer (NISC) approach fulfills these design requirements by eliminating the instruction set overhead. The approach offers static scheduling of the datapath, automated register transfer language (RTL)synthesis and allows the designer to have direct control of hardware resources. This paper presents a complete NISC-based design and prototype flow, from architecture specification till FPGA implementation. The proposed design and prototype flow is illustrated through two case studies of flexible implementations, which are dedicated to low-complexity MIMO turbo-equalizer and a universal turbo-demapper. Moreover, the flexibility of the proposed prototypes allows supporting all communication modes defined in the emerging wireless communication standards, such LTE, LTE-Advanced, WiMAX, WiFi and DVB-RCS. For each prototype, its functionality is evaluated, and the resultant performance is verified for all system configurations. View Full-Text
Keywords: NISC; flexible implementation; application-specific processor; prototype flow; FPGA; MIMO; iterative; equalization; demapping NISC; flexible implementation; application-specific processor; prototype flow; FPGA; MIMO; iterative; equalization; demapping
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This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. (CC BY 4.0).

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Rizk, M.; Baghdadi, A.; Jézéquel, M.; Mohanna, Y.; Atat, Y. Design and Prototyping Flow of Flexible and Efficient NISC-Based Architectures for MIMO Turbo Equalization and Demapping
. Electronics 2016, 5, 50.

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