A Ka-Band Silicon-Based Antenna-in-Package Design Using Characteristic Mode Analysis for Bandwidth Enhancement

Abstract

With the emergence of 5G and satellite communication applications, where millimeter-wave (mm-wave) active phased arrays play an important role, the demand for a highly integrated and cost-effective method to achieve mm-wave antennas is an inevitable trend. Antenna-in-package (AiP) design is therefore becoming a hotspot. This paper presents the design procedure for a broadband silicon-based stacked patch antenna in Ka-band, which realizes a practical AiP structure for phased-array module integration requirements. A stacked-patch antenna on a high-resistivity silicon (HRSi) substrate is demonstrated to effectively extend the bandwidth with the guidance of characteristic mode analysis (CMA).The proposed antenna element and its 2 × 2 array were designed and fabricated using silicon bulk micromachining and wafer-level bonding technology. The measured results from the fabricated antenna prototypes showed that (1) the antenna element had an impedance bandwidth of 13.8% from 26.2 to 30.1 GHz, and the peak gain was 6.1 dBi at 28.9 GHz; (2) the 2 × 2 array realized an impedance bandwidth of 11.4% from 27.2 to 30.5 GHz, and the peak gain was 9.3 dBi at 28.5 GHz.

1. Introduction

In recent years, there has been an increasing demand for high data rates and wide transmission bandwidth in the mobile communication field, such as for 5G communication and satellite communication, which leads to higher frequencies above 20 GHz. In the Ka-band, active phased array systems for satellite communication with large capacities and compact structures play an important role in mobile communication. In higher frequency bands, the interconnection loss between a traditional passive antenna and the active transceiver module becomes higher, and the efficiency is low, which reduces the performance of the traditional active phased array. Improving the integration of the antenna and RF system has become a current development trend in millimeter wave active phased array systems. A high frequency naturally contributes to a highly integrated design. By utilizing the small size of millimeter-wave devices, it is possible to assemble multiple functional blocks and antennas in a package using a packaging process, which is called system-in-package (SiP) technologies. Antenna design has shifted from the conventional discrete antenna approach to an antenna-in-package (AiP) solution [1], and high-performance AiP and arrays have become a research hotspot in the field of antennas [2,3,4,5,6,7,8,9]. In the specific designs, a microstrip antenna is widely used in the design of AiP because of its planar structure and easy integration with active circuits. In addition, a variety of innovative substrate technologies have been explored for mm-wave antenna design and system integration to date, including organic high-density interconnect (HDI) substrates, low-temperature co-fired ceramic (LTCC) substrates, molding-compound-based wafer-level substrates, and silicon substrates. LTCC has been widely used in phased array scanning antenna arrays [2,3,4] in recent years, due to its high machining accuracy, low loss, and design flexibility. However, the high cost of this process limits its market to mm-wave applications. Therefore, manufacturers have studied low-cost HDI processes suitable for mass production. IBM has developed various AiP arrays operating in the Ka-band and W-band for mm-wave 5G communication systems based on the HDI process [5,6,7]. Molding compounds are materials used in the fan-out wafer-level packaging (FOWLP) process, which is known as eWLB. Several works of AiP design based on this process have been reported so far [8,9].

Silicon substrate, as one of the most important materials for the integrated circuit industry, can be used to manufacture mm-wave antennas for a highly integrated purpose. At present, the mainstream silicon processing technologies include CMOS, SiGe, and the silicon-based 3D integration process based on bulk silicon micromachining and chip micro-assembly processes [10]. The CMOS process and SiGe process utilize the advantages of semiconductor processes and are mainly used for manufacturing antenna-on-chip (AoC) and on-chip radar systems above 60 GHz. However, the silicon substrate with low resistivity results in a poor radiation efficiency [11]. The silicon-based 3D integration process is more flexible, enabling integration solutions such as heterogeneous integration and high-precision heterogeneous integration in silicon technology. The bulk silicon micromachining process is used to etch the cavity on the silicon substrate for placing the chip and for the cover plate, to create through-silicon-vias (TSVs), and generate metal graphics. Through th micro-assembly process, a mm-wave chip is sintered into the cavity through gold wire bonding. Then, low-temperature wafer-level bonding is performed, and finally, three-dimensional integrated microsystems [12,13] and T/R modules [14,15] are obtained through slicing and segmentation. Therefore, a microstrip antenna manufactured through standard silicon process can be easily assembled with other active chips, providing a cost-effective solution for mm-wave AiP design.

In practical application scenarios, typical requirements for antennas include sufficient bandwidth, stable antenna gain within the bandwidth, and radiation patterns, to achieve the optimal beam scanning capability for phased arrays. However, the high permittivity of substrates, which can result in a high quality factor (Q value) for antennas and trigger surface waves, hinders silicon-based antennas from achieving high performance. Aiming at the above problems, Ioannis et al. [16] tried to reduce the equivalent dielectric constant of the substrate by removing a portion of the silicon substrate below the antenna, resulting in increases in antenna bandwidth and efficiency of 64% and 28%, respectively. Gauthier et al. [17] processed closely spaced holes on a high dielectric-constant substrate to synthesize a localized low dielectric-constant environment, thereby increasing the antenna bandwidth. However, these methods are somewhat complicated during manufacturing and not suitable for further integration and mass production.

In this paper, a Ka-band silicon-based broadband stacked patch antenna based on bulk silicon micromachining technology is presented. The proposed antenna uses three layers of silicon, with each layer of 250 $\mathsf{\mu }$m stacked using high-precision wafer-level bonding technology. A high-resistivity silicon (HRSi) substrate is used to improve the antenna’s gain performance. By enlarging the aspect ratio of the upper patch and adding a slotted patch as a double-tuned resonator, the bandwidth of the silicon-based antenna is effectively enhanced. The design of the antenna was guided by the theory of characteristic mode, revealing the principle of performance enhancement. Consequently, a 2 × 2 subarray was presented to validate the antenna performance. The prototype unit has a measured impedance bandwidth (S₁₁ ≤ −10 dB) of 13.8% from 26.2 GHz to 30.1 GHz. The peak boresight gain reaches 6.1 dBi in the operating frequency band, and the overall size of the unit is 5 mm × 5 mm × 0.78 mm (0.47$\lambda$₀ × 0.47$\lambda$₀ × 0.07$\lambda$₀ at 28 GHz). The measured impedance bandwidth of the 2 × 2 subarray is 11.4% from 27.2 GHz to 30.5 GHz, with a peak boresight gain of 9.3 dBi in the operating frequency band and a size of 9 mm × 9 mm × 0.78 mm (0.84$\lambda$₀ × 0.84$\lambda$₀ × 0.07$\lambda$₀). The antenna structure adopts an HRSi substrate, without the need for isomerism with other substrates or cavity-etching processes, which not only has certain advantages in mechanical reliability and consistency, but also makes it suitable for mass production. Furthermore, the subarray can be extended to an N × N mm-wave active phased array.

2. Antenna Design Approach

2.1. Silicon-Based Antenna Design with Enhanced Bandwidth

Using a high-permittivity substrate for microstrip antennas generally leads to penalties in performance [18], which is seen to be contrary to MMICs. For instance, the bandwidth of a microstrip patch for $ϵ$_r = 12.8 is less than 5% when d/$\lambda$₀ < 0.04, and the surface wave power accounts for nearly half of the total input power when d/$\lambda$₀ > 0.045 [19].

With high-permittivity silicon ($ϵ$_r = 11.9) showing fundamental issues and design challenges for microstrip antennas, it is necessary to enlarge the area of the radiation element or thicken the substrate for bandwidth enhancement [20]. Silicon-based rectangular patch antennas in four different dimensions are discussed with the aid of CMA, which describes the resonance behavior of each mode on the electromagnetic structure and the radiation behavior in the far-field zone [21]. Figure 1 shows the model used in the discussion. The rectangular patch is located on silicon with thickness h and is fed by the microstrip line through the H-shaped aperture coupling on the ground. Specifically, case 1 has the same thickness (h = 0.5 m) as case 2 and the same patch width (W = 5 mm) as case 3. The thickness discussed here is based on each silicon wafer being 250 $\mathsf{\mu }$m thick.

Figure 2 shows the MS and MWC curves of the dominant mode in the four cases. The characteristic currents and far-field radiation of the dominant mode are shown in Figure 3. Note that the MWC curve for case 1 has two peaks, whose values are both larger than 0.15. It is supposed that other modes have an impact on the result. Figure 4 displays the MS and MWC results for case 1, from which we can see there are four resonant modes in the range and two of them are excited (J2 and J4). The characteristic currents and fields are shown in Figure 5. According to the current distributions, it can be determined that J2 refers to the TM₁₀ mode and J4 refers to the TM₁₀ mode. Therefore, the second peak in J2’s MWC curve resulted from the onset of J4.

The reflection coefficients of the antennas in the four cases (obtained using a full-wave simulation) are shown in Figure 6. It is seen that the best impedance matching in case 1 occurs in the middle of the two peaks in the MWC curve. Thanks to the joint effect of J2 and J4 on the input impedance, the antenna in case 1 has the widest bandwidth of 11.2%.

With the large ratio-aspect patch (W/L = 4.6) and two silicon layers (h = 500 $\mathsf{\mu }$m), the bandwidth is effectively extended. However, the large patch width imposes a penalty on the array design, considering the spacing requirement (typically 0.5$\lambda$₀) between the antenna elements at millimeter-wave frequencies.

New microstrip configurations with a wider bandwidth have been exhaustively explored. In [22], a U-shaped slot was etched on a patch to generate an additional resonance. In [23], multiple stacked patches, with the upper patches acting as electromagnetically coupled parasitics, were designed for extending bandwidths. Based on the above works, the configuration of stacked patches with lower patch etched U-slots is proposed in this paper. The design approach is presented step by step using CMA, to reveal the radiation mechanism of the structure.

An evolution of the proposed antenna is shown in Figure 7. Antenna I is a single patch with W/L = 3.4 and h = 500 $\mathsf{\mu }$m, and Antenna II adds a lower patch and maintains the same profile. Antenna III etches double U-shaped slots on the lower patch. Figure 8 shows the MS curves and far-field patterns of antenna I to antenna III. The results were obtained without the feeding structure, since MS is independent of any sources. It is seen that the MS curve of Antenna I and Antenna III only had one resonant mode radiating unidirectionally, while the MS curve of Antenna III showed two desired modes in this frequency band.

Figure 9a shows the MS of antenna III with a probe-feed structure. Compared with Figure 8c, the MS curves shifted to higher frequencies, due to the introduction of the feeding probe. From Figure 9b, we can see there are two modes excited (J1 and J2). Figure 10 shows the characteristic currents and far-field radiation pattern when J1 and J2’s MS = 1, respectively. Note that the characteristic currents near resonance for J1 and J2 show in-phase and anti-phase relationships, while both modes present the maximum radiation in boresight. In our opinion, the far-field radiation depended mainly on the top patch currents coupled by the bottom patch, which serves as a “double tuned” matching [24] resonator. The simulated results using full-wave simulation are shown in Figure 11. Compared with Antenna I and II, the S₁₁ curve of Antenna III had a double-resonant response and realized a 10 dB impedance bandwidth of 16.5%. Within this bandwidth, a gain performance of more than 5.5 dBi in boresight was realized for the three antennas, due to the high resistivity of silicon. Note that the boresight gains of Antenna II and Antenna III both had nulls near 24 GHz and 32 GHz beyond the band. This was caused by the opposite current distribution in the y direction.

2.2. Structure of the Proposed Antenna Unit

This section introduces the structure of the antenna unit, considering the fabrication and measurement requirements. A top view of the unit structure is shown in Figure 12a, and

Table 1. Dimensions of the proposed antenna. (Unit: mm).

Parameter	Size	Parameter	Size
Lp1	1.09	ws1	0.05
Wp1	3.67	ws2	0.1
Wp2	2.45	Lt	0.4
Ls1	1.16	Wt	3.5
Ls2	0.83	Wg	5
Ls3	0.81	df	0.15
Ls4	0.57

lists the relevant parameters for the antenna design. In the exploded view in Figure 12b, the antenna consists of three layers of silicon and four layers (M1 to M4) of gold, with a total size of $0.47{\lambda }_0\times 0.47{\lambda }_0\times 0.07{\lambda }_0$. The top patch is on M1 and the bottom patch fed by TSV is on M2. M3 and M4 are grounded with slotted isolation rings. The ball grid array (BGA) with a pitch of 0.8 mm interconnected with the print circuit board (PCB) is under the M4 layer, where the signal is fed from the central solder ball. It should be noted that, in order to meet the manufacturing rules for metal bonding between silicon wafers and ensure the mechanical stability of products, two strip metal shapes are added to the M2, which has little impact on the antenna performance, as shown in Figure 13.

3. Fabrication and 2 × 2 Array Structure

The proposed antenna was manufactured using bulk silicon micromachining and wafer-level assembly processes. Specifically, the bulk silicon process refers to the process of obtaining a certain shape of through groove, blind groove, or through vias on a certain thickness of silicon wafer using etching technologies. After etching, a gold layer with a thickness of 3 $\mathsf{\mu }$m was electroplated on each side of a wafer, and the process flow is shown in Figure 14. Then, high-precision wafer-level bonding was achieved between each layer of silicon wafers using gold, and there is a 10 $\mathsf{\mu }$m gold layer between the formed silicon wafers.

To validate the antenna performance, a 2 × 2 array is designed with the feed network on PCB. Due to the layout of other active chips and the scanning performance of phased arrays, the unit spacing is designed to be 5 mm (0.47${\lambda }_0$). The PCB contains two layers of substrate (Arlon AD300A, ${ϵ}_r=3$, $tan\delta =0.002$) and three layers of metal. In order to achieve equal amplitude feeding of units while ensuring signal transmission quality, a strip-line Wilkinson power division network was designed. Figure 15 shows a cross-section view of the whole 2 × 2 array structure for measurement. The antenna fabricated on silicon is bonded to the PCB through BGA which provides reliable interconnection.

4. Results and Discussion

Figure 16a shows a photograph of the fabricated antenna unit and subarray. The antennas bonded on the PCB through BGA are fixed on a metal base through the conductive adhesive. SMA connectors are installed on the side of the metal base for connection to coaxial transmission lines. Figure 16b shows a side view and a partial zoom-in zone of the BGA pattern after bonding. The shapes of the solder balls have a good consistence.

The antenna was tested in a microwave chamber. Figure 17a,b show the simulated and measured results of the reflection coefficient and boresight gain of the unit. The simulated impedance bandwidth ($S_{11}\le -10$ dB) was from 26.5 GHz to 30.7 GHz, while the measured bandwidth was from 26.2 to 30.1 GHz. The measured gain fluctuated to some extent, but the trend of variation versus frequency was consistent with the simulated one. Figure 18 shows the simulated and measured normalized radiation patterns of the antenna unit in the $xoz$ and $yoz$ planes at 28, 29, and 30 GHz. Due to the testing conditions, only the frontal radiation was measured. The simulated and measured patterns were in good agreement.

The simulated and measured results of the array were in rough agreement, as shown in Figure 19. In addition to the frequency shift, note that an unexpected measured gain null occurred near 27 GHz and the reflection coefficient showed a peak. Consequently, the impedance bandwidth decreased compared with the simulated result. This discrepancy between the measured and simulated results of the array antenna was probably due to multiple factors. First, the TSV fabrication had a significant impact on the performance of the devices. Second, there may have been a slight misalignment between the silicon wafer and the PCB. Third, the material properties of silicon and the substrate for the test PCB were different from those used for simulation. All the above-mentioned factors could have contributed to the discrepancy, and more samples are needed to confirm the cause. The simulated and measured normalized radiation patterns of the subarray in the xoz and yoz planes at 28.5, 29.5, and 30.5 GHz are shown in Figure 20, which also shows a good agreement.

Table 2. Comparisons of the micromachined antennas on high-${ϵ}_r$ substrates.

Refs.	Freq. (GHz)	FBW	Gain (dBi)	Radiation Patch Size (${\mathit{\lambda }}_0^2$)	Approach
[25]	34.2	4%	8.5 (at 34.2 GHz)	0.40 × 0.40	Etching an air cavity
[26]	26.2∼29.1	10.5%	8.9 (at 27.7 GHz)	0.52 × 0.42	Elevating the patch
[27]	22.17	6%	Not given	Not given	An air cavity with tunable thickness
[28]	28	5.4%	Not given	Not given	Glass-based Stacked patches
[29]	76 93	20.1%	2.4 (at 85 GHz)	Not given	CPW-fed slot loop with a stacked patch
[30]	94	5.3%	8.2 (at 91 GHz)	0.39 × 0.35	Forming a BCB-air cavity
Proposed antenna unit	26.2∼30.1	13.8%	6.1 (at 28.9 GHz)	0.37 × 0.11	Stacked patches
Proposed 2 × 2 array	27.2∼30.5	11.4%	9.3 (at 28.5 GHz)	0.37 × 0.11 with d = 0.47$\lambda$0	Stacked patches

shows a performance comparison between our design and the micromachined antennas in the previously reported articles. Our proposed antennas with wide band and high gain can be integrated in a 3-D manner with other components. The compact size can be used in highly integrated multi-functional systems.

5. Conclusions

In this paper, a wideband stacked patch antenna consisting of three HRSi substrates was proposed. The design approach was demonstrated step by step with the guidance of CMA. The antenna unit and 2 × 2 subarray operating at Ka-band were fabricated through bulk silicon micromachining and wafer bonding processes for validation. The measured results showed a bandwidth of 13.8% and 11.4% for the antenna unit and the 2 × 2 array, with a boresight gain of 6.1 dBi and 9.3 dBi, respectively. With this enhanced performance, a cost-effective and practical AiP design on silicon, which has the advantages of high integration and mechanical reliability, can be used for highly integrated millimeter-wave phased arrays.