Next Article in Journal
Oriented Collagen Scaffolds for Tissue Engineering
Next Article in Special Issue
Study of Direct-Contact HfO2/Si Interfaces
Previous Article in Journal / Special Issue
Comprehensive Study of Lanthanum Aluminate High-Dielectric-Constant Gate Oxides for Advanced CMOS Devices
Article Menu

Export Article

Open AccessReview
Materials 2012, 5(3), 478-500; doi:10.3390/ma5030478

Ultimate Scaling of High-κ Gate Dielectrics: Higher-κ or Interfacial Layer Scavenging?

IBM Thomas J. Watson Research Center, Yorktown Heights, New York, NY 10598, USA
Received: 29 January 2012 / Revised: 11 February 2012 / Accepted: 6 March 2012 / Published: 14 March 2012
(This article belongs to the Special Issue High-k Materials and Devices)
View Full-Text   |   Download PDF [597 KB, uploaded 15 March 2012]   |  


Current status and challenges of aggressive equivalent-oxide-thickness (EOT) scaling of high-κ gate dielectrics via higher-κ ( > 20) materials and interfacial layer (IL) scavenging techniques are reviewed. La-based higher-κ materials show aggressive EOT scaling (0.5–0.8 nm), but with effective workfunction (EWF) values suitable only for n-type field-effect-transistor (FET). Further exploration for p-type FET-compatible higher-κ materials is needed. Meanwhile, IL scavenging is a promising approach to extend Hf-based high-κ dielectrics to future nodes. Remote IL scavenging techniques enable EOT scaling below 0.5 nm. Mobility-EOT trends in the literature suggest that short-channel performance improvement is attainable with aggressive EOT scaling via IL scavenging or La-silicate formation. However, extreme IL scaling (e.g., zero-IL) is accompanied by loss of EWF control and with severe penalty in reliability. Therefore, highly precise IL thickness control in an ultra-thin IL regime ( < 0.5 nm) will be the key technology to satisfy both performance and reliability requirements for future CMOS devices. View Full-Text
Keywords: high-κ; metal gate; scavenging; higher-κ; EOT; MOSFET high-κ; metal gate; scavenging; higher-κ; EOT; MOSFET

This is an open access article distributed under the Creative Commons Attribution License (CC BY 3.0).

Scifeed alert for new publications

Never miss any articles matching your research from any publisher
  • Get alerts for new papers matching your research
  • Find out the new papers from selected authors
  • Updated daily for 49'000+ journals and 6000+ publishers
  • Define your Scifeed now

SciFeed Share & Cite This Article

MDPI and ACS Style

Ando, T. Ultimate Scaling of High-κ Gate Dielectrics: Higher-κ or Interfacial Layer Scavenging? Materials 2012, 5, 478-500.

Show more citation formats Show less citations formats

Related Articles

Article Metrics

Article Access Statistics



[Return to top]
Materials EISSN 1996-1944 Published by MDPI AG, Basel, Switzerland RSS E-Mail Table of Contents Alert
Back to Top