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Article

Near State Vector Selection-Based Model Predictive Control with Common Mode Voltage Mitigation for a Three-Phase Four-Leg Inverter

1
Power Electronics and Renewable Energy Laboratory, Department of Electrical Engineering, University of Malaya, Kuala Lumpur 50603, Malaysia
2
Department of Computer System & Technology, University of Malaya, Kuala Lumpur 50603, Malaysia
3
School of Engineering, Deakin University, Waurn Ponds, Victoria 3216, Australia
*
Author to whom correspondence should be addressed.
Energies 2017, 10(12), 2129; https://doi.org/10.3390/en10122129
Submission received: 25 October 2017 / Revised: 7 December 2017 / Accepted: 8 December 2017 / Published: 14 December 2017

Abstract

:
A high computational burden is required in conventional model predictive control, as all of the voltage vectors of a power inverter are used to predict the future behavior of the system. Apart from that, the common mode voltage (CMV) of a three-phase four-leg inverter utilizes up to half of the DC-link voltage due to the use of all of the available voltage vectors. Thus, this paper proposes a near state vector selection-based model predictive control (NSV-MPC) scheme to mitigate the CMV and reduce computational burden. In the proposed technique, only six active voltage vectors are used in the predictive model, and the vectors are selected based on the position of the future reference vector. In every sampling period, the position of the reference current is used to detect the voltage vectors surrounding the reference voltage vector. Besides the six active vectors, one of the zero vectors is also used. The proposed technique is compared with the conventional control scheme in terms of execution time, CMV variation, and load current ripple in both simulation and an experimental setup. The LabVIEW Field programmable gate array rapid prototyping controller is used to validate the proposed control scheme experimentally, and demonstrate that the CMV can be bounded within one-fourth of the DC-link voltage.

1. Introduction

Photovoltaic (PV) energy has become an attractive renewable energy source due to its user-friendly operation, straightforward structure, easy installation, and close setup to the user. In PV energy conversion and distribution systems, three-phase four-leg inverters are becoming popular in specific applications such as standalone [1] and Uninterruptible power supply (UPS) systems [2], as well as in islanded mode when the grid supply has failed [3]. A standalone PV system has to provide uninterrupted and balanced/unbalanced power for utilities such as data communication, aircraft, home appliances, satellite stations, and railway systems [4]. However, delivering an unbalanced load is a commercial and industrial issue in an energy conversion system. A four-wire three-leg inverter can be used to deliver unbalanced power, but it has the drawback of low utilization DC-link voltage. The potential difference between the star point and the midpoint of DC-link capacitors is forced to zero; therefore, the star point of the load is not free [5,6]. Thus, four-leg inverters have been introduced that can provide zero sequence paths, and are thus preferred over three-leg inverters to distribute power to the balanced/unbalanced loads. Moreover, three-phase four-leg inverters can overcome the low voltage DC-link utilization of the three-phase four-wire system [7]. Due to the additional leg, the control vectors increase from 8 (23) to 16 (24), which increases the number of switching actions in every switching period [8,9,10]. However, the common mode voltage (CMV) between the load-neutral point and the midpoint of the DC-link capacitors of the three-phase four-leg inverter causes radiation in the electromagnetic interference, system losses, and threats to personal safety [11].
In order to overcome these problems, the CMV has to be mitigated or reduced. This can be achieved actively or passively. In active mitigation, active circuits such as transistors and capacitors are used. Meanwhile, passive components are used in passive mitigation [12]. Owing to hardware additions or modifications, these methods lead to increases in size and higher costs, and thus cannot be directly applicable to high-voltage systems. Thus, research is progressing towards software invention or modification through improving the control algorithm. The improvement in software can be divided into two main types. The first type is achieved with a modulation-based control algorithm. In a three-phase four-leg inverter, CMV can be kept constant at ± v d c 2 ( v d c is the DC-link voltage) by improving the modulation mode with the Boolean logic function [13]. A pulse width modulation (PWM) block that avoids the zero-voltage vector has been introduced to alleviate the CMV in [14]. A control scheme with six switching states for the three-phase four-leg inverter is proposed to ensure the zero CMV in [15]. However, this switching scheme cannot be practically implemented for the unbalanced condition due to the utilization of the restricted voltage vector in a conventional method. The aforementioned PWM-based control algorithms consist of a modulation stage and an inner control loop with proportional–integral (PI) controllers. In the second type of improvement scheme, an easier and more powerful control method, the finite control set model predictive control (FCS-MPC) is used. The FCS-MPC considers a finite number of valid switching states to predict the behavior of the system through a discrete model in every sampling period [16,17,18,19]. The FCS-MPC uses a cost function to carry out the optimization in the prediction. The predefined cost function is used to compare each prediction with its respective reference, and the switching state that produces the minimum value of the cost function is applied to the inverter. This process is repeated in every sampling period as mentioned in [9,20,21,22], and thus, no modulation stage is required in this technique. The implementation of the FCS-MPC is very easy and simple, and it has fast a dynamic response in spite of its constraints and nonlinearity inclusion [8,23,24,25]. However, since the FCS-MPC algorithm predicts the control variables based on the system model, it puts a high computational burden on the controller [20,26,27]. This FCS-MPC-based control technique also can be used to restrict the CMV within ± v d c 6 by utilizing six non-zero voltage vectors in the three-phase three-leg inverter [28]. The FCS-MPC method can reduce the CMV and control the load current for the three-phase three-leg inverter, as mentioned in [28,29,30]. Meanwhile, in [29], the load current ripple and CMV are reduced, but the process of selecting two non-zero voltage vectors in each sampling period and determining each vector duration is very complex. This greatly increases the computation complexity. Guo et al. [31] proposed the use of four non-zero voltage vectors in order to reduce the CMV for three-phase three-leg inverters to ± v d c 6 , but the complicated switching selection between opposite voltage vectors increases the switching losses. In [32], the CMV factor is inserted into the cost function in order to reduce the CMV, but this increases the ripple content in the load current. In recent works, there is a lack of CMV mitigation with reduced computational burden, and most of the research studies have focused on the three-phase three-leg inverter. Thus, further research work is required for the three-phase four-leg inverter.
In this paper, a near state vector selection-based MPC (NSV-MPC) is proposed in order to reduce the CMV with reduced computational burden for a three-phase four-leg inverter. Based on near state voltage vector, a cost function is used in the predictive model to determine the optimal switching voltage vector from the vectors that surround the future reference voltage vector. The reference voltage vector and its NSV are determined by the future reference currents. In order to reduce the CMV, the zero-switching voltage vector has to be eliminated from the switching state, because it is causing a high CMV. Thus, only six switching states are required to predict the future voltage vector. Consequently, only six repeated iterations are required in every sampling period, which reduces the computational burden.
The rest of this paper is structured as follows: the mathematical models for the inverter-load system are derived in Section 2. Then, the model predictive control for three-phase four-leg inverter is explained in Section 3, and the proposed control technique is described in Section 4. The proposed system is then validated through simulation, and the experimental results are given in Section 5. Afterwards, the robustness and performance analysis are discussed in Section 6. Then, the appropriate conclusions are drawn in Section 7.

2. Three-Phase Four-Leg Inverter Model

A three-phase four-leg inverter topology with the output resistive-inductive (R-L) filter is shown in Figure 1. The neutral leg in the inverter topology is used to control the zero-sequence current. The neutral inductor is introduced in the fourth leg to attenuate the switching current ripple to be the same as the other legs. Besides, the neutral inductor limits the fault current during short circuit or unbalanced loading conditions [15,33]. Therefore, neutral inductance L f n is connected at the neutral leg in the practical applications [34,35].
The paired insulated-gate bipolar transistor (IGBT) switches in each of the four legs turn on and off in a complementary mode. If the upper switch of one leg is turned on, the lower one is turned off, and vice versa. The CMV is the potential difference between the midpoint of the DC-link capacitors and the load-neutral point (vmo), as shown in Figure 1. The CMV can be expressed in terms of the voltage on each leg, as shown in [36]:
v m o = v x o + v y o + v z o + v n o 4
where v x o , v y o , v z o , and v n o are the voltages between the terminal and the midpoint of the DC-link. Based on the switching states, the phase voltages can have either voltages level + v d c 2 or v d c 2 . Therefore, depending on the 16 switching states of the three-phase four-leg inverter, the CMV can have the values ± v d c 2 , 0 ,   and   ± v d c 4 .
According to Kirchhoff’s voltage law, the inverter’s output voltages can be written as follows:
v = ( R f + R ) i + L f d i d t + v m H
where:
v = [ v x H v y H v z H   v n H ] T
i = [ i x i y i z   i n ] T
R f + R = [ R f x + R x R f y + R y R f z + R z   R f n ] T
L f = [ L f x L f y L f z   L f n ] T
i n + i x + i y + i z = 0
where, v is the load voltage vector, i is the load vector current, R f is the filter resistance, R is the load resistance, L f is the filter inductance, and v m H is the voltage between the load-neutral and the DC-link negative point (H).
The voltages of each leg from the DC-link negative point (H) can be written as:
v j H = S j v d c ,   j = x , y , z , n
where v d c is the DC-link voltage, and S j is the switching state of leg j. The derivative from Equation (2) can be written in continuous form in terms of the load current vector, as shown in Equation (4):
d i d t = 1 L f [ ( v v m H ) ( R f + R ) i ]
The load-neutral voltage ( v m H ) can be expressed from Equations (3) and (4) as:
v m H = L e q v d c k = x , y , z , n S k L f k L e q   k = x , y , z , n R f k + R k L f k i k
with L e q = ( 1 L f x + 1 L f y + 1 L f z + 1 L f n ) 1 .
The system state space representation from Equation (2) is as follows, as seen in [26]:
x = A x + B u y = C x
with x = [ i x i y i z ] T and u = [ v x n v y n v z n ] T , where x is the state variable vector, u is the input variable vector, and y is the output variable vector. Matrix A, B, and C are as follows:
A = [ R f X + R X L f X + L e q L f X ( R f X + R X L f X R f n L f n ) L e q L f x ( R f y + R y L f y R f n L f n ) L e q L f x ( R f z + R z L f z R f n L f n ) L e q L f y ( R f x + R x L f x R f n L f n ) R f y + R y L f y + L e q L f y ( R f y + R y L f y R f n L f n ) L e q L f y ( R f z + R z L f z R f n L f n ) L e q L f z ( R f x + R x L f x R f n L f n ) L e q L f z ( R f y + R y L f y R f n L f n ) R f z + R z L f z + L e q L f z ( R f z + R z L f z R f n L f n ) ]
B = [ v d c L f x ( 1 L e q L f x ) v d c L f x   L e q L f y v d c L f x   L e q L f z v d c L f y   L e q L f x v d c L f y ( 1 L e q L f y ) v d c L f y   L e q L f z v d c L f z   L e q L f x v d c L f z   L e q L f y v d c L f z ( 1 L e q L f z ) ]
C = [ 1 0 0 0 1 0 0 0 1 ] .

3. Model Predictive Control Method of Three-Phase Four-Leg Inverter

In order to implement the FCS-MPC algorithm on a microprocessor-based hardware, the discrete model has to be used in the analysis of the FCS-MPC algorithm. In the digital implementation, a discrete time model is used to predict the future current’s value at a sampling interval (k). The inverter output current i at kth and (k + 1)th instant with sampling time T s can be calculated by using the solution of Equation (6) at the initial and final time as follows:
i ( ( k + 1 ) T s ) = e A ( k + 1 ) T s i ( 0 ) + e A ( k + 1 ) T s 0 ( k + 1 ) T s e A τ B v ( τ ) d τ
i ( k T s ) = e A k T s i ( 0 ) + e A k T s 0 k T s e A τ B v ( τ ) d τ
i ( ( k + 1 ) T s ) can be obtained by solving Equations (7) and (8) as below:
i ( ( k + 1 ) T s ) = e A T s i ( k T s ) + e A ( k + 1 ) T s [ 0 ( k + 1 ) T s e A τ B v ( τ ) d τ 0 k T s e A τ B v ( τ ) d τ ]
Then, Equation (10) is obtained by changing the variable of integration in Equation (9):
i ( ( k + 1 ) T s ) = e A T s i ( k T s ) + A 1 ( G I 3 × 3 ) B v ( k + 1 ) T s
The output current can be obtained at (k + 1)th from Equation (10) as:
i(k + 1) = Gi(k) + Qv(k + 1)
where:
G = e A T s
Q = A 1 ( G I 3 × 3 ) B
The identity matrix I 3 × 3 , the inverse of matrix A, and matrices G and Q are calculated offline in MATLAB (R2014a, MathWorks, Natick, MA, USA). The load current and DC-link voltage are required to predict the output current.
Each predicted future current is compared with its respective current reference in order to select the optimal switching state by using the cost function according to the following equation:
g a ( k + 1 ) = | i * ( k + 1 ) i ( k + 1 ) |        = | i x * ( k + 1 ) i x ( k + 1 ) | + | i y * ( k + 1 ) i y ( k + 1 ) | + | i z * ( k + 1 ) i z ( k + 1 ) |
The Sinusoidal current references are obtained by Sine Wave Generator using LabVIEW field programmable gate array (FPGA) at kth instant. Then, the required extrapolation can be achieved by using the fourth-order Lagrange extrapolation method [20].
i * ( k + 1 ) = 4 i * ( k ) 6 i * ( k 1 ) + 4 i * ( k 2 ) i * ( k 3 )
When the sampling period is very small ( T s < 20 μs), no extrapolation is required. In that case, i * ( k + 1 ) = i * ( k ) . The fourth leg has to change the switching state according to the switching state changes of three phases in order to control the zero-sequence current. Hence, the changing rate of the switching state in the fourth leg is higher, and it operates at a higher switching frequency as compared with the average switching frequency. Therefore, the switching loss of the fourth leg is higher. In order to compensate for the losses caused by the neutral-leg switching frequency, its constrain has been included in the cost function as follows:
g b ( k + 1 ) = w s w c × s w c n
where w s w c is the weighting factor. The guidelines of weighting factor selection have been given in [37]. Equation (14) must be achieved in order to improve the performance in reference current tracking and reduce the switching losses. Hence, w s w c is important in order to empirically achieve the improvement in performance. The number of switching in the fourth leg can be achieved as follows [38]:
s w c n = | S n ( k + 1 ) S n ( k o p t ) |
where S n ( k + 1 ) is the predicted neutral leg gate signal, and S n ( k o p t ) is the optimal gate signal in the previous sample, k. The objective of Equation (15) is to force the predicted switching signal to remain at the same signal as the previous state. Then, the overall cost function can be expressed as follows:
g ( k + 1 ) = g a ( k + 1 ) + g b ( k + 1 )
The objective of this cost function is to optimize the error close towards zero.

4. Near State Vector Selection-Based Model Predictive Control

The lines to neutral voltages for all of the 16 switching vectors of a three-phase four-leg inverter are shown in Table 1. The lines to neutral voltages are transformed from abc into αβγ coordinates by using Equation (17). The results of the transformation are shown in Table 2.
T = [ 2 3 1 3 1 3 0 1 3 1 3 1 3 1 3 1 3   ]
In the three-dimensional coordinate system of a three-phase four-leg inverter, there are six prisms to represent the switching voltage vectors. These prisms can be divided into six sectors (from I to VI) such that each sector is combined with half of the two adjacent prisms, as shown in Figure 2a. The projection of the reference vector on the αβ coordinate is used to determine the sector of the reference vector. There are six active vectors and two zeros vectors in each sector.
In order to reduce the CMV and utilize high DC-link voltage, six active switching vectors are selected to synthesize the reference in each sector. As shown in Figure 2b, all of the sectors occupied 60° on the αβ plane, with sector I in the range of 330° to 30°, and followed by the other sectors. In order to minimize the current and harmonic content, near state switching vectors should be selected that are adjacent to the reference vector. It is seen that two prisms in each sector consist of two tetrahedrons, and there are eight switching vectors adjacent to the reference vector, four of which are selected based on the minimization of CMV and switching loss. The position of the reference vector is determined by the NSV-MPC at every sampling period. The active voltage vectors surrounding the determined reference vector are selected based on the position of the reference voltage vector. The optimal vector candidate is included among the selected voltage vectors. As shown in Figure 2c, if the reference switching vector is in sector I, four non-zero switching vectors are required to synthesize the reference vector. Therefore, two sets (Set-a and Set-b) of four switching vectors are selected in each sector. It is clear that two switching vectors (PNNP and PNNN) are chosen in both sets. Hence, there are six different switching vectors in one sector.
The voltage vector closest to the reference voltage vector is selected by evaluating the six active vectors through the predictive model mentioned in Section 3. The optimal voltage vector is selected from the six active vectors by using the cost function in Equation (15).
The model predictive control technique based on the near state voltage vector can be employed to find the closest voltage vector, which reduces the error between the desired and reference currents. From the predefined sectors, the proposed control method predicts the reference vector in each sampling time. Six active vectors are selected from the 14 active vectors that surround the reference vector based on the near state vectors listed in Table 3. This ensures that the CMV is confined within ± v d c 4 , and at the same time reduces the computational burden, as only six active vectors are used, instead of 14 vectors. However, this increases the ripple content marginally in the load current as conventional MPC. In order to overcome the problem, one zero vector—either PPPP or NNNN—can be used together with the six active vectors at each control cycle, and this causes the CMV to vary between + v d c 4 and − v d c 2 or − v d c 4 and + v d c 2 . Therefore, seven voltage vectors are selected to determine the voltage vector that is closest to the reference vector in the proposed NSV-MPC. In both cases, the computational burden is also reduced due to the reduction of switching vectors from 16 to six (considering only active vectors), and seven (including one zero vector), as shown Figure 3. As a result, NSV-MPC demonstrates the better performance with reduced computational burden.
A step-by-step implementation procedure for NSV-MPC is summarized below:
Step 1.
Measure the load currents i(k) and calculate the reference currents i*(k + 1) by using Equation (13)
Step 2.
Identify the sector on the αβ plane in the αβγ coordinate and the corresponding voltage vectors at every sampling period.
Step 3.
Predict the future voltage vector for all of the possible switching states from the identified sector from Table 3.
Step 4.
Predict the load currents i(k + 1) of all of the possible switching states from the identified sector at the next sampling time by using Equation (11).
Step 5.
Evaluate the cost function g(k + 1) by using Equation (16).
Step 6.
7Select the switching state that optimizes the cost function.
Step 7.
7Apply the selected switching action to fire the inverter switches.

5. Simulation and Experimental Results

The proposed NSV-MPC has been validated in simulation by using Matlab/Simulink. Then, it is also validated through experimental implementation with a three-phase four-leg inverter laboratory prototype. The parameters of the inverter are as specified in Table 4. The experimental test was carried out using a field programmable gate array (FPGA)-based controller, and it can be used to implement the parallel processing technique of the model predictive controller to enhance the system dynamic response.

5.1. Experimental Setup

The current references were read by the NI LabVIEW FPGA 2015 module, which connected to a host computer. Figure 4 depicts the project setup in the laboratory. A National Instrument Single-Board RIO General Purpose Inverter Controller (GPIC) NI-sbRIO9606 with mezzanine card NI 9683 on-board was utilized to acquire the analogue input and generate the digital control signal output to the gate drive of the inverter. The prescaled current sensor LA25NP and voltage transducer LV25N were utilized to acquire appropriate analogue signals before sending them to the simultaneous analogue input from the GPIC board. The CMV was measured by using a Pintek DP-25 Differential Probe. The waveforms of the three-phase load currents and the CMV were measured with a LeCroy Wave Runner oscilloscope.

5.2. Results and Performance Analysis

All of the experimental results in this section were obtained by using the weighting factor w s w c = 0.5 and sampling time T s = 50   μ s . The same experimental validation was carried out for both conventional MPC and NSV-MPC. Ideally, the DC-link capacitors of a two-level four-leg inverter share equal voltages due to utilizing the full DC-link voltage by adopting the switching scheme. Three cases were considered in this work:
Case 1.
All available voltage vectors in conventional MPC at every sampling time.
Case 2.
One zero vector—either PPPP or NNNN—with six active vectors in proposed NSV-MPC at every sampling time.
Case 3.
Six active vectors in proposed NSV-MPC at every sampling time.
In the first case, a conventional MPC utilized 16 switching vectors to predict the future reference vector in each control cycle. Hence, the CMV was high, and required a large computational burden due to the high calculation time required to select the desire voltage vector. The peak value of CMV oscillated between − v d c 2 and + v d c 2 due to the alternating use of two zero vectors in the control algorithm, as illustrated in Figure 5.
In the second case, the NSV−MPC scheme utilized only one zero vector—either PPPP or NNNN—together with six active vectors at every sampling time. As shown in Figure 6, the one-sided peak value of CMV is large, and varies between v d c 4 and − v d c 2 or between v d c 4 and v d c 2 respectively, due to the use of one zero vector. The computational burden is reduced since the number of switching voltage vectors is reduced.
In the third case, the proposed NSV-MPC was applied by using only six active vectors in each sampling instant to significantly reduce the peak-to-peak value of the CMV. Consequently, the calculation burden is also reduced through using a reduced number of switching vectors. Even though the ripple content in the load current is marginally higher than in Case 2, it is still in an allowable range. The CMV is confined within ± v d c 4 , as shown in Figure 7.
The Fast Fourier Transform (FFT) analysis of CMV was obtained using the powergui/FFT Analysis Toolbox of Matlab/Simulink software. The results of the mentioned cases are illustrated in Figure 8. As shown in the figures, the CMVs of the proposed NSV-MPC are significantly reduced as compared with the conventional MPC, which is due to the reduced number of voltage vectors in NSV-MPC.
Figure 9 illustrates the unbalanced loading condition and the transient analysis of the proposed NSV-MPC method with balanced loads and filters. Figure 9a represents the unbalanced references connected to the balanced load and filter parameters. The unbalanced current flow in the fourth leg is known as the zero-sequence current, which is detected by adding the vectors of three phase currents. Figure 9b shows the response of a step change in phase -y and -z references from 10 A to 5 A. During the transient instant, the inverter load currents tracked their corresponding reference very well for the step change condition. In these cases, NSV-MPC showed the fast-dynamic response during the transient state.

6. Robustness Analysis and Performance Evaluation

The performance and robustness analyses of the proposed control scheme are performed in the following section.

6.1. Robustness Analysis of Model Parameter Variations

The controller accuracy depends on the system parameters and the discrete predictive model. The effectiveness of the NSV-MPC was tested through robustness analysis by varying the system parameters. The response of the proposed system against the inductive filter variation was validated through both simulation and an experiment. Two cases were carried out: (a) CF: Change in inductive filter but no change in controller, where the filter’s inductance changed from 6 mH to 18 mH without providing the information of the filter changes to the controller. (b) CCF: Changes to both the filter as well as to the controller, where the changed filter values are given to the controller to evaluate the effectiveness. In Figure 10a, the percentages of total harmonic distortion (THD) with respect to the variation of inductive value have been shown.

6.2. Reference Current Tracking Error

Each leg of the three-phase four-leg inverter generated an independent voltage to control the zero-sequence voltage or current. The reference current tracking error of the proposed control scheme is very accurate. Figure 10b shows the reference and measured currents, and Figure 10c shows that the tracking error of current ( i x * ( k ) i x ( k ) ) in phase x is confined within ±0.82 A. The percentage of reference tracking error with respect to the load current can be calculated from the reference and load current as follows:
i e r r o r _ b ( % ) = 1 a k a | i b * ( k ) i b ( k ) | i b ( k ) r m s
where b = x, y, z and a = 2001 is the number of samples used in simulation.
The peak-to-peak value of CMV, THD (%) of load current, and execution time of the proposed system were collected to assess the performance of the system. The proposed NSV-MPC technique improved the processing time by reducing the computational burden through using fewer numbers of voltage vectors in every control cycle. The number of ticks (1 tick = 25 ns) required by the proposed controller in completing each iteration of the control loop with a LabVIEW FPGA-based platform was less than the conventional controller. The comparisons of NSV-MPC and conventional MPC are illustrated in Table 5 and Table 6.

7. Conclusions

In this paper, the NSV-MPC method was proposed to mitigate CMV as well as reduce computational burden. The proposed NSV-MPC method determined the active vectors based on the reference vector position, and was able to confine CMV within ± v d c 4 . Moreover, this control technique reduced the computational burden by using a minimum number of usable voltage vectors in every sampling period. The experimental results for all of the possible combinations of switching vector selection were demonstrated to show the effectiveness of the proposed control method as compared with the conventional model predictive control. Besides, the load currents were able to track their references accurately. The steady state and transient state response showed the robustness and the effectiveness of the proposed control method.

Author Contributions

Abdul Mannan Dadu has contributed to the theoretical analysis, simulation and experimental verification, and preparing the article; Saad Mekhilef has contributed to preparing the article; Tey Kok Soon, Mehdi Seyedmahmoudian and Ben Horan has contributed to the theoretical analysis and preparing the article.

Conflicts of Interest

The authors declare no conflict of interest.

References

  1. Philip, J.; Jain, C.; Kant, K.; Singh, B.; Mishra, S.; Chandra, A.; Al-Haddad, K. Control and Implementation of a Standalone Solar Photovoltaic Hybrid System. IEEE Trans. Ind. Appl. 2016, 52, 3472–3479. [Google Scholar] [CrossRef]
  2. Pichan, M.; Rastegar, H. Sliding Mode Control of Four-Leg Inverter with Fixed Switching Frequency for Uninterruptible Power Supply Applications. IEEE Trans. Ind. Electron. 2017, 64, 6805–6814. [Google Scholar] [CrossRef]
  3. Rodriguez, C.T.; Fuente, D.V.D.L.; Garcera, G.; Figueres, E.; Moreno, J.A.G. Reconfigurable Control Scheme for a PV Microinverter Working in Both Grid-Connected and Island Modes. IEEE Trans. Ind. Electron. 2013, 60, 1582–1595. [Google Scholar] [CrossRef]
  4. Singh, B.; Sharma, S. Design and Implementation of Four-Leg Voltage-Source-Converter-Based VFC for Autonomous Wind Energy Conversion System. IEEE Trans. Ind. Electron. 2012, 59, 4694–4703. [Google Scholar] [CrossRef]
  5. Liang, J.; Green, T.C.; Feng, C.; Weiss, G. Increasing Voltage Utilization in Split-Link, Four-Wire Inverters. IEEE Trans. Power Electron. 2009, 24, 1562–1569. [Google Scholar] [CrossRef]
  6. Karanki, S.B.; Geddada, N.; Mishra, M.K.; Kumar, B.K. A Modified Three-Phase Four-Wire UPQC Topology With Reduced DC-Link Voltage Rating. IEEE Trans. Ind. Electron. 2013, 60, 3555–3566. [Google Scholar] [CrossRef]
  7. Kim, J.-H.; Sul, S.-K. A carrier-based PWM method for three-phase four-leg voltage source converters. IEEE Trans. Power Electron. 2004, 19, 66–75. [Google Scholar] [CrossRef]
  8. Yaramasu, V.; Rivera, M.; Narimani, M.; Bin, W.; Rodriguez, J. Model Predictive Approach for a Simple and Effective Load Voltage Control of Four-Leg Inverter With an Output Filter. IEEE Trans. Ind. Electron. 2014, 61, 5259–5270. [Google Scholar] [CrossRef]
  9. Rivera, M.; Yaramasu, V.; Rodriguez, J.; Bin, W. Model Predictive Current Control of Two-Level Four-Leg Inverters Part II: Experimental Implementation and Validation. IEEE Trans. Power Electron. 2013, 28, 3469–3478. [Google Scholar] [CrossRef]
  10. Brando, G.; Dannier, A.; Del Pizzo, A.; Di Noia, L.P.; Spina, I. Quick and high performance direct power control for multilevel voltage source rectifiers. Electr. Power Syst. Res. 2015, 121, 152–169. [Google Scholar] [CrossRef]
  11. Salem, A.; Abdallh, A.; Rasilo, P.; Belie, F.D.; Ibrahim, M.N.; Dupré, L.; Melkebeek, J. The Effect of Common-Mode Voltage Elimination on the Iron Loss in Machine Core Laminations of Multilevel Drives. IEEE Trans. Mag. 2015, 51, 1–4. [Google Scholar] [CrossRef]
  12. Hedayati, M.H.; Acharya, A.B.; John, V. Common-Mode Filter Design for PWM Rectifier-Based Motor Drives. IEEE Trans. Power Electron. 2013, 28, 5364–5371. [Google Scholar] [CrossRef]
  13. Guo, X.; He, R.; Jian, J.; Lu, Z.; Sun, X.; Guerrero, J.M. Leakage Current Elimination of Four-Leg Inverter for Transformerless Three-Phase PV Systems. IEEE Trans. Power Electron. 2016, 31, 1841–1846. [Google Scholar] [CrossRef]
  14. Un, E.; Hava, A.M. A Near-State PWM Method With Reduced Switching Losses and Reduced Common-Mode Voltage for Three-Phase Voltage Source Inverters. IEEE Trans. Ind. Appl. 2009, 45, 782–793. [Google Scholar] [CrossRef]
  15. Liu, Z.; Liu, J.; Li, J. Modeling, Analysis, and Mitigation of Load Neutral Point Voltage for Three-Phase Four-Leg Inverter. IEEE Trans. Ind. Electron. 2013, 60, 2010–2021. [Google Scholar] [CrossRef]
  16. Bakeer, A.; Ismeil, M.; Orabi, M. A Powerful Finite Control Set-Model Predictive Control Algorithm for quasi Z-Source Inverter. IEEE Trans. Ind. Inform. 2016, 12, 1371–1379. [Google Scholar] [CrossRef]
  17. Geyer, T.; Quevedo, D.E. Multistep Finite Control Set Model Predictive Control for Power Electronics. IEEE Trans. Power Electron. 2014, 29, 6836–6846. [Google Scholar] [CrossRef]
  18. Chen, Q.; Luo, X.; Zhang, L.; Quan, S. Model Predictive Control for Three-Phase Four-Leg Grid-Tied Inverters. IEEE Access 2017, 5, 2834–2841. [Google Scholar] [CrossRef]
  19. Dadu, A.; Tey, K.S.; Mekhilef, S.; Nakaoka, M. Lyapunov law based model predictive control scheme for grid connected three phase three level neutral point clamped inverter. In Proceedings of the 2017 IEEE 3rd International Future Energy Electronics Conference and ECCE Asia, Kaohsiung, Taiwan, 3–7 June 2017. [Google Scholar]
  20. Yaramasu, V.; Rivera, M.; Bin, W.; Rodriguez, J. Model Predictive Current Control of Two-Level Four-Leg Inverter Part I: Concept, Algorithm, and Simulation Analysis. IEEE Trans. Power Electron. 2013, 28, 3459–3468. [Google Scholar] [CrossRef]
  21. Chen, Y.; Liu, T.H.; Hsiao, C.F.; Lin, C.K. Implementation of adaptive inverse controller for an interior permanent magnet synchronous motor adjustable speed drive system based on predictive current control. IET Electr. Power Appl. 2015, 9, 60–70. [Google Scholar] [CrossRef]
  22. Zhang, Y.; Yang, H.; Xia, B. Model predictive torque control of induction motor drives with reduced torque ripple. IET Electr. Power Appl. 2015, 9, 595–604. [Google Scholar] [CrossRef]
  23. Geyer, T.; Quevedo, D.E. Performance of Multistep Finite Control Set Model Predictive Control for Power Electronics. IEEE Trans. Power Electron. 2015, 30, 1633–1644. [Google Scholar] [CrossRef]
  24. Rodriguez, J.; Kazmierkowski, M.P.; Espinoza, J.R.; Zanchetta, P.; Abu-Rub, H.; Young, H.A.; Rojas, C.A. State of the Art of Finite Control Set Model Predictive Control in Power Electronics. IEEE Trans. Ind. Inform. 2013, 9, 1003–1016. [Google Scholar] [CrossRef]
  25. Uddin, M.; Mekhilef, S.; Rivera, M. Experimental validation of minimum cost function-based model predictive converter control with efficient reference tracking. IET Power Electron. 2015, 8, 278–287. [Google Scholar] [CrossRef]
  26. Rivera, M.; Yaramasu, V.; Llor, A.; Rodriguez, J.; Wu, B.; Fadel, M. Digital Predictive Current Control of a Three-Phase Four-Leg Inverter. IEEE Trans. Ind. Electron. 2013, 60, 4903–4912. [Google Scholar] [CrossRef]
  27. Akter, M.P.; Mekhilef, S.; Tan, N.M.L.; Akagi, H. Modified Model Predictive Control of a Bidirectional AC-DC Converter Based on Lyapunov Function for Energy Storage Systems. IEEE Trans. Ind. Electron. 2016, 63, 704–715. [Google Scholar] [CrossRef]
  28. Hoseini, S.K.; Adabi, J.; Sheikholeslami, A. Predictive modulation schemes to reduce common-mode voltage in three-phase inverters-fed AC drive systems. IET Power Electron. 2014, 7, 840–849. [Google Scholar] [CrossRef]
  29. Kwak, S.; Mun, S.K. Model Predictive Control Methods to Reduce Common-Mode Voltage for Three-Phase Voltage Source Inverters. IEEE Trans. Power Electron. 2015, 30, 5019–5035. [Google Scholar] [CrossRef]
  30. Vazquez, S.; Leon, J.I.; Franquelo, L.G.; Rodriguez, J.; Young, H.A.; Marquez, A.; Zanchetta, P. Model Predictive Control: A Review of Its Applications in Power Electronics. IEEE Ind. Electron. Mag. 2014, 8, 16–31. [Google Scholar] [CrossRef] [Green Version]
  31. Guo, L.; Zhang, X.; Yang, S.; Xie, Z.; Cao, R. A Model Predictive Control Based Common-Mode Voltage Suppression Strategy for Voltage Source Inverter. IEEE Trans. Ind. Electron. 2016, 63, 6115–6125. [Google Scholar] [CrossRef]
  32. Chen, X.; Chen, W.; Han, Y.; Sha, Y.; Qi, H.; Yang, X. Predictive current control method to reduce common-mode interference for three-phase induction motor. In Proceedings of the IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia), Hefei, China, 22–25 May 2016; pp. 2859–2862. [Google Scholar]
  33. Pettersson, S.; Salo, M.; Tuusa, H. Improving the performance of a three-leg four-wire active power filter with a neutral wire filter inductor. In Proceedings of the IEEE Compatibility in Power Electronics, Gdynia, Poland, 1 June 2005; pp. 101–107. [Google Scholar]
  34. Bayhan, S.; Abu-Rub, H.; Balog, R. Model Predictive Control of Quasi-Z Source Four-Leg Inverter. IEEE Trans. Ind. Electron. 2016, 63, 4506–4516. [Google Scholar] [CrossRef]
  35. Zhang, R.; Prasad, V.H.; Boroyevich, D.; Lee, F.C. Three-dimensional space vector modulation for four-leg voltage-source converters. IEEE Trans. Power Electron. 2002, 17, 314–326. [Google Scholar] [CrossRef]
  36. Yaramasu, V.; Bin, W.; Rivera, M.; Narimani, M.; Kouro, S.; Rodriguez, J. Generalised approach for predictive control with common-mode voltage mitigation in multilevel diode-clamped converters. IET Power Electron. 2015, 8, 1440–1450. [Google Scholar] [CrossRef]
  37. Cortes, P.; Kouro, S.; La Rocca, B.; Vargas, R.; Rodriguez, J.; Leon, J.I.; Vazquez, S.; Franquelo, L.G. Guidelines for weighting factors design in Model Predictive Control of power converters and drives. In Proceedings of the IEEE International Conference Industrial Technology, Gippsland, Australia, 10–13 February 2009; pp. 1–7. [Google Scholar]
  38. Jose, R.; Patricio, C. Cost Function Selection, Predictive Control of Power Converters and Electrical Drives; Wiley: Hoboken, NJ, USA, 2012; pp. 145–161. [Google Scholar]
Figure 1. Three-phase four-leg inverter with a field programmable gate array (FPGA) control block.
Figure 1. Three-phase four-leg inverter with a field programmable gate array (FPGA) control block.
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Figure 2. (a) Switching vectors and prisms (b) Projection of a sector on the αβ coordinate (c) Sector identification with near state vector selection (NSV).
Figure 2. (a) Switching vectors and prisms (b) Projection of a sector on the αβ coordinate (c) Sector identification with near state vector selection (NSV).
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Figure 3. Proposed near state vector selection-based model predictive control (NSV-MPC) block diagram.
Figure 3. Proposed near state vector selection-based model predictive control (NSV-MPC) block diagram.
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Figure 4. Experimental setup in the FPGA platform.
Figure 4. Experimental setup in the FPGA platform.
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Figure 5. Each phase current and common mode voltage (CMV) for Case 1 (a) Simulation result, (b) Experimental result (I = 10 A/div. CMV = 200 V/div. and 10 ms/div.).
Figure 5. Each phase current and common mode voltage (CMV) for Case 1 (a) Simulation result, (b) Experimental result (I = 10 A/div. CMV = 200 V/div. and 10 ms/div.).
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Figure 6. Each phase current and CMV for Case 2, first considering PPPP as the switching state: (a) Simulation result, (b) Experimental result; and considering NNNN as the switching state (c) Simulation result, (d) Experimental result (I = 10 A/div., CMV = 200 V/div. and 10 ms/div.).
Figure 6. Each phase current and CMV for Case 2, first considering PPPP as the switching state: (a) Simulation result, (b) Experimental result; and considering NNNN as the switching state (c) Simulation result, (d) Experimental result (I = 10 A/div., CMV = 200 V/div. and 10 ms/div.).
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Figure 7. Each phase current and CMV for Case 3 (a) Simulation result, (b) Experimental result (I = 10 A/div., CMV = 200 V/div. and 10 ms/div.).
Figure 7. Each phase current and CMV for Case 3 (a) Simulation result, (b) Experimental result (I = 10 A/div., CMV = 200 V/div. and 10 ms/div.).
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Figure 8. FFT analysis results of CMV (a) Conventional MPC, (b) Proposed NSV-MPC with PPPP vector, (c) Proposed NSV-MPC with NNNN vector, (d) Proposed NSV-MPC with active vectors only.
Figure 8. FFT analysis results of CMV (a) Conventional MPC, (b) Proposed NSV-MPC with PPPP vector, (c) Proposed NSV-MPC with NNNN vector, (d) Proposed NSV-MPC with active vectors only.
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Figure 9. (a) Unbalanced references in phase -y and -z from 10 A to 5A with balanced resistive loads and filters, and (b) Step change in phase -y and -z references from 10 A to 5A with the proposed NSV-MPC technique.
Figure 9. (a) Unbalanced references in phase -y and -z from 10 A to 5A with balanced resistive loads and filters, and (b) Step change in phase -y and -z references from 10 A to 5A with the proposed NSV-MPC technique.
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Figure 10. The results of proposed NSV-MPC: (a) The percentages of THD with respect to variation in inductive value, (b) Reference and measured currents, (c) Current tracking error of phase x.
Figure 10. The results of proposed NSV-MPC: (a) The percentages of THD with respect to variation in inductive value, (b) Reference and measured currents, (c) Current tracking error of phase x.
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Table 1. The switching states with phase voltages in the abc coordinate.
Table 1. The switching states with phase voltages in the abc coordinate.
Switching StatesPhase Voltage in abc CoordinateSwitching StatesPhase Voltage in abc Coordinate
v x n v y n v z n v x n v y n v z n
PPPP000PPPN v d c v d c v d c
NNNP v d c v d c v d c NNNN000
PNNP 0 v d c v d c PNNN v d c 0 0
PPNP 0 0 v d c PPNN v d c v d c 0
NPNP v d c 0 v d c NPNN0 v d c 0
NPPP v d c 00NPPN0 v d c v d c
NNPP v d c v d c 0NNPN0 0 v d c
PNPP 0 v d c 0PNPN v d c 0 v d c
Table 2. The switching states with phase voltages in the αβγ coordinate.
Table 2. The switching states with phase voltages in the αβγ coordinate.
Switching StatesPhase Voltage in αβγ CoordinateSwitching StatesPhase Voltage in αβγ Coordinate
v α v β v γ v α v β v γ
PPPP000PPPN00 v d c
NNNP00 v d c NNNN000
PNNP 2 v d c 3 0 2 v d c 3 PNNN 2 v d c 3 0 v d c 3
PPNP v d c 3 v d c 3 v d c 3 PPNN v d c 3 v d c 3 2 v d c 3
NPNP v d c 3 v d c 3 2 v d c 3 NPNN v d c 3 v d c 3 v d c 3
NPPP 2 v d c 3 0 v d c 3 NPPN 2 v d c 3 0 2 v d c 3
NNPP v d c 3 v d c 3 2 v d c 3 NNPN v d c 3 v d c 3 v d c 3
PNPP v d c 3 v d c 3 v d c 3 PNPN v d c 3 v d c 3 2 v d c 3
Table 3. Corresponding common mode voltage (CMV) based on the near state vector (NSV) of each sector.
Table 3. Corresponding common mode voltage (CMV) based on the near state vector (NSV) of each sector.
SECTOR ISECTOR II
PNPPPNNPPNNNPPNNPNPNPPNP PNNPPPNPPPNNNPNNPNNNNPNP
v x o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v x o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2
v y o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v y o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2
v z o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v z o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2
v n o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v n o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2
v m o v d c 4 0 v d c 4 00 v d c 4 v m o 0 v d c 4 0 v d c 4 v d c 4 0
SECTOR IIISECTOR IV
PPNPNPNPNPNNNPPNPPNNNPPP NPNPNPPPNPPNNNPNNPNNNNPP
v x o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v x o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2
v y o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v y o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2
v z o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v z o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2
v n o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v n o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2
v m o v d c 4 0 v d c 4 00 v d c 4 v m o 0 v d c 4 0 v d c 4 v d c 4 0
SECTOR VSECTOR VI
NPPPNNPPNNPNPNPNNPPNPNPP NNPPPNPPPNPNPNNNNNPNPNNP
v x o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v x o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2
v y o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v y o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2
v z o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v z o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2
v n o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v n o v d c 2 v d c 2 v d c 2 v d c 2 v d c 2 v d c 2
v m o v d c 4 0 v d c 4 00 v d c 4 v m o 0 v d c 4 0 v d c 4 v d c 4 0
Table 4. Parameters of the experimental results.
Table 4. Parameters of the experimental results.
VariableParameterValue
v d c DC-link voltage320 V
CDC-link capacitance2.2 mF
L f Filter inductance15 mH
T s Sampling time50 µs
RLoad resistance12 Ω
R f Filter resistance0.1 Ω
f*Reference nominal frequency50 Hz
i*Reference nominal peak current10 A
LfnNeutral-leg inductance8 mH
f s Sampling frequencykHz
Table 5. Execution time measurement.
Table 5. Execution time measurement.
StrategyConventional MPCExecution Time (tick)Proposed NSV-MPCExecution Time (tick)Improvement
(1 tick = 25 ns)(1 tick = 25 ns)(%)
No. of Switching Vectors16336618744.34
720140.17
Table 6. CMV, percentage of THD, and current tracking error variation at different sampling times.
Table 6. CMV, percentage of THD, and current tracking error variation at different sampling times.
StrategyCMV VariationTHD (%)Current Tracking Error (%)THD (%)Current Tracking Error (%)THD (%)Current Tracking Error (%)
Sampling FrequencySampling FrequencySampling Frequency
50 kHz20 kHz10 kHz
Conventional MPC−160 to 1603.47%3.58%3.90%4.68%6.65%6.59%
NSV-MPC with PPPP vector−160 to 803.24%3.36%3.83%4.26%6.34%6.11%
NSV-MPC with NNNN vector−80 to 1603.24%3.36%3.83%4.26%6.33%6.13%
NSV-MPC with active vectors−80 to 803.62%3.22%4.37%4.05%6.58%5.87%

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Dadu, A.M.; Mekhilef, S.; Soon, T.K.; Seyedmahmoudian, M.; Horan, B. Near State Vector Selection-Based Model Predictive Control with Common Mode Voltage Mitigation for a Three-Phase Four-Leg Inverter. Energies 2017, 10, 2129. https://doi.org/10.3390/en10122129

AMA Style

Dadu AM, Mekhilef S, Soon TK, Seyedmahmoudian M, Horan B. Near State Vector Selection-Based Model Predictive Control with Common Mode Voltage Mitigation for a Three-Phase Four-Leg Inverter. Energies. 2017; 10(12):2129. https://doi.org/10.3390/en10122129

Chicago/Turabian Style

Dadu, Abdul Mannan, Saad Mekhilef, Tey Kok Soon, Mehdi Seyedmahmoudian, and Ben Horan. 2017. "Near State Vector Selection-Based Model Predictive Control with Common Mode Voltage Mitigation for a Three-Phase Four-Leg Inverter" Energies 10, no. 12: 2129. https://doi.org/10.3390/en10122129

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