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Sensors 2015, 15(10), 26396-26414; doi:10.3390/s151026396

Hardware Design and Implementation of a Wavelet De-Noising Procedure for Medical Signal Preprocessing

1
Department of Electronic Engineering, Chang Gung University, Taoyuan 333, Taiwan
2
Healthy Aging Research Center (HARC), Chang Gung University, Taoyuan 333, Taiwan
*
Author to whom correspondence should be addressed.
Academic Editors: Steffen Leonhardt and Daniel Teichmann
Received: 6 August 2015 / Accepted: 14 October 2015 / Published: 16 October 2015
(This article belongs to the Special Issue Noninvasive Biomedical Sensors)
View Full-Text   |   Download PDF [887 KB, uploaded 21 October 2015]   |  

Abstract

In this paper, a discrete wavelet transform (DWT) based de-noising with its applications into the noise reduction for medical signal preprocessing is introduced. This work focuses on the hardware realization of a real-time wavelet de-noising procedure. The proposed de-noising circuit mainly consists of three modules: a DWT, a thresholding, and an inverse DWT (IDWT) modular circuits. We also proposed a novel adaptive thresholding scheme and incorporated it into our wavelet de-noising procedure. Performance was then evaluated on both the architectural designs of the software and. In addition, the de-noising circuit was also implemented by downloading the Verilog codes to a field programmable gate array (FPGA) based platform so that its ability in noise reduction may be further validated in actual practice. Simulation experiment results produced by applying a set of simulated noise-contaminated electrocardiogram (ECG) signals into the de-noising circuit showed that the circuit could not only desirably meet the requirement of real-time processing, but also achieve satisfactory performance for noise reduction, while the sharp features of the ECG signals can be well preserved. The proposed de-noising circuit was further synthesized using the Synopsys Design Compiler with an Artisan Taiwan Semiconductor Manufacturing Company (TSMC, Hsinchu, Taiwan) 40 nm standard cell library. The integrated circuit (IC) synthesis simulation results showed that the proposed design can achieve a clock frequency of 200 MHz and the power consumption was only 17.4 mW, when operated at 200 MHz. View Full-Text
Keywords: field programmable gate array (FPGA); medical signal preprocessing; electrocardiogram (ECG); signal integrity; wavelet de-noising field programmable gate array (FPGA); medical signal preprocessing; electrocardiogram (ECG); signal integrity; wavelet de-noising
This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. (CC BY 4.0).

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Chen, S.-W.; Chen, Y.-H. Hardware Design and Implementation of a Wavelet De-Noising Procedure for Medical Signal Preprocessing. Sensors 2015, 15, 26396-26414.

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