Next Article in Journal
Magnetic Properties of Liquid-Phase Sintered CoFe2O4 for Application in Magnetoelastic and Magnetoelectric Transducers
Previous Article in Journal
CMOS Cell Sensors for Point-of-Care Diagnostics
Article Menu

Export Article

Open AccessArticle
Sensors 2012, 12(8), 10067-10085; doi:10.3390/s120810067

Low-Voltage 96 dB Snapshot CMOS Image Sensor with 4.5 nW Power Dissipation per Pixel

1
The VLSI Systems Center, LPCAS, Ben-Gurion University, P.O.B. 653, Be’er-Sheva 84105, Israel
2
Department of Electrical and Computer Engineering, University of Calgary, Calgary, AB 13060, Canada
*
Author to whom correspondence should be addressed.
Received: 21 May 2012 / Revised: 12 July 2012 / Accepted: 13 July 2012 / Published: 25 July 2012
(This article belongs to the Section Physical Sensors)

Abstract

Modern “smart” CMOS sensors have penetrated into various applications, such as surveillance systems, bio-medical applications, digital cameras, cellular phones and many others. Reducing the power of these sensors continuously challenges designers. In this paper, a low power global shutter CMOS image sensor with Wide Dynamic Range (WDR) ability is presented. This sensor features several power reduction techniques, including a dual voltage supply, a selective power down, transistors with different threshold voltages, a non-rationed logic, and a low voltage static memory. A combination of all these approaches has enabled the design of the low voltage “smart” image sensor, which is capable of reaching a remarkable dynamic range, while consuming very low power. The proposed power-saving solutions have allowed the maintenance of the standard architecture of the sensor, reducing both the time and the cost of the design. In order to maintain the image quality, a relation between the sensor performance and power has been analyzed and a mathematical model, describing the sensor Signal to Noise Ratio (SNR) and Dynamic Range (DR) as a function of the power supplies, is proposed. The described sensor was implemented in a 0.18 um CMOS process and successfully tested in the laboratory. An SNR of 48 dB and DR of 96 dB were achieved with a power dissipation of 4.5 nW per pixel.
Keywords: CMOS; image sensor; low power; snapshot; SNR; strong inversion; sub-threshold; wide dynamic range CMOS; image sensor; low power; snapshot; SNR; strong inversion; sub-threshold; wide dynamic range
This is an open access article distributed under the Creative Commons Attribution License (CC BY 3.0).

Scifeed alert for new publications

Never miss any articles matching your research from any publisher
  • Get alerts for new papers matching your research
  • Find out the new papers from selected authors
  • Updated daily for 49'000+ journals and 6000+ publishers
  • Define your Scifeed now

SciFeed Share & Cite This Article

MDPI and ACS Style

Spivak, A.; Teman, A.; Belenky, A.; Yadid-Pecht, O.; Fish, A. Low-Voltage 96 dB Snapshot CMOS Image Sensor with 4.5 nW Power Dissipation per Pixel. Sensors 2012, 12, 10067-10085.

Show more citation formats Show less citations formats

Related Articles

Article Metrics

Article Access Statistics

1

Comments

[Return to top]
Sensors EISSN 1424-8220 Published by MDPI AG, Basel, Switzerland RSS E-Mail Table of Contents Alert
Back to Top