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Aerospace 2016, 3(3), 28; doi:10.3390/aerospace3030028

An Implementation of Real-Time Phased Array Radar Fundamental Functions on a DSP-Focused, High-Performance, Embedded Computing Platform

1
School of Electrical and Computer Engineering, University of Oklahoma, 3190 Monitor Avenue, Norman, OK 73019, USA
2
National Severe Storms Laboratory, National Oceanic and Atomospheric Administration, Norman, OK 73072, USA
*
Author to whom correspondence should be addressed.
Academic Editor: Konstantinos Kontis
Received: 22 July 2016 / Revised: 11 August 2016 / Accepted: 2 September 2016 / Published: 9 September 2016
(This article belongs to the Special Issue Radar and Aerospace)

Abstract

This paper investigates the feasibility of a backend design for real-time, multiple-channel processing digital phased array system, particularly for high-performance embedded computing platforms constructed of general purpose digital signal processors. First, we obtained the lab-scale backend performance benchmark from simulating beamforming, pulse compression, and Doppler filtering based on a Micro Telecom Computing Architecture (MTCA) chassis using the Serial RapidIO protocol in backplane communication. Next, a field-scale demonstrator of a multifunctional phased array radar is emulated by using the similar configuration. Interestingly, the performance of a barebones design is compared to that of emerging tools that systematically take advantage of parallelism and multicore capabilities, including the Open Computing Language. View Full-Text
Keywords: phased array radar; embedded computing; serial RapidIO; MPAR phased array radar; embedded computing; serial RapidIO; MPAR
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This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. (CC BY 4.0).

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MDPI and ACS Style

Yu, X.; Zhang, Y.; Patel, A.; Zahrai, A.; Weber, M. An Implementation of Real-Time Phased Array Radar Fundamental Functions on a DSP-Focused, High-Performance, Embedded Computing Platform. Aerospace 2016, 3, 28.

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