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Electronics 2018, 7(6), 93; https://doi.org/10.3390/electronics7060093

More Discussions on Intrinsic Frequency Detection Capability of Full-Rate Linear Phase Detector in Clock and Data Recovery

Division of Electronics and Electrical Engineering, Dongguk University, Seoul 04620, Korea
Received: 8 May 2018 / Revised: 26 May 2018 / Accepted: 7 June 2018 / Published: 8 June 2018
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Abstract

The full-rate linear phase detector (PD) has not only phase detection capability but also single-sided frequency detection capability intrinsically. Previously, this fact has been discovered by researching the phase and frequency characteristics of the combined full-rate linear PD and charge pump (CP) under the condition that the ratio of the received data frequency (fDATA) and the recovered clock frequency (fCLK) is set as an integer number. In this paper, for completeness of the theory, the phase and frequency characteristics of the combined full-rate linear PD and CP are studied again while the ratio of fDATA and fCLK is set as a general rational number. Additionally, theoretical analyses of the lock-in range and the lock time of the referenceless single-loop clock and data recovery (CDR) including the full-rate linear PD are newly developed and verified. The calculated lock times by the analysis results agree well with the measured lock times from the MATLAB Simulink simulations. View Full-Text
Keywords: linear phase detector; frequency detection capability; clock and data recovery; CMOS integrated circuits linear phase detector; frequency detection capability; clock and data recovery; CMOS integrated circuits
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Byun, S. More Discussions on Intrinsic Frequency Detection Capability of Full-Rate Linear Phase Detector in Clock and Data Recovery. Electronics 2018, 7, 93.

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