A 1-V 7th-Order SC Low-Pass Filter for 77-GHz Automotive Radar in 28-nm FD-SOI CMOS

Abstract

This paper presents a switched capacitor low-pass filter in a 28-nm fully depleted silicon on insulator CMOS technology for 77-GHz automotive radar applications. It is operated at a power supply as low as 1 V and guarantees 5-dB in-band voltage gain while providing out-of-band attenuation higher than 36 dB and a programmable passband up to 30 MHz. A double sampling technique is adopted, which allows high operating frequency to be achieved while saving power. Moreover, low-voltage biasing and common-mode feedback circuits are exploited to guarantee an almost rail-to-rail output voltage swing. The proposed filter provides an output 1-dB compression point as high as 8.7 dBm with a power consumption of 9 mW. To the authors’ knowledge, this is the first SC-based implementation of a low pass filter for automotive radar applications.

1. Introduction

Millimeter-wave (mm-wave) radar sensors represent an enabling technology for the development of advanced driving assistance systems (ADASs) [1]. Such systems rely on a relatively high number of sensors arranged throughout the car. They provide features such as adaptive cruise control (ACC), anti-collision warning, pre-crash detection, etc., with the aim of improving driving safety standards [2]. Modern automotive radar sensors typically adopt System in Package (SiP) implementations exploiting BiCMOS technologies [3,4,5]. However, the increasing demand for a widespread adoption of ADASs calls for System-on-Chip (SoC) implementations. Presently, the CMOS technology provides the most promising solution for the implementation of monolithic mm-wave low-cost radar sensors [6]. Indeed, technology scaling greatly improved frequency performance of CMOS transistors [7,8,9,10,11,12] enabling both mm-wave circuits and the microcontroller to be implemented on the same chip. However, such scaling inevitably leads to a substantial reduction of the supply voltage, and this translates into a more critical design mainly due to voltage headroom limitations.

Figure 1a depicts a simplified block-diagram of a typical radar sensor receiver (RX). It exploits a frequency-modulated continuous-wave (FMCW) architecture for reduced complexity and basically consists of a mm-wave front end and a wide-band analog baseband [13]. The RX design poses non-trivial challenges at the mm-wave side due to the high operating frequency and the low-noise requirement. A mixer-first receiver architecture allows higher linearity to be achieved since it avoids further RF amplification [3,4,13]. Nevertheless, the design of the baseband circuitry is crucial as well. It consists of a variable gain amplifier (VGA) and a low-pass filter, which process the received signal to make it suitable for the analog-to-digital converter (ADC).

At the baseband side, the design challenges are mainly related to the linearity requirement, and this issue is particularly critical for the low-pass filter (LPF) since it has to provide a high swing linear signal to the converter. The LPF is a key building block of the radar receiver. Indeed, it acts as antialiasing filter besides rejecting undesired out-of-band signals. As a consequence, the LPF defines the actual signal bandwidth, BW_A, at the input of the ADC, thus posing a constrain on the minimum sampling frequency and ultimately on its current consumption. As shown in Figure 1b, BW_A in a typical low-accuracy LPF greatly suffers from PVT variations and/or poor selectivity, thus resulting in a higher and higher ADC sampling frequency. Therefore, designing a high selectivity LPF that may also guarantee robustness over PVT variations is essential for the implementation of low-current consumption radar sensors. Furthermore, the LPF cut-off frequency should be programmable to well comply with both long- and short-range radar applications. State-of-the-art LPFs for radar applications typically rely on R-C [10,11,12,13,14,15,16] or G_m-C [17,18] architectures. R-C topologies exploit operational amplifiers (OPAMPs), resistors and capacitors to define the transfer-function poles and zeros. In these filters, the cut-off frequency is set by digitally controlling resistors and/or capacitors [19], thus providing a discrete tuning. Such approach guarantees good linearity performance at the cost of both high-power consumption and high-area occupation. Conversely, G_m-C filters rely on transconductors and capacitors to set the transfer-function poles and zeros. This enables cut-off frequency tuning by adjusting the transconductor bias current [20]. However, SC filters have larger bandwidth programmability and exhibit better linearity performance than G_m-C filters, since they use purely capacitive feedback network and load, which further improve linearity [21]. Moreover, both R-C and G_m-C active filters suffer from high sensitivity to PVT variations. Therefore, to achieve an acceptable accuracy they require an automatic tuning that increases complexity.

In this paper, a seventh order switched capacitor (SC) low-pass filter for automotive radar applications is presented, which provides very high selectivity while guaranteeing high accuracy. The filter allows an ADC sampling frequency as low as twice the signal bandwidth to be adopted, which drastically reduces power consumption. Moreover, the SC technique guarantees high linearity, since it is based on the capacitive feedback approach, and provides wide programmability of the cut-off frequency by simply varying the sampling frequency. The proposed SC LPF has been implemented in 28-nm fully depleted (FD) silicon on insulator (SOI) CMOS technology and exploits a double sampling technique to achieve high operating frequency while saving current consumption.

This paper is organized as follows. Section 2 deals with the filter design and gives insights on both the FD-SOI CMOS technology and the adopted circuit solutions for low-voltage operation. Experimental results are presented in Section 3, which also provides a comparison with the state of the art. Finally, conclusions are drawn in Section 4.

2. Filter Design

The design of an SC low-pass filter with both high bandwidth and selectivity poses several challenges in the operational transconductance amplifier (OTA) design, especially when, as in this case, an almost rail-to-rail output swing is important to reduce the ADC complexity. Indeed, high selectivity requires a high-order filter and a high gain OTA, whereas high bandwidth means high sampling frequency that in turn leads to high current consumption [22]. In this scenario, technology platform as well as proper circuit design are crucial to achieve high bandwidth and high selectivity while preserving output swing and saving current, despite a low supply voltage.

2.1. Technology Platform

The 28-nm FD-SOI CMOS technology features flipped-well low-threshold-voltage, (LVT) transistors [23]. Both n-MOS and p-MOS devices are fabricated in a 7-nm layer of silicon, which is embedded between a 250-nm gate oxide and a 25-nm buried oxide (BOX). Thanks to the technology scaling, very high frequency operation is achieved (i.e., about 300-GHz transition frequency) thus enabling mm-wave implementation. However, the thin-gate oxide imposes a power supply voltage as low as 1 V and this entails severe limitations in the circuit design to preserve signal swing and linearity despite the low threshold voltage (i.e., around 250 mV in nominal condition). In the adopted technology, the body gain factor (i.e., the variation of V_T with the body voltage) is around 90 mV/V and can be profitably exploited to further reduce the transistor threshold voltage down to 150 mV, which is very useful in a low-voltage design.

2.2. Circuit Description

The operating range of automotive radar sensors spans from a few meters up to 250 m according to the different application scenario. This results in an IF signal bandwidth up to 10 and 20 MHz, for short- and long-range applications, respectively. Therefore, the LPF should provide a programmable wide operating bandwidth along with high selectivity. To these purposes, SC is the best approach since it guarantees high accuracy and selectivity while providing flexibility. Therefore, it is the most suitable solution for the implementation of the LPF in future radar sensors. Incidentally, SC filter passband can be continuously tuned by merely changing the sampling frequency (f_S). Of course, SC filters suffer from poor noise performance. Nevertheless, the SC approach is fully compliant with the radar application thanks to the high receiver gain that makes negligible the contribution of the LPF to the overall receiver noise performance. Indeed, according to the Friis formula, the noise factor of the receiver (NF_RX) can be approximately written as follows

$$N{F}_{\mathrm{RX}}=N{F}_{M\mathrm{IX}}+\frac{N{F}_{\mathrm{VGA}}-1}{{\left|G_{M\mathrm{IX}}\right|}^2}+\frac{N{F}_{\mathrm{LPF}}-1}{{\left|G_{\mathrm{MIX}}\right|}^2·{\left|G_{\mathrm{VGA}}\right|}^2}$$

(1)

where NF_MIX, NF_VGA, and NF_LPF are the noise factors of the mixer, VGA, and LPF, respectively, whereas G_MIX and G_VGA are the voltage gain of mixer and VGA, respectively. Assuming an overall gain for the mixer and VGA higher than 60 dB, the noise contribution of the LPF to NF_RX according to (1) is usually negligible.

For this design, a seventh-order elliptic SC low-pass filter was adopted to provide a 20-MHz passband along with a stopband laying very close (i.e., a few megahertz) to the passband cut-off frequency. This allows exploiting an almost 40-MHz sampling frequency for the ADC with a substantial reduction of current consumption. A simplified schematic of the proposed filter is shown in Figure 2. For the sake of clarity, the single-ended implementation is reported, although the designed solution is fully differential to make simple double sampling and greatly reduce substrate and power supply noise injection. The double sampling [24] is used to lower by a factor 2 the clock frequency for a given sampling frequency, thus increasing the time for settling by 2 and saving current consumption.

The filter consists of seven SC integrators implemented by the OTAs and feedback capacitors, C_1–7. Capacitors C_1,3, C_3,1, C_3,5, C_5,3, C_5,7, and C_7,5 provide the transmission zeros; capacitors C_S and C_L perform the source and load terminations, and the other capacitors accomplish the input signal sampling. Figure 3 shows the RLC passive prototype of the proposed filter, whose component values are reported in

Table 1. Component parameters for the RLC ladder prototype.

Component	Size	Component	Size
RS	50 Ω	C6	288.12 pF
C1	403.23 pF	C7	276.80 pF
C2	77.09 pF	L2	854.7 nH
C3	464.58 pF	L4	450.27 nH
C4	421.98 pF	L6	531.72 nH
C5	376.90 pF	RL	50 Ω

Passband ripple: 0.3 dB; passband frequency: 10.34 MHz; stopband attenuation: 45 dB; stopband frequency: 11.46 MHz.

for the sake of completeness. Thanks to the three transmission zeros (i.e., L₂-C₂, L₄-C₄, L₆-C₆) the filter achieves an out-of-band attenuation as high as 45 dB at just 1 MHz from the passband.

The key building block of the SC LPF is the integrator, whose inverting implementation is reported in Figure 4 along with the detailed schematic of the OTA. The latter poses several design challenges mainly due to the high gain-bandwidth product required by the high sampling frequency along with the low supply voltage. To achieve the targeted 20-MHz passband, the filter is to be operated with a 200 MHz sampling frequency, which means that the OTA should guarantee an accurate settling within 5 ns. Considering a percentage of the time response dominated by slewing conditions, this translates into a transition frequency as high as 500 MHz. Furthermore, a rail-to-rail output signal is to be provided to relax the ADC resolution while preserving signal-to-quantization noise ratio.

To fulfill such specifications, a full swing two-stage OTA was used in this work, which exploits a low-voltage biasing and an SC common-mode feedback circuit, which provides linear operation even with rail-to-rail output signal.

The OTA consists of a first gain stage based on an active-loaded differential pair, M_1-4, and a common-source second gain stage, M_6–9, which provides an almost rail-to-rail output signal. Transistors M_10–12 implement a low-voltage biasing, which is required by the 1-V operation. Specifically, the bias current of the first stage, I_B1, is provided by M₅ that is in a current mirror configuration with M₁₀. By setting the same current density for M_1,2 and M_11,12, the drain-source voltages of M₅ and M₁₀ are approximately the same. This allows I_B1 to be accurately set even though M₅ and M₁₀ could be pushed into triode region due to PVT variations. Nevertheless, the back-gate terminals of M_1,2 and M_11,12 are connected to V_DD to minimize their threshold voltage and hence increase the drain-source voltages of M₅ and M₁₀. All the transistors are biased in the saturation region although M₁₀ and M₅ can well work even in the triode region, thanks to the low-voltage biasing, M_10–12. A common-mode feedback circuit (CMF) sets the output bias voltage to V_DD/2 to preserve full output swing. The designed OTA exploits Miller compensation to guarantee a phase margin of 60° with a transition frequency of 500 MHz and achieves an open-loop gain as high as 60 dB.

Table 2. Parameters of the OTA transistors.

Component	Length [nm]	Width [µm]	Current [µA]
M1–2	60	21.6	10
M3–4	160	3.6	10
M5	500	105	20
M6–7	60	115.2	400
M8–9	500	204.8	400
M10	500	52.5	10
M11–12	60	10.8	5

summarizes the main transistors parameters of the OTA, whose current consumption is around 1 mA.

3. Experimental Results

The SC LPF was integrated in a 28-nm FD-SOI CMOS technology by STMicroelectronics within a complete 77-GHz radar receiver [25]. The adopted backend-of-line (BEOL) provides eight copper layers in addition to a top aluminum one. Metal-oxide-metal (MOM) capacitors with 5-fF/μm² are also available A microphotograph of the SC LPF is shown in Figure 5. The core area is about 775 × 265 µm². The die was directly assembled chip-on-board on a FR4 printed circuit board (PCB) to enable a complete filter characterization. All measurements were performed at 1-V supply voltage.

Figure 6 shows the measured frequency response for different values of the sampling clock. Measurements show proper filter operation up to 300 MHz sampling frequency that results in a maximum cut-off frequency as high as 30 MHz. Moreover, the filter provides a 5-dB voltage gain to relax the VGA linearity and an in-band ripple ranging from 0.8 dB to 2.6 dB, as shown in Figure 7. Out-of-band attenuation goes from 42 dB to 36 dB, when the sampling frequency spanning from 100 MHz to 300 MHz. The OTA finite gain and bandwidth affect the filter performance thus resulting on a higher ripple and lower out-of-band attenuation with respect to the passive prototype. The linearity performance was also tested by measuring the in-band 1 dB input compression point, IP_1dB, as shown in Figure 8.

Thanks to both the capacitive feedback architecture of SC filters and the adopted OTA solution, the filter exhibits excellent linearity performance by providing around 5-dBm IP_1dB, which results in a linear output swing as high as 850 mV. For the sake of completeness, the input-referred noise (IRN) density was also measured at the maximum passband (i.e., 30 MHz). The measured IRN is around 42 nV/√Hz at 15 MHz.

The measured performance is summarized and compared with the state of the art in

Table 3. Summarized performance and comparison with the state of the art.

Parameters	[15]	[16]	[17]	[19]	[24]	[26]	This Work
Technology [nm]	130	180	180	65	350	65	28
Technique	Active RC	Active RC	Gm-C	Active RC	SC	SC-Buffer Biquad.	SC
Supply voltage [V]	0.6	1.8	1.2	1.8	1.5	1.2	1
Order, N	4	4	3	4	5	4	7
Bandwidth (BW) [MHz]	up to 160	0.6–2.15	20	0.02–16	6–8	0.5–10	up to 30 MHz
Filter gain [dB]	0	0	0	0	0	0	5
OIP3 [dBm]	9.56	−6.5	18	21.1	n.a.	16.6	18.7 *
Input noise [nV/$\sqrt{Hz}$]	n.a.	9–206	12	44.6	n.a.	19.5	42
Power (PC) [mW]	23.77	12.6	11.1	19	11	2.75	9
Area [mm2]	0.236	0.17	0.23	0.098	0.29	0.02	0.2
FoM [pJ] **	4.1	6544	2.9	2.3	n.a.	1.5	0.6

* OIP3 = OP_1dB + 10 [dB], ** $\mathrm{FoM}=\frac{{\mathrm{P}}_{\mathrm{c}}}{\mathrm{N}\times \mathrm{BW}\times \mathrm{OIP}3}$.

. The proposed LPF exhibits a higher IRN than the other works. However, as mentioned above, the filter noise is not a meaningful parameter for automotive radar applications. Conversely, the proposed SC LPF exhibits the best-in-class performance in terms of selectivity, bandwidth, and linearity at 1-V supply voltage.

4. Conclusions

A seventh order SC low-pass filter has been presented, which is implemented in 28-nm FD-SOI CMOS. The proposed SC LPF provides very high selectivity while achieving high accuracy. Specifically, an out of band attenuation higher than 36 dB is achieved while providing a linear output voltage swing as high as 850 mV at 1-V supply voltage. Moreover, the passband can be tuned up to 30 MHz by merely changing the sampling frequency thus providing high flexibility. To the authors’ knowledge, this is the first SC-based implementation of a LPF for automotive radar applications.