Next Article in Journal
A Short Update on the Advantages, Applications and Limitations of Hyperspectral and Chemical Imaging in Food Authentication
Previous Article in Journal
Stability of Two-Dimensional Polymorphs for 10,12-Pentacosadyn-1-ol on Graphite Investigated by SPM
Article Menu
Issue 4 (April) cover image

Export Article

Open AccessArticle
Appl. Sci. 2018, 8(4), 504; doi:10.3390/app8040504

An FPGA Implementation of a Convolutional Auto-Encoder

1
Key Laboratory of Electronic Equipment Structure Design, Ministry of Education, Xidian University, Xi’an 710071, China
2
School of Aerospace Science and Technology, Xidian University, Xi’an 710071, China
*
Author to whom correspondence should be addressed.
Received: 24 February 2018 / Revised: 16 March 2018 / Accepted: 20 March 2018 / Published: 27 March 2018
(This article belongs to the Section Computer Science and Electrical Engineering)
View Full-Text   |   Download PDF [21416 KB, uploaded 27 March 2018]   |  

Abstract

In order to simplify the hardware design and reduce the resource requirements, this paper proposes a novel implementation of a convolutional auto-encoder (CAE) in a field programmable gate array (FPGA). Instead of the traditional framework realized in a layer-by-layer way, we designed a new periodic layer-multiplexing framework for CAE. Only one layer is introduced and periodically reused to establish the network, which consumes fewer hardware resources. Moreover, by fixing the number of channels, this framework can be applicable to an image of arbitrary size. Furthermore, to effectively improve the speed of convolution calculation, the parallel convolution method is used based on shift registers. Experimental results show that the proposed CAE framework achieves good performance in image compression. It can be observed that our CAE framework has advantages in resources occupation, operation speed, and power consumption, indicating great potential for application in digital signal processing. View Full-Text
Keywords: convolutional auto-encoder; neural network; image compression; FPGA convolutional auto-encoder; neural network; image compression; FPGA
Figures

Figure 1

This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. (CC BY 4.0).

Share & Cite This Article

MDPI and ACS Style

Zhao, W.; Jia, Z.; Wei, X.; Wang, H. An FPGA Implementation of a Convolutional Auto-Encoder. Appl. Sci. 2018, 8, 504.

Show more citation formats Show less citations formats

Note that from the first issue of 2016, MDPI journals use article numbers instead of page numbers. See further details here.

Related Articles

Article Metrics

Article Access Statistics

1

Comments

[Return to top]
Appl. Sci. EISSN 2076-3417 Published by MDPI AG, Basel, Switzerland RSS E-Mail Table of Contents Alert
Back to Top