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Article

A Driving Technique for AC-AC Direct Matrix Converters Based on Sigma-Delta Modulation †

DII—Dipartimento di Ingegneria dell’Informazione, Università Politecnica delle Marche, Via Brecce Bianche 12, I-60131 Ancona, Italy
*
Author to whom correspondence should be addressed.
This paper is an extended version of our paper published in EEEIC 2018—18th International Conference on Environment and Electrical Engineering.
Energies 2019, 12(6), 1103; https://doi.org/10.3390/en12061103
Submission received: 14 January 2019 / Revised: 14 March 2019 / Accepted: 15 March 2019 / Published: 21 March 2019

Abstract

:
Direct conversion of AC power between three-phase systems operating at different frequencies can be achieved using solid-state circuits known as matrix converters. These converters do not need energy storage elements, but they require sophisticated control algorithms to operate the switches. In this work we propose and evaluate the use of a sigma-delta modulation approach to control the operation of a direct matrix converter, together with a revised line filter topology suited to better handle the peculiarities of the switching noise produced by the sigma-delta modulation. Simulation results show the feasibility of such an approach, which is able to generate arbitrary output waveforms and adjust its input reactive power. Comparison with a space vector modulation implementation shows also better performance about total harmonic distortion, i.e., less harmonics in the input and output.

1. Introduction

Matrix converters are forced commutated converters that have the desirable property of a simple and compact circuitry, based on a matrix of bidirectional switches. This configuration allows direct conversion of energy from a three-phase AC source to another three-phase AC system, operating at a different voltage and frequency, without needing a DC link with the function of energy reservoir. The absence of a DC link also dispenses with its related energy storage components, such as inductors and capacitors.
A DC link can indeed be present in a category of converters called indirect matrix, which are composed of two distinct groups of switches: a group is connected to the line, and has a similar function to that of a rectifier, the other is connected to the load, and acts as an inverter, but they work without the reservoir capacitor on the DC bus. In the direct matrix converter, on the other hand, there is no DC link at all and an array of nine switches is able to directly connect any of the load phases with any of the line phases to provide the desired conversion.
Both these kinds of AC-AC converters share most of the same desirable properties, such as high reliability due to the absence of critical capacitors or inductors, adjustable amplitude and frequency of the load voltage, sinusoidal input and output currents, and can also provide reactive power to the line by presenting an arbitrarily adjustable input power factor [1].
Thus their interest has more and more increased in recent years for their possible applications on industrial fields such as avionics [2,3], green energy systems such as wind and photovoltaic systems [4,5,6], marine propulsion [7], geophysics [8], electric vehicles [9], and smart cities [10].
Literature reports different control schemes, such as Alesina-Venturini method [11,12] and space vector modulation (SVM) techniques [13,14]. The Alesina-Venturini method [11,12], also known as direct transfer function approach, introduced the concept of low-frequency modulation matrix. Multiplying the input voltages by this modulation index produces the output voltages.
The other, perhaps more widely adopted, algorithm to control matrix converters is the SVM. At first, SVM was defined to control indirect matrices [13] through the concept of fictitious DC link. Originally it was devised to control the load voltage [15] alone, but was then extended so that it can also correct the input power factor. Its modulation performance was also improved [16]. Recently, another SVM method has been proposed [14], that uses the concept of instantaneous space vector to represent voltages and currents, both at the input and output, and is not limited to indirect matrix converters.
In this work we present a matrix control algorithm based on sigma-delta ( Σ Δ ) modulation. Σ Δ modulation exploits oversampling and noise shaping to spread quantization noise, so that it occupies a much larger band than the band occupied by the signal, easing the removal of this noise by an analog filter. Noise shaping is performed by a digital filter in the control loop that further reduces the noise in the signal band, at the cost of increasing it at frequencies much higher than those in the signal band. Σ Δ modulators are routinely employed in the field of analog to digital conversion [17] and have also found application in the control of switch-mode power supplies [18] and LED drivers [19].
This paper proposes the use a Σ Δ modulation method to operate a matrix converter, where the operation of the switch matrix is seen as the source of the quantization noise, whose spectrum the modulator seeks to shape so that it can be easily filtered out [20]. Compared to a standard pulse width modulation (PWM), Σ Δ modulation also considers, and then compensates by virtue of its digital filter acting like an integrator, the past quantization errors performed by the switch matrix. Compared to an SVM implementation, the Σ Δ approach is conceptually much simpler and is amenable to a straightforward implementation. Moreover, the quantizer can use all of the 27 possible combinations provided by the switches, providing finer granularity of the output voltage selection, not being limited like SVM to those that provide output space vectors with fixed directions. The peculiarities of the quantization (switching) noise produced by this modulator will also be discussed and investigated, together with a novel filter topology that takes into account the particular frequency distribution of the Σ Δ quantization error.
This paper is organized as follows. Section 2 discusses the theory on which Σ Δ is based by extending its traditional application to include the operation of a direct matrix converter, and discusses the novel line and load filters. Section 3 presents the results of some simulation experiments to validate the operation and effectiveness of the proposed approach, comparing it with the conventional SVM method. Section 4 finally ends the work.

2. Theory and Methods

In this section, the sigma-delta based modulation technique used to control the switch matrix is presented and discussed. For reference, a direct matrix converter, with no DC link, will be considered, though the basic idea can easily be applied to indirect converters as well.
The main components of a direct matrix converter, as shown in Figure 1, are the three-phase voltage source, an input filter, the matrix of switches, an output filter, and the load. In order to properly control the switches, it is necessary to sample at least the source voltage and the load current.
Let v I ( t ) be the vector of instantaneous voltages of the three-phase system at the switching matrix input, and v O ( t ) be the vector of instantaneous voltages at the output of said switching matrix.
The voltage transfer function of a direct matrix converter coincides with its incidence matrix S k , that is, a matrix whose s i j element is 1 if the switch connecting the input phase j to the output phase i is on, 0 otherwise. The current transfer function is just the transpose of said incidence matrix, that is,
v O ( t ) = S k v I ( t )
i I ( t ) = S k T i O ( t )
with k = 1 , , K spanning all the admissible configurations of the switch matrix. To avoid input phase short circuits, under no circumstances can two switches on the same row be activated simultaneously, hence the incidence matrix must be subjected to the following restriction
j = 1 3 s i j = 1 , i = 1 , , 3 .
With this limitation, the number of different incidence matrices is just K = 27 .
The three-phase power supply is assumed to generate the following instantaneous phase voltages
v S ( t ) = 2 V S sin ( 2 π f S t ) sin ( 2 π f S t 2 π / 3 ) sin ( 2 π f S t + 2 π / 3 )
with V S = 230   V and f S = 50   HZ . The line-to-line voltages will then be
v Δ ( t ) = Δ v S ( t ) , Δ = 0 + 1 1 1 0 + 1 + 1 1 0 .
Similarly, the desired output voltages are
v des ( t ) = 2 V des sin ( 2 π f des t + ϕ ) sin ( 2 π f des t + ϕ 2 π / 3 ) sin ( 2 π f des t + ϕ + 2 π / 3 )
where ϕ is the initial phase difference between input and output voltages, while f des and V des are the desired output frequency and root mean square (RMS) voltage, respectively.

2.1. Sigma-Delta Modulation

The sigma-delta modulator is a digital circuit, shown in Figure 2 together with a simplified block diagram of the power stages already presented in Figure 1. The two “OS↑” frequency upsampler blocks are needed to adjust sampling rates as the digital portion of the modulator typically uses a higher clock frequency than the AD converters. Its main principle of operation is to use samples of the source voltage v S and of the load current i L to compute the best switch configuration k ˜ to apply to the matrix to achieve the desired result, namely, the desired output voltage v des and input reactive power Q des .
It is composed of a noise-shaping filter (shown on the left of the figure) that computes the reference signals v ref and Q ref from the desired output and the previously occurred quantization errors, and of a quantizer that chooses the best output to approximate said references from the the noise-shaping filter outputs and an oversampled version of the source voltage, v S , and load current i L .
It operates as follows. Let us call v k , with k = 1 , , K , the output voltages the quantizer can produce. Usually, a conventional sigma-delta modulator employs a quantizer with fixed quantization levels. In our case, these levels are determined by the different configurations of the switch matrix, and are hence time varying as the input voltage and output current evolve in time. The quantizer thus needs to update its knowledge of the available levels by multiplying the sampled input and output quantities by all the 27 possible matrices S k , so that v k = S k v I .
Nevertheless, since these quantities are relatively slowly time varying, with respect to the clock frequency f Σ Δ = 100   kHz , a low sampling frequency f ADC = 9   kHz can be employed and the signals interpolated when needed.
The noise-shaping filter then ensures that the time average of the output voltage v O be equal to the desired voltage v des , by taking into consideration past quantization errors and computing the required correction v ref that need to be applied next to compensate for them, as
v ref = STF ( z ) v des + NTF ( z ) e v
Q ref = STF ( z ) Q des + NTF ( z ) e Q
where STF is the modulator linearized signal transfer function, and NTF is the quantization noise transfer function. These functions must be designed so that the STF does not distort the input signal, while the NTF should place most of the noise at high frequencies where it can easily be attenuated by the line and load filters.
The quantizer must then find the most appropriate output level to simultaneously achieve both objectives. This can be done by minimizing an objective function that is a linear combination of two functionals, one proportional to the errors e v on the output voltage, and one proportional to the error e Q in the input reactive power.
Before detailing its operation in the following, Figure 3 shows an example of the switching sequence produced by such modulator for one output phase for a short time frame. Due to the constraint (3), each output phase must be connected to one and only one input phase at any given time. Hence, the available voltage levels are those of the input phases v S , which in the time span considered are quite slowly time varying. The modulator needs to approximate v des b by switching between the three available levels ( v O b , thin black line) so that the averaged output v O b ¯ matches the desired output.
Since the modulator operates in the discrete time domain, in the following we will assume sampled signals with t = n / f Σ Δ , and derive expressions for the errors as functions of the index k that describes the configuration of the switches.

2.1.1. Noise Shaping Filter

The structure of the noise-shaping filter used in the Σ Δ modulator is shown in Figure 2.
The linearized signal transfer function and quantization noise transfer function of the Σ Δ modulator are
STF ( z ) = z z 2 z ( 2 + b 1 + a 1 + b 2 + a 2 ) + 1 + b 2 + a 2
NTF ( z ) = z 2 z ( 2 + b 1 + b 2 ) + 1 + b 2 z 2 z ( 2 + b 1 + a 1 + b 2 + a 2 ) + 1 + b 2 + a 2
where the a j and b j coefficients are those shown in Figure 2.
The poles of both transfer functions, that share the same denominator, can be placed at infinite so that the STF becomes simply a delay. This can be achieved by ensuring that
2 + b 1 + a 1 + b 2 + a 2 = 0
1 + b 2 + a 2 = 0
so that the signal is not influenced by the filter. The NTF zeros can be placed either in DC or within the signal band to minimize the in-band noise. We chose to put them at f H = 695   Hz to minimize the amount of noise near the filter resonances. They will thus be placed in the unitary circle at
z 1 = z 2 * = e j π f n , f n = f H f Σ Δ / 2
where f n is the zero’s frequency normalized with respect to the Nyquist frequency. To ensure this it must be
2 + b 1 + b 2 = 2 cos ( π f n )
1 + b 2 = 1
which, together with the constraints on the poles, yields
b 2 = 0
b 1 = 2 cos ( π f n ) 2
a 2 = 1
a 1 = 1 2 cos ( π f n )
which can be used to implement the digital filter.

2.1.2. Output Voltage Error

Since v L is a low-pass filtered version of v O , the aim of the modulator is to make v O on average equal to v des , so that v L v des . The noise-shaping filter provides the best estimate of the voltage v ref needed to achieve this objective. At each time n the quantizer must then choose the configuration k [ n + 1 ] , to be applied at the next step, that minimizes
e k v = v ref [ n ] v k [ n + 1 ]
where v k [ n + 1 ] = v O [ n + 1 ] .
By rewriting (1) in the discrete time domain, we have
v O [ n + 1 ] = S k v I [ n + 1 ] .
Furthermore, since the aim of the input filter is to suppress high-frequency current components, and not to alter the line voltages, v I can be approximated as v I v S , and the difference between the values at time n + 1 and n can be neglected since f S < < f Σ Δ , so that v S [ n + 1 ] v S [ n ] . We can thus write
v O [ n + 1 ] S k v S [ n ] .
The above approximation lets us write
e k v = v ref [ n ] S k v S [ n ]
so that the error can be computed from the measured voltage v S [ n ] .

2.1.3. Input Reactive Power Error

The instantaneous reactive power [21] at the input of the switch matrix can be written as Q ( t ) = ( Δ v I ( t ) ) · i I ( t ) / 3 , where “ · ” denotes the scalar product. Under the hypothesis v I v S , it is thus
Q [ n + 1 ] Δ 3 v S [ n + 1 ] · i I [ n + 1 ] .
where i I [ n + 1 ] can be computed from the measured output current, transformed by the matrix function (2), so that
Q [ n + 1 ] Δ 3 v S [ n + 1 ] · S k T i O [ n + 1 ] Δ 3 v S [ n ] · S k T i L [ n ]
where we have used the fact that both v S and i O are slowly varying with respect to f Σ Δ , and that the output filter should ensure i O i L , to make Q [ n + 1 ] computable from the measured quantities.
Let us then define the error on matrix input reactive power as
e k Q [ n + 1 ] = Q ref [ n ] Q [ n + 1 ]
where Q ref is the needed reactive power to obtain the desired Q des , as computed by the noise-shaping filter.
In order for the reactive power to be null at the source, the reactive power at the matrix input should be the opposite of that created by the input filter, which manifest a strong capacitive load at line frequency as the filter main capacitors experiment the entire three-phase supply voltage. We can thus assume
Q des = 3 V S 2 2 π f S C .

2.1.4. Multi-Objective Optimization

To find the best quantization level that simultaneously minimizes both errors, it is useful to normalize them so that they can be combined. The error (23) can be normalized with respect to the input and output voltages to get the adimensional error ε
ε k v [ n + 1 ] = e k v [ n + 1 ] V des + V S
while the error (26) can then be normalized as
ε k Q [ n + 1 ] = e k Q [ n + 1 ] Q des .
The normalized errors (28) and (29) are combined to find the solution to this multi-objective optimization problem. This can be achieved by choosing the point of the Pareto frontier, lying in the space of the two normalized errors, that happen to be closer to the origin, such as
k [ n + 1 ] = argmin k = 1 , , 27 ( ε k v [ n + 1 ] ) 2 + ( ε k Q [ n + 1 ] ) 2
so that the matrix configuration that minimizes the functional in (30) is chosen as the next step.

2.2. Input and Output Filters

Generally, to reduce the effect of voltage and current switching, an LC filter is used at the input and output of the matrix converter. For the sake of simplicity, we will focus on a single-phase filter, like the one shown in Figure 4.
For our purposes it can usefully be represented with the inverse hybrid representation
i 1 v 2 = g i g r g f g o v 1 i 2 .
With reference to the filter shown in Figure 4, its parameters can easily be found to be
g i = s C ( 1 + s L / R ) 1 + s L / R + s 2 L C
g r = g f
g f = 1 + s L / R 1 + s L / R + s 2 L C
g o = s L 1 + s L / R + s 2 L C .
The problem with this filter is that, although losses are generally required to avoid producing strong harmonics at the resonance frequency, these losses are present across a very large portion of the frequency spectrum, thus causing serious efficiency degradation if the switching noise is spread over a large bandwidth, as is the case with sigma-delta modulation.
In fact, the power lost in the filter can be computed as v 1 i 1 + v 2 i 2 , which, using (31), becomes for the three-phase case
( g i ) | v 1 | 2 + ( g o ) | i 2 | 2 2 3 ( g f ) Δ v 1 · i 2
where it is worth noticing that, if voltage and current are in phase, the term Δ v 1 · i 2 equals 0.
Let us focus on the input filter first. The first term of (36) is the effect of the interaction of the single-frequency line voltage v 1 on the filter input conductance ( g i ) . It means that to minimize losses, ( g i ) at line frequency should be as small as possible, but its behavior at other frequencies does not influence losses. The effect of the interaction of the matrix input current i 2 with the filter output resistance ( g o ) is instead more complicated. Figure 5 can help explain the behavior.
In the top panel, the thin yellow line represents the spectrum of the matrix input current i 2 i I , while the thin dashed lines represent the filter output resistance for various values of R. Larger values of R actually correspond to lower values of the output resistance at both low and high frequencies. This is important because the sigma-delta modulator puts most of the quantization noise above 1   kHz . Of course, the larger Rs produce sharper resonances, which cannot be accepted. A better solution is needed.
A simple modification can be done so that the losses act only at the resonance frequency, increasing the efficiency of the converter, using the circuit shown in Figure 6.
In it the series LC circuit connected to the resistor in the damper effectively enables the resistor only in proximity of the resonance frequency, where it is needed, and not elsewhere. The additional reactive components also have other positive effects on the filter transfer function that will be discussed in detail later. The main disadvantage of the filters is the higher cost, due to doubling the number of reactive components, but it must be noted that these additional components do not store a significant amount of power nor are subject to high voltages or currents, as can be seen from the specifications (obtained by simulation) reported in Table 1, so they can be much smaller and cheaper than the main ones, though must be of the same value.
The inverse hybrid representation of the filter in Figure 6 is equal to
g i = s C ( 1 + s R C + S 2 L C ) 1 + s R C + 3 s 2 L C + s 3 L C 2 R + s 4 L 2 C 2
g r = g f
g f = 1 + s R C + 2 s 2 L C 1 + s R C + 3 s 2 L C + s 3 L C 2 R + s 4 L 2 C 2
g o = s L ( 1 + s R C + s 2 L C ) 1 + s R C + 3 s 2 L C + s 3 L C 2 R + s 4 L 2 C 2
which can also be seen in Figure 5, in solid lines. As can be seen, the behavior outside the resonance region is greatly improved, enabling the choice of a R = 20   Ω resistance to simultaneously dampen the resonance and achieve small losses. The bottom panel of the same figure shows the filters transfer functions g f (or g r , it’s the same) together with the resulting source current spectrum. Again, the proposed filter manifest a better behavior.
Similar considerations can be done for the output filter. Figure 7 shows its behavior.
This time the filter purpose is to filter the switched voltage present at the output of the matrix, and hence we are interested in its input conductance since in (36) it multiplies v 1 v O , while the output resistance multiplies the load current which is nearly sinusoidal. The improvement of the proposed filter in high-frequency behavior is even more apparent. Unfortunately, with the new filter architecture, the input conductance increases for increasing values of R, the opposite behavior than the traditional filter, and so a low resistor value had to be chosen to limit losses. Although it causes some peak splitting near resonance, the overall behavior is still satisfactory. Due to the higher frequency of the output voltage, a higher resonant frequency was also needed. The full specifications are reported in Table 2.
As previously stated, these filters need components that share the same value, though not the same rating, between the main, energy-passing filter, and the secondary, damper path. Actually, since the damping resistor causes a significant reduction of the resonance peak, as it is intended to do, it turns out that it is not strictly necessary to have an exact match of the component values between the main filter and the damper. Usual component tolerances can be accommodated for without affecting the intended behavior of the filter. This was confirmed by a Monte Carlo simulation, performed using 10% tolerance components. The results are reported in Figure 8. It shows the frequency responses of the two filters for the nominal case (thin dashed line), and the mean of 1000 Monte Carlo runs (thick solid line). The two are perfectly superimposed. The 1st and 99th percentiles are also shown (thin red lines) to highlight the expected range of variability of the frequency response: in 98% of the cases, the actual frequency response will lie within these lines. As can be seen, this variability is indeed quite small, and, most importantly, no artifacts ensue near resonance.

3. Simulation Results

The whole system was simulated using MATLAB SimScape using the component values reported in the tables above. To test it, we used a resistive-inductive load with L = 2   mH and R = 5   Ω , driven at V des = 70.7   V and f des = 150   Hz , which results in an ideal output power of 1.913   kW .
For comparison, the same system was also simulated with the sigma-delta modulator replaced by a conventional SVM controller. As a reference implementation, we chose the structure described in [22] with the input current displacement angle fixed at
δ = arctan Q des P arctan 2 π f S C V S 2 R V des / ( R + j 2 π f des L ) 2
where P is the active power and can be estimated at the load side, neglecting the effect of the output filter capacitor, by posing R = 5   Ω (load resistance), and L = 4   mH (sum of load inductance and output filter inductance). Similarly, Q des is estimated from the input side by neglecting the effects of the input filter inductor and using C = 26.4   μ F (input filter capacitance). To achieve comparable results, SVM employed the same 9   kHz modulation frequency, but the digital pulse-width modulation was performed using a 55× clock, i.e., 495   kHz , which is much higher than the 100   kHz sigma-delta clock. This was necessary as otherwise SVM would not have had enough modulation resolution to obtain the desired results, but it must be noted that a practical application of this SVM might require switching devices able to produce 2   μ s pulses, while the proposed sigma-delta modulator only uses 10   μ s pulses at worst.
Even from a computational complexity point of view, it must be stated that though SVM uses a much lower clock frequency to trigger computations ( 9   kHz ), these computations involve trigonometric functions [22], which are either time consuming or involve large look-up tables. On the other hand, the sigma-delta modulator needs a higher clock frequency ( 100   kHz ), but it only needs to advance four scalar second-order infinite impulse response (IIR) filters and perform some linear algebra computations per clock cycle. And all the matrices have only zeros or ones as coefficients so no multiplications are actually involved in most calculations.
Figure 9 shows the load and source voltages and currents, the left panel is for the sigma-delta modulator, the right panel for the SVM algorithm. It is immediately apparent that the shape of the load current generated by the sigma-delta modulator is quite good, though some low frequency harmonics are still present in the source current. Their frequency content has already been reported in the bottom panels of Figure 5, for the source current, and Figure 7, for the load voltage, from which the harmonic content can be evaluated, as reported in Table 3. The SVM-produced waveforms have some residual high-frequency harmonics even after the strong filtering employed in this systems, as can be seen in their spectra reported in Figure 10.
Indeed, it is apparent from both Figure 10 and Table 3 that the proposed sigma-delta modulation is able to achieve a much lower harmonic distortion, as could be expected because the principle of operation of such modulator is to spread quantization noise over a large bandwidth, whose shape is determined by the noise-shaping filter. Of course, if the noise is also added to the harmonic distortion (THD + N column of the table), the results become much more similar to SVM. It should nevertheless be noted that in many applications a wide-bandwidth noise can be more tolerated by the load, as a high harmonic content might cause, e.g., a motor to vibrate and produce audible tones.
For what concerns instead the reactive power compensation, from the above figures it could already be seen that the source current is in phase with the source voltage, as required by the nulling of the input reactive power. This is also confirmed by Figure 11, that shows source active and reactive power, the latter being almost null on average. Again, the non-periodic nature of the artifacts produced by sigma-delta modulation is apparent compared to the periodic distortion of SVM.
The instantaneous three-phase power factor can finally be calculated as
PF [ n ] = P S [ n ] P S [ n ] 2 + Q S [ n ] 2 ,
where P S = v S · i S is the three-phase instantaneous active power and Q S = ( Δ v S ) · i S / 3 is the three-phase instantaneous reactive power at the source. It resulted on average equal to 0.997, a very good result.
Similar results are reported in Figure 12 for the load.
The average powers obtained by simulation are summarized in Table 4, from where it is apparent that this converter can achieve a very high theoretical efficiency, since the filter losses amount to just over 1%, and that the load reactive power is nearly completely compensated by the converter.
Finally, to test the performance of the proposed system under non-stationary conditions, a couple more simulations were performed imposing a change in desired voltage amplitude and frequency. Results are shown in Figure 13. On the left, output voltage was quickly increased from 50   V to 100   V during a 10   ms interval, provoking a fourfold increase in output power. No significant artifacts can be seen in either the outputs or input current. On the right, the desired output frequency was lowered from 150   Hz to 50   Hz , causing a decrease in output reactive power, which is then accompanied by an increase in output active power having held constant the load voltage. It can easily be seen that this transition did not cause any change in the input current phase, showing that the reactive power compensation algorithm works as expected.

4. Conclusions

This work presents a new type of controlling algorithm for AC-AC matrix converters, based on Σ Δ modulation. It allows to compensate both source and load variations, as well as differences between an actual implementation and the ideal model, because the Σ Δ modulator measures critical electrical quantities and integrates and corrects for the past quantization errors occurred on the desired performance. It also allows to obtain arbitrary output waveforms with a null homopolar component.
Simulation results show that excellent performance can be obtained in terms of control accuracy and quality of load and source currents. Crucial in the achievement of these performances are the proposed line filters, suitable for the noise spectrum produced by the Σ Δ controller.

Author Contributions

Conceptualization, S.O., G.B. and P.C.; Formal analysis, S.O. and G.B.; Investigation, S.O.; Methodology, S.O.; Software, S.O. and G.B.; Validation, S.O. and G.B.; Writing—original draft, S.O., G.B. and P.C.; Writing—review & editing, S.O., G.B. and L.F.

Funding

This research received no external funding. The APC was funded by authors’ institution.

Conflicts of Interest

The authors declare no conflict of interest. The funders had no role in the design of the study; in the collection, analyses, or interpretation of data; in the writing of the manuscript, or in the decision to publish the results.

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Figure 1. Analog part of the converter, comprising the direct matrix, the input and output filters, and the voltage and current analog-to-digital (AD) converters.
Figure 1. Analog part of the converter, comprising the direct matrix, the input and output filters, and the voltage and current analog-to-digital (AD) converters.
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Figure 2. The Sigma-Delta digital modulator, acting as controller of the matrix converter.
Figure 2. The Sigma-Delta digital modulator, acting as controller of the matrix converter.
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Figure 3. Example of the switching sequence obtained by the sigma-delta modulator.
Figure 3. Example of the switching sequence obtained by the sigma-delta modulator.
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Figure 4. Standard line/load filter with purely resistive damper.
Figure 4. Standard line/load filter with purely resistive damper.
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Figure 5. Input filter behavior: output resistance and gain on the top and bottom panel, respectively. Input and source current spectrum on the top and bottom panel, respectively.
Figure 5. Input filter behavior: output resistance and gain on the top and bottom panel, respectively. Input and source current spectrum on the top and bottom panel, respectively.
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Figure 6. Proposed line/load filter with resonant resistive damper.
Figure 6. Proposed line/load filter with resonant resistive damper.
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Figure 7. Output filter behavior: input conductance and gain on the top and bottom panel, respectively. Output and load voltage spectrum on the top and bottom panel, respectively.
Figure 7. Output filter behavior: input conductance and gain on the top and bottom panel, respectively. Output and load voltage spectrum on the top and bottom panel, respectively.
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Figure 8. Frequency response of the proposed line/load filter with resonant resistive damper, with variations due to a 10% tolerance in the passive components.
Figure 8. Frequency response of the proposed line/load filter with resonant resistive damper, with variations due to a 10% tolerance in the passive components.
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Figure 9. Simulation results of the electrical quantities at the source ( v S , i S ), and at the load ( v L , i L ). (Left panel) as obtained by the proposed sigma-delta modulator. (Right panel) as produced by a reference implementation of SVM.
Figure 9. Simulation results of the electrical quantities at the source ( v S , i S ), and at the load ( v L , i L ). (Left panel) as obtained by the proposed sigma-delta modulator. (Right panel) as produced by a reference implementation of SVM.
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Figure 10. Spectra of the source current and load voltage obtained by SVM.
Figure 10. Spectra of the source current and load voltage obtained by SVM.
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Figure 11. Simulation results of the active and reactive power at the source ( P S , Q S ). (Left): sigma-delta modulator. (Right): SVM.
Figure 11. Simulation results of the active and reactive power at the source ( P S , Q S ). (Left): sigma-delta modulator. (Right): SVM.
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Figure 12. Simulation results of the active and reactive power at the load ( P L , Q L ). (Left): sigma-delta modulator. (Right): SVM.
Figure 12. Simulation results of the active and reactive power at the load ( P L , Q L ). (Left): sigma-delta modulator. (Right): SVM.
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Figure 13. Simulation results of the electrical quantities at the source ( P S , i S ), and at the load ( v L , i L ), during transients of desired output voltage. In the (left panel) the desired amplitude was ramped from 50   V to 100   V from time 45   ms to time 55   ms , so that the power ramps from about 500   W to about 2   kW . In the (right panel) the desired frequency was swept from 150   Hz to 50   Hz during the same time span, while the voltage was held constant at 70.7   V . Power starts at about 1   kW and then rises due to lower reactance of load.
Figure 13. Simulation results of the electrical quantities at the source ( P S , i S ), and at the load ( v L , i L ), during transients of desired output voltage. In the (left panel) the desired amplitude was ramped from 50   V to 100   V from time 45   ms to time 55   ms , so that the power ramps from about 500   W to about 2   kW . In the (right panel) the desired frequency was swept from 150   Hz to 50   Hz during the same time span, while the voltage was held constant at 70.7   V . Power starts at about 1   kW and then rises due to lower reactance of load.
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Table 1. Specifications of the input filter. The resulting cut-off frequency is 978   Hz .
Table 1. Specifications of the input filter. The resulting cut-off frequency is 978   Hz .
ComponentValueRating [RMS]Rating [max]
Main inductor 4   mH 3   A 4.5   A
Main capacitor 26.4   μ F 230   V 336   V
Damper inductor 4   mH 120   mH 600   mA
Damper capacitor 26.4   μ F 4   V 12   V
Damper resistor 20   Ω 0.3   W 15   V
Table 2. Specifications of the output filter. The resulting cut-off frequency is 2212   Hz .
Table 2. Specifications of the output filter. The resulting cut-off frequency is 2212   Hz .
ComponentValueRating [RMS]Rating [max]
Main inductor 2   mH 12   A 21   A
Main capacitor 13.2   μ F 61   V 127   V
Damper inductor 2   mH 1   A 6   A
Damper capacitor 13.2   μ F 22   V 36   V
Damper resistor 8   Ω 8   W 40   V
Table 3. Comparison of total harmonic distortion (THD) and total harmonic distortion plus noise (THD + N) for Σ Δ and SVM.
Table 3. Comparison of total harmonic distortion (THD) and total harmonic distortion plus noise (THD + N) for Σ Δ and SVM.
THD THD + N
Quantity Σ Δ SVM Σ Δ SVM
v L 0.78%5.11% 6.71%5.13%
i L 0.27%0.98% 1.27%0.99%
i S 3.98%6.72% 8.82%6.74%
Table 4. Summary of the average power consumption in the matrix converter. The overall efficiency is 98.7%.
Table 4. Summary of the average power consumption in the matrix converter. The overall efficiency is 98.7%.
EntityActive Power [kW]Reactive Power [kW]Power Factor
Source 1.996 0.029 0.997
Load 1.969 + 0.742
Input filter 0.001 1.282
Output filter 0.024 + 0.627

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Orcioni, S.; Biagetti, G.; Crippa, P.; Falaschetti, L. A Driving Technique for AC-AC Direct Matrix Converters Based on Sigma-Delta Modulation. Energies 2019, 12, 1103. https://doi.org/10.3390/en12061103

AMA Style

Orcioni S, Biagetti G, Crippa P, Falaschetti L. A Driving Technique for AC-AC Direct Matrix Converters Based on Sigma-Delta Modulation. Energies. 2019; 12(6):1103. https://doi.org/10.3390/en12061103

Chicago/Turabian Style

Orcioni, Simone, Giorgio Biagetti, Paolo Crippa, and Laura Falaschetti. 2019. "A Driving Technique for AC-AC Direct Matrix Converters Based on Sigma-Delta Modulation" Energies 12, no. 6: 1103. https://doi.org/10.3390/en12061103

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